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Re: [flashrom] [PATCH 2/6] sbxxx: Set SPI clock to 16.5 MHz and disable fast reads.
by Carl-Daniel Hailfinger 14 Aug '13

14 Aug '13

Am 10.08.2013 03:45 schrieb Stefan Tauner: > Do not rely on broken firmware to set up the SPI configuration correctly. > Some boards fail with flashrom because the firmware chose too high speeds > for the alternate SPI mode which flashrom uses. Temporarily change the > clock to the lowest common value of 16.5 MHz. > > Also, disable fast reads just to be safe. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> General comments: I see struct spispeed and think it is a somewhat odd construct. The speed member is just the array index stored in the corresponding array member. Do you envision speed values which are not an array index? The code reads spispeed and then sets 16 MHz regardless of whether it's already 16 MHz. I also seem to remember that you were opposed to setting this speed permanently and advocated to restore it on shutdown. > diff --git a/sb600spi.c b/sb600spi.c > index c9be44c..2c1d400 100644 > --- a/sb600spi.c > +++ b/sb600spi.c > @@ -272,6 +272,61 @@ static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt, > return 0; > } > > +struct spispeed { > + const char *const name; > + const int8_t speed; > +}; > + > +static const struct spispeed spispeeds[] = { > + { "66 MHz", 0x00 }, > + { "33 MHz", 0x01 }, > + { "22 MHz", 0x02 }, > + { "16.5 MHz", 0x03 }, > +}; > + > +static int set_speed(struct pci_dev *dev, const struct spispeed *spispeed) > +{ > + bool success = false; > + uint8_t speed = spispeed->speed; > + > + msg_pdbg("Setting SPI clock to %s (0x%x).\n", spispeed->name, speed); > + if (amd_gen != CHIPSET_YANGTZE) { > + rmmio_writeb((mmio_readb(sb600_spibar + 0xd) & ~(0x3 << 4)) | (speed << 4), sb600_spibar + 0xd); > + success = (speed == ((mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3)); > + } > + > + if (!success) { > + msg_perr("Setting SPI clock failed.\n"); > + return 1; > + } > + return 0; > +} > + > +static int handle_speed(struct pci_dev *dev) > +{ > + uint32_t tmp; > + int8_t spispeed_idx = 3; /* Default to 16.5 MHz */ > + > + /* bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson234 yangtze > + * 18 rsvd <- fastReadEnable ? <- ? SpiReadMode[0] > + * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1] > + */ > + if (amd_gen != CHIPSET_YANGTZE) { > + if (amd_gen >= CHIPSET_SB89XX && amd_gen <= CHIPSET_HUDSON234) { > + bool fast_read = (mmio_readl(sb600_spibar + 0x00) >> 18) & 0x1; > + msg_pdbg("Fast Reads are %sabled\n", fast_read ? "en" : "dis"); > + if (fast_read) { > + msg_pdbg("Disabling them temporarily.\n"); > + rmmio_writel(mmio_readl(sb600_spibar + 0x00) & ~(0x1 << 18), > + sb600_spibar + 0x00); > + } > + } > + tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; > + msg_pdbg("NormSpeed is %s\n", spispeeds[tmp].name); > + } > + return set_speed(dev, &spispeeds[spispeed_idx]); > +} > + > static int sb600_handle_imc(struct pci_dev *dev, bool amd_imc_force) > { > /* Handle IMC everywhere but sb600 which does not have one. */ > @@ -322,9 +377,6 @@ int sb600_probe_spi(struct pci_dev *dev) > uint32_t tmp; > uint8_t reg; > bool amd_imc_force = false; > - static const char *const speed_names[4] = { > - "66/reserved", "33", "22", "16.5" > - }; > > char *arg = extract_programmer_param("amd_imc_force"); > if (arg && !strcmp(arg, "yes")) { > @@ -441,9 +493,6 @@ int sb600_probe_spi(struct pci_dev *dev) > return ERROR_NONFATAL; > } > > - tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; > - msg_pdbg("NormSpeed is %s MHz\n", speed_names[tmp]); > - > if (amd_gen >= CHIPSET_SB89XX) { > tmp = mmio_readb(sb600_spibar + 0x1D); > msg_pdbg("Using SPI_CS%d\n", tmp & 0x3); > @@ -488,6 +537,9 @@ int sb600_probe_spi(struct pci_dev *dev) > return 0; > } > > + if (handle_speed(dev) != 0) > + return ERROR_FATAL; > + > if (sb600_handle_imc(dev, amd_imc_force) != 0) > return ERROR_FATAL; > Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 1/6] sbxxx: Add detection for the remaining AMD chipset families.
by Carl-Daniel Hailfinger 14 Aug '13

14 Aug '13

Am 10.08.2013 03:45 schrieb Stefan Tauner: > Also, correct prettyprinting of the registers of the various families, > and abort if SpiAccessMacRomEn or SpiHostAccessRomEn prohibit full access. > > Tested reading/writing on ASRock IMB-A180, and chipset detection on > one of each affected generation by Chris Goodrich from Sage. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > sb600spi.c | 133 ++++++++++++++++++++++++++++++++++++++++++++++++------------- > 1 file changed, 106 insertions(+), 27 deletions(-) > > diff --git a/sb600spi.c b/sb600spi.c > index cb7c4ac..c9be44c 100644 > --- a/sb600spi.c > +++ b/sb600spi.c > @@ -57,7 +57,28 @@ static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; > static void determine_generation(struct pci_dev *dev) > { > amd_gen = CHIPSET_AMD_UNKNOWN; > - if (dev->device_id == 0x780e) { > + msg_pdbg2("Trying to determine the generation of the SPI interface... "); > + if (dev->device_id == 0x438d) { > + amd_gen = CHIPSET_SB6XX; > + msg_pdbg("SB6xx detected.\n"); > + } else if (dev->device_id == 0x439d) { > + struct pci_dev *smbus_dev = pci_dev_find(0x1002, 0x4385); Why do we search twice for this SMBus device, once inside sb600_probe_spi and once here? Can't we just pass the smbus device as second parameter to determine_generation? > + if (smbus_dev == NULL) > + return; > + uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); > + if (rev >= 0x39 && rev <= 0x3D) { > + amd_gen = CHIPSET_SB7XX; > + msg_pdbg("SB7xx/SP5100 detected.\n"); > + } else if (rev >= 0x40 && rev <= 0x42) { > + amd_gen = CHIPSET_SB89XX; > + msg_pdbg("SB8xx/SB9xx/Hudson-1 detected.\n"); > + } else { > + msg_pwarn("SB device found but SMBus revision 0x%02x does not match known values.\n" > + "Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom(a)flashrom.org\n", > + rev); > + amd_gen = CHIPSET_SB89XX; We could error out here as well. The next release is a few weeks away anyway. > + } > + } else if (dev->device_id == 0x780e) { > /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) > * although they use different SPI interfaces. */ > #ifdef USE_YANGTZE_HEURISTICS > @@ -94,7 +115,11 @@ static void determine_generation(struct pci_dev *dev) > "the output of lspci -nnvx, thanks!.\n", rev); > } > #endif > - } > + } else > + msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" > + "Please report this to flashrom(a)flashrom.org and include this log and\n" > + "the output of lspci -nnvx, thanks!\n", > + __func__, dev->vendor_id, dev->device_id); > } > > static void reset_internal_fifo_pointer(void) > @@ -250,7 +275,7 @@ static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt, > static int sb600_handle_imc(struct pci_dev *dev, bool amd_imc_force) > { > /* Handle IMC everywhere but sb600 which does not have one. */ > - if (dev->device_id == 0x438d) > + if (amd_gen == CHIPSET_SB6XX) > return 0; > > /* TODO: we should not only look at IntegratedImcPresent (LPC Dev 20, Func 3, 40h) but also at > @@ -334,6 +359,12 @@ int sb600_probe_spi(struct pci_dev *dev) > sb600_spibar += tmp & 0xfff; > > determine_generation(dev); > + if (amd_gen == CHIPSET_AMD_UNKNOWN) { > + /* FIXME: Eventually this should be a fatal error, but until we are certain to have covered all > + * IDs actually found in the wild, try to mimmick the previous behavior. */ Given that we're now post-0.9.7, we can make this a fatal error. Besides that, the current patch doesn't even set CHIPSET_AMD_UNKNOWN for some combinations with unknown SMBus PCI revision ID. > + msg_pwarn("Could not determine chipset generation. Assuming SB6xx."); > + amd_gen = CHIPSET_SB6XX; > + } > > if (amd_gen == CHIPSET_YANGTZE) { > msg_perr("SPI on Kabini/Temash and newer chipsets are not yet supported.\n" > @@ -341,35 +372,83 @@ int sb600_probe_spi(struct pci_dev *dev) > return ERROR_NONFATAL; > } > > - tmp = pci_read_long(dev, 0xa0); > - msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, " > - "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, > - (tmp & 0x4) >> 2); > - tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2; > - msg_pdbg("PrefetchEnSPIFromIMC=%i, ", tmp); > - > - tmp = pci_read_byte(dev, 0xbb); > - /* FIXME: Set bit 3,6,7 if not already set. > - * Set bit 5, otherwise SPI accesses are pointless in LPC mode. > - * See doc 42413 AMD SB700/710/750 RPR. > + /* Chipset support matrix for SPI Base_Addr (LPC PCI reg 0xa0) > + * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson2+ yangtze > + * 3 rsvd <- <- ? <- ? RouteTpm2Spi > + * 2 rsvd AbortEnable rsvd ? <- ? <- > + * 1 rsvd SpiRomEnable <- ? <- ? <- > + * 0 rsvd AltSpiCSEnable<1> rsvd ? <- ? <- Maybe it's just me, but I have trouble parsing that table. Let's talk about bit 2: What you mean is clear for 6xx (rsvd), 7xx (abortenable), 8xx (abortenable). I'm assuming that this bit is not described for 9xx and hudson1, but why is the hudson2+ entry "?" instead of "<-" ? Or do the "?" entries for 9xx and hudson2+ have a different meaning? > + * > + * <1> It is unknown if that was ever working. On later chipsets the CS config is at memmapped 0x1D. Heh. Let's find someone with DualBIOS on a SB7xx board. But seriously, I'd assume this works if it's still in the current revision of the register reference guide. > */ > - msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", > - tmp & 0x1, (tmp & 0x20) >> 5); > - tmp = mmio_readl(sb600_spibar); > - /* FIXME: If SpiAccessMacRomEn or SpiHostAccessRomEn are zero on > - * SB700 or later, reads and writes will be corrupted. Abort in this > - * case. Make sure to avoid this check on SB600. > + if (amd_gen >= CHIPSET_SB7XX) { > + tmp = pci_read_long(dev, 0xa0); > + msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); > + if (amd_gen == CHIPSET_SB7XX) > + msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); > + > + tmp = pci_read_byte(dev, 0xba); > + msg_pdbg(", PrefetchEnSPIFromIMC=%i", (tmp & 0x4) >> 2); > + > + tmp = pci_read_byte(dev, 0xbb); > + /* FIXME: Set bit 3,6,7 if not already set. > + * Set bit 5, otherwise SPI accesses are pointless in LPC mode. > + * See doc 42413 AMD SB700/710/750 RPR. Are these bits required to be set even for post-SB7000 chipsets? > + */ > + if (amd_gen == CHIPSET_SB7XX) > + msg_pdbg(", SpiOpEnInLpcMode=%i", (tmp >> 5) & 0x1); > + msg_pdbg(", PrefetchEnSPIFromHost=%i\n", tmp & 0x1); > + } > + > + /* Chipset support matrix for SPI_Cntrl0 (spibar + 0x0) > + * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson2+ yangtze > + * 17 rsvd <- <- ? <- ? <- Again the table I don't understand. Maybe you should add an explanation which specifies the meaning of "?". > + * 18 rsvd <- fastReadEnable<1> ? <- ? SpiReadMode[0]<1> > + * 19 SpiArbEnable <- <- ? <- ? <- > + * 20 (FifoPtrClr) <- <- ? <- ? <- > + * 21 (FifoPtrInc) <- <- ? <- ? IllegalAccess > + * 22 SpiAccessMacRomEn <- <- ? <- ? <- > + * 23 SpiHostAccessRomEn <- <- ? <- ? <- > + * 24:26 ArbWaitCount <- <- ? <- ? <- > + * 27 SpiBridgeDisable <- <- ? <- ? rsvd > + * 28 rsvd DropOneClkOnRd = SPIClkGate ? <- ? <- > + * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1]<1> > + * 31 rsvd <- SpiBusy ? <- ? <- > + * > + * <1> see handle_speed Which handle_speed? Can't find it in svn HEAD nor in this patch. > */ > - msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " > - "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " > - "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", > - tmp, (tmp >> 18) & 0x1, > - (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, > - (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, > - (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); > + tmp = mmio_readl(sb600_spibar + 0x00); > + msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); > + > + msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", > + (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); > + > + if (amd_gen != CHIPSET_YANGTZE) > + msg_pdbg(", SpiBridgeDisable=%i", (tmp >> 27) & 0x1); > + > + switch (amd_gen) { > + case CHIPSET_SB7XX: > + msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1); Should we check that bit and set it to 0? I haven't yet been able to find a good explanation of what it does, but it seems to be a trick to allow normal read commands at higher speed. I could be mistaken, though. > + case CHIPSET_SB89XX: > + case CHIPSET_HUDSON234: > + msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); > + default: break; > + } > + msg_pdbg("\n"); > + > + if (((tmp >> 22) & 0x1) == 0 || ((tmp >> 23) & 0x1) == 0) { > + msg_perr("ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.\n"); > + return ERROR_NONFATAL; > + } > + > tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; > msg_pdbg("NormSpeed is %s MHz\n", speed_names[tmp]); AFAICS this speed handling stuff is changing in a later patch, correct? > > + if (amd_gen >= CHIPSET_SB89XX) { > + tmp = mmio_readb(sb600_spibar + 0x1D); > + msg_pdbg("Using SPI_CS%d\n", tmp & 0x3); > + } > + > /* Look for the SMBus device. */ > smbus_dev = pci_dev_find(0x1002, 0x4385); > if (!smbus_dev) { Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 1/7] sbxxx: Add spispeed parameter.
by Stefan Tauner 14 Aug '13

14 Aug '13

On Thu, 25 Jul 2013 16:08:30 -0700 David Hendricks <dhendrix(a)google.com> wrote: > Acked-by: David Hendricks <dhendrix(a)google.com> > But... superseded instead of committed. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 3/7] Allow physmap_common() to round address ranges to page boundaries.
by Stefan Tauner 14 Aug '13

14 Aug '13

On Wed, 10 Jul 2013 21:21:07 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Automatically round address ranges requested from rphysmap() to page > boundaries. Other physmap() variants were not changed so this is > safe regarding unmapping. > > I had also to shorten the readbility defines for the physmap_common > parameters to make the calls fit a single line. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Self-acked and committed in r1715. If anyone demands a rationale why I self-acked... This patch was *requested* by Carl-Daniel from me when I was a total flashrom n00b and then it was ignored. :/ http://www.flashrom.org/pipermail/flashrom/2011-May/006587.html -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 2/7] Automatically unmap physmap()s.
by Stefan Tauner 14 Aug '13

14 Aug '13

On Wed, 10 Jul 2013 21:21:06 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Similarly to the previous PCI self-clean up patch this one allows to get rid > of a huge number of programmer shutdown functions and makes introducing > bugs harder. It adds a new function rphysmap() that takes care of unmapping > at shutdown. Callers are changed where it makes sense. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Committed in r1714. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1715 - trunk
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 18:28:19 2013 New Revision: 1715 URL: http://flashrom.org/trac/flashrom/changeset/1715 Log: Allow physmap_common() to round address ranges to page boundaries. Automatically round address ranges requested from rphysmap() to page boundaries. Other physmap() variants were not changed so this is safe regarding unmapping. I had also to shorten the readbility defines for the physmap_common parameters to make the calls fit a single line. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/physmap.c Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Wed Aug 14 17:48:44 2013 (r1714) +++ trunk/physmap.c Wed Aug 14 18:28:19 2013 (r1715) @@ -205,12 +205,34 @@ } #endif -#define PHYSMAP_NOFAIL 0 -#define PHYSMAP_MAYFAIL 1 -#define PHYSMAP_RW 0 -#define PHYSMAP_RO 1 -#define PHYSMAP_NOCLEANUP 0 -#define PHYSMAP_CLEANUP 1 +#define PHYSM_NOFAIL 0 +#define PHYSM_MAYFAIL 1 +#define PHYSM_RW 0 +#define PHYSM_RO 1 +#define PHYSM_NOCLEANUP 0 +#define PHYSM_CLEANUP 1 +#define PHYSM_EXACT 0 +#define PHYSM_ROUND 1 + +/* Round start to nearest page boundary below and set len so that the resulting address range ends at the lowest + * possible page boundary where the original address range is still entirely contained. It returns the + * difference between the rounded start address and the original start address. */ +static uintptr_t round_to_page_boundaries(uintptr_t *start, size_t *len) +{ + uintptr_t page_size = getpagesize(); + uintptr_t page_mask = ~(page_size-1); + uintptr_t end = *start + *len; + uintptr_t old_start = *start; + msg_gspew("page_size=%" PRIxPTR "\n", page_size); + msg_gspew("pre-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", + PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, end); + *start = *start & page_mask; + end = (end + page_size - 1) & page_mask; + *len = end - *start; + msg_gspew("post-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", + PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, *start + *len); + return old_start - *start; +} struct undo_physmap_data { void *virt_addr; @@ -230,24 +252,18 @@ } static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool mayfail, - bool readonly, bool autocleanup) + bool readonly, bool autocleanup, bool round) { void *virt_addr; + uintptr_t offset = 0; if (len == 0) { msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr); return ERROR_PTR; } - if ((getpagesize() - 1) & len) { - msg_perr("Mapping %s at 0x%0*" PRIxPTR ", unaligned size 0x%zx.\n", - descr, PRIxPTR_WIDTH, phys_addr, len); - } - - if ((getpagesize() - 1) & phys_addr) { - msg_perr("Mapping %s, 0x%zx bytes at unaligned 0x%0*" PRIxPTR ".\n", - descr, len, PRIxPTR_WIDTH, phys_addr); - } + if (round) + offset = round_to_page_boundaries(&phys_addr, &len); if (readonly) virt_addr = sys_physmap_ro_cached(phys_addr, len); @@ -273,7 +289,9 @@ "and reboot, or reboot into\n" "single user mode.\n"); #endif - if (!mayfail) + if (mayfail) + return ERROR_PTR; + else exit(3); } @@ -292,7 +310,7 @@ } } - return virt_addr; + return virt_addr + offset; unmap_out: physunmap(virt_addr, len); if (!mayfail) @@ -302,17 +320,17 @@ void *physmap(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, PHYSMAP_RW, PHYSMAP_NOCLEANUP); + return physmap_common(descr, phys_addr, len, PHYSM_NOFAIL, PHYSM_RW, PHYSM_NOCLEANUP, PHYSM_EXACT); } void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, PHYSMAP_RW, PHYSMAP_CLEANUP); + return physmap_common(descr, phys_addr, len, PHYSM_NOFAIL, PHYSM_RW, PHYSM_CLEANUP, PHYSM_ROUND); } void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, PHYSMAP_RO, PHYSMAP_NOCLEANUP); + return physmap_common(descr, phys_addr, len, PHYSM_MAYFAIL, PHYSM_RO, PHYSM_NOCLEANUP, PHYSM_EXACT); } /* MSR abstraction implementations for Linux, OpenBSD, FreeBSD/Dragonfly, OSX, libpayload

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[commit] r1714 - trunk
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 17:48:44 2013 New Revision: 1714 URL: http://flashrom.org/trac/flashrom/changeset/1714 Log: Automatically unmap physmap()s. Similarly to the previous PCI self-clean up patch this one allows to get rid of a huge number of programmer shutdown functions and makes introducing bugs harder. It adds a new function rphysmap() that takes care of unmapping at shutdown. Callers are changed where it makes sense. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/chipset_enable.c trunk/drkaiser.c trunk/gfxnvidia.c trunk/ichspi.c trunk/it85spi.c trunk/mcp6x_spi.c trunk/nicintel.c trunk/nicintel_spi.c trunk/ogp_spi.c trunk/physmap.c trunk/programmer.h trunk/satamv.c trunk/satasii.c trunk/sb600spi.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/chipset_enable.c Wed Aug 14 17:48:44 2013 (r1714) @@ -480,7 +480,9 @@ msg_pdbg("\nRoot Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = rphysmap("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; /* Test Boot BIOS Strap Status */ bnt = mmio_readl(rcrb + 0x3410); @@ -562,7 +564,9 @@ msg_pdbg("Root Complex Register Block address = 0x%x\n", tmp); /* Map RCBA to virtual memory */ - rcrb = physmap("ICH RCRB", tmp, 0x4000); + rcrb = rphysmap("ICH RCRB", tmp, 0x4000); + if (rcrb == ERROR_PTR) + return 1; gcs = mmio_readl(rcrb + 0x3410); msg_pdbg("GCS = 0x%x: ", gcs); @@ -737,10 +741,8 @@ case 0x8410: /* VX900 */ mmio_base = pci_read_long(dev, 0xbc) << 8; mmio_base_physmapped = physmap("VIA VX MMIO register", mmio_base, SPI_CNTL_LEN); - if (mmio_base_physmapped == ERROR_PTR) { - physunmap(mmio_base_physmapped, SPI_CNTL_LEN); + if (mmio_base_physmapped == ERROR_PTR) return ERROR_FATAL; - } /* Offset 0 - Bit 0 holds SPI Bus0 Enable Bit. */ spi_cntl = mmio_readl(mmio_base_physmapped) + 0x00; Modified: trunk/drkaiser.c ============================================================================== --- trunk/drkaiser.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/drkaiser.c Wed Aug 14 17:48:44 2013 (r1714) @@ -56,12 +56,6 @@ .chip_writen = fallback_chip_writen, }; -static int drkaiser_shutdown(void *data) -{ - physunmap(drkaiser_bar, DRKAISER_MEMMAP_SIZE); - return 0; -} - int drkaiser_init(void) { struct pci_dev *dev = NULL; @@ -80,10 +74,8 @@ rpci_write_word(dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE); /* Map 128kB flash memory window. */ - drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", - addr, DRKAISER_MEMMAP_SIZE); - - if (register_shutdown(drkaiser_shutdown, NULL)) + drkaiser_bar = rphysmap("Dr. Kaiser PC-Waechter flash memory", addr, DRKAISER_MEMMAP_SIZE); + if (drkaiser_bar == ERROR_PTR) return 1; max_rom_decode.parallel = 128 * 1024; Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/gfxnvidia.c Wed Aug 14 17:48:44 2013 (r1714) @@ -77,12 +77,6 @@ .chip_writen = fallback_chip_writen, }; -static int gfxnvidia_shutdown(void *data) -{ - physunmap(nvidia_bar, GFXNVIDIA_MEMMAP_SIZE); - return 0; -} - int gfxnvidia_init(void) { struct pci_dev *dev = NULL; @@ -99,9 +93,8 @@ io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); - nvidia_bar = physmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); - - if (register_shutdown(gfxnvidia_shutdown, NULL)) + nvidia_bar = rphysmap("NVIDIA", io_base_addr, GFXNVIDIA_MEMMAP_SIZE); + if (nvidia_bar == ERROR_PTR) return 1; /* Allow access to flash interface (will disable screen). */ Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/ichspi.c Wed Aug 14 17:48:44 2013 (r1714) @@ -1844,7 +1844,9 @@ { int i; - ich_spibar = physmap("VIA SPI MMIO registers", mmio_base, 0x70); + ich_spibar = rphysmap("VIA SPI MMIO registers", mmio_base, 0x70); + if (ich_spibar == ERROR_PTR) + return ERROR_FATAL; /* Do we really need no write enable? Like the LPC one at D17F0 0x40 */ /* Not sure if it speaks all these bus protocols. */ Modified: trunk/it85spi.c ============================================================================== --- trunk/it85spi.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/it85spi.c Wed Aug 14 17:48:44 2013 (r1714) @@ -262,6 +262,9 @@ * Major TODO here, and it will be a lot of work. */ base = (chipaddr)physmap("it85 communication", 0xFFFFF000, 0x1000); + if (base == (chipaddr)ERROR_PTR) + return 1; + msg_pdbg("%s():%d base=0x%08x\n", __func__, __LINE__, (unsigned int)base); ce_high = (unsigned char *)(base + 0xE00); /* 0xFFFFFE00 */ Modified: trunk/mcp6x_spi.c ============================================================================== --- trunk/mcp6x_spi.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/mcp6x_spi.c Wed Aug 14 17:48:44 2013 (r1714) @@ -135,25 +135,20 @@ /* Accessing a NULL pointer BAR is evil. Don't do it. */ if (!mcp6x_spibaraddr && want_spi) { - msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR " - "is invalid.\n"); + msg_perr("Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.\n"); return 1; } else if (!mcp6x_spibaraddr && !want_spi) { msg_pdbg("MCP SPI is not used.\n"); return 0; } else if (mcp6x_spibaraddr && !want_spi) { - msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently" - " doesn't have SPI enabled.\n"); + msg_pdbg("Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.\n"); /* FIXME: Should we enable SPI anyway? */ return 0; } /* Map the BAR. Bytewise/wordwise access at 0x530 and 0x540. */ - mcp6x_spibar = physmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); - -#if 0 - /* FIXME: Run the physunmap in a shutdown function. */ - physunmap(mcp6x_spibar, 0x544); -#endif + mcp6x_spibar = rphysmap("NVIDIA MCP6x SPI", mcp6x_spibaraddr, 0x544); + if (mcp6x_spibar == ERROR_PTR) + return 1; status = mmio_readw(mcp6x_spibar + 0x530); msg_pdbg("SPI control is 0x%04x, req=%i, gnt=%i\n", Modified: trunk/nicintel.c ============================================================================== --- trunk/nicintel.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/nicintel.c Wed Aug 14 17:48:44 2013 (r1714) @@ -59,13 +59,6 @@ .chip_writen = fallback_chip_writen, }; -static int nicintel_shutdown(void *data) -{ - physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); - return 0; -} - int nicintel_init(void) { struct pci_dev *dev = NULL; @@ -83,18 +76,14 @@ return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_2); - nicintel_bar = physmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); + nicintel_bar = rphysmap("Intel NIC flash", addr, NICINTEL_MEMMAP_SIZE); if (nicintel_bar == ERROR_PTR) - goto error_out_unmap; + return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); /* FIXME: This is not an aligned mapping. Use 4k? */ - nicintel_control_bar = physmap("Intel NIC control/status reg", - addr, NICINTEL_CONTROL_MEMMAP_SIZE); + nicintel_control_bar = rphysmap("Intel NIC control/status reg", addr, NICINTEL_CONTROL_MEMMAP_SIZE); if (nicintel_control_bar == ERROR_PTR) - goto error_out; - - if (register_shutdown(nicintel_shutdown, NULL)) return 1; /* FIXME: This register is pretty undocumented in all publicly available @@ -112,11 +101,6 @@ register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); return 0; - -error_out_unmap: - physunmap(nicintel_bar, NICINTEL_MEMMAP_SIZE); -error_out: - return 1; } static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val, Modified: trunk/nicintel_spi.c ============================================================================== --- trunk/nicintel_spi.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/nicintel_spi.c Wed Aug 14 17:48:44 2013 (r1714) @@ -151,16 +151,12 @@ { uint32_t tmp; - /* Disable writes manually. See the comment about EECD in - * nicintel_spi_init() for details. - */ + /* Disable writes manually. See the comment about EECD in nicintel_spi_init() for details. */ tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_ENABLED; tmp |= FLASH_WRITES_DISABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD); - physunmap(nicintel_spibar, MEMMAP_SIZE); - return 0; } @@ -177,8 +173,7 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); - nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", - io_base_addr, MEMMAP_SIZE); + nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE); /* Automatic restore of EECD on shutdown is not possible because EECD * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED, * but other bits with side effects as well. Those other bits must be Modified: trunk/ogp_spi.c ============================================================================== --- trunk/ogp_spi.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/ogp_spi.c Wed Aug 14 17:48:44 2013 (r1714) @@ -97,12 +97,6 @@ .half_period = 0, }; -static int ogp_spi_shutdown(void *data) -{ - physunmap(ogp_spibar, 4096); - return 0; -} - int ogp_spi_init(void) { struct pci_dev *dev = NULL; @@ -137,9 +131,8 @@ return 1; io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); - ogp_spibar = physmap("OGP registers", io_base_addr, 4096); - - if (register_shutdown(ogp_spi_shutdown, NULL)) + ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096); + if (ogp_spibar == ERROR_PTR) return 1; if (bitbang_spi_init(&bitbang_spi_master_ogp)) Modified: trunk/physmap.c ============================================================================== --- trunk/physmap.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/physmap.c Wed Aug 14 17:48:44 2013 (r1714) @@ -21,6 +21,7 @@ */ #include <unistd.h> +#include <stdbool.h> #include <stdio.h> #include <stdlib.h> #include <string.h> @@ -204,13 +205,32 @@ } #endif -#define PHYSMAP_NOFAIL 0 -#define PHYSMAP_MAYFAIL 1 -#define PHYSMAP_RW 0 -#define PHYSMAP_RO 1 +#define PHYSMAP_NOFAIL 0 +#define PHYSMAP_MAYFAIL 1 +#define PHYSMAP_RW 0 +#define PHYSMAP_RO 1 +#define PHYSMAP_NOCLEANUP 0 +#define PHYSMAP_CLEANUP 1 -static void *physmap_common(const char *descr, uintptr_t phys_addr, - size_t len, int mayfail, int readonly) +struct undo_physmap_data { + void *virt_addr; + size_t len; +}; + +static int undo_physmap(void *data) +{ + if (data == NULL) { + msg_perr("%s: tried to physunmap without valid data!\n", __func__); + return 1; + } + struct undo_physmap_data *d = data; + physunmap(d->virt_addr, d->len); + free(data); + return 0; +} + +static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool mayfail, + bool readonly, bool autocleanup) { void *virt_addr; @@ -257,19 +277,42 @@ exit(3); } + if (autocleanup) { + struct undo_physmap_data *d = malloc(sizeof(struct undo_physmap_data)); + if (d == NULL) { + msg_perr("%s: Out of memory!\n", __func__); + goto unmap_out; + } + + d->virt_addr = virt_addr; + d->len = len; + if (register_shutdown(undo_physmap, d) != 0) { + msg_perr("%s: Could not register shutdown function!\n", __func__); + goto unmap_out; + } + } + return virt_addr; +unmap_out: + physunmap(virt_addr, len); + if (!mayfail) + exit(3); + return ERROR_PTR; } void *physmap(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, - PHYSMAP_RW); + return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, PHYSMAP_RW, PHYSMAP_NOCLEANUP); +} + +void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len) +{ + return physmap_common(descr, phys_addr, len, PHYSMAP_NOFAIL, PHYSMAP_RW, PHYSMAP_CLEANUP); } void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len) { - return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, - PHYSMAP_RO); + return physmap_common(descr, phys_addr, len, PHYSMAP_MAYFAIL, PHYSMAP_RO, PHYSMAP_NOCLEANUP); } /* MSR abstraction implementations for Linux, OpenBSD, FreeBSD/Dragonfly, OSX, libpayload Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/programmer.h Wed Aug 14 17:48:44 2013 (r1714) @@ -276,6 +276,7 @@ /* physmap.c */ void *physmap(const char *descr, uintptr_t phys_addr, size_t len); +void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len); void *physmap_try_ro(const char *descr, uintptr_t phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); #if CONFIG_INTERNAL == 1 Modified: trunk/satamv.c ============================================================================== --- trunk/satamv.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/satamv.c Wed Aug 14 17:48:44 2013 (r1714) @@ -57,12 +57,6 @@ .chip_writen = fallback_chip_writen, }; -static int satamv_shutdown(void *data) -{ - physunmap(mv_bar, 0x20000); - return 0; -} - /* * Random notes: * FCE# Flash Chip Enable @@ -94,13 +88,10 @@ return 1; addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); - mv_bar = physmap("Marvell 88SX7042 registers", addr, 0x20000); + mv_bar = rphysmap("Marvell 88SX7042 registers", addr, 0x20000); if (mv_bar == ERROR_PTR) return 1; - if (register_shutdown(satamv_shutdown, NULL)) - return 1; - tmp = pci_mmio_readl(mv_bar + FLASH_PARAM); msg_pspew("Flash Parameters:\n"); msg_pspew("TurnOff=0x%01x\n", (tmp >> 0) & 0x7); Modified: trunk/satasii.c ============================================================================== --- trunk/satasii.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/satasii.c Wed Aug 14 17:48:44 2013 (r1714) @@ -54,12 +54,6 @@ .chip_writen = fallback_chip_writen, }; -static int satasii_shutdown(void *data) -{ - physunmap(sii_bar, SATASII_MEMMAP_SIZE); - return 0; -} - static uint32_t satasii_wait_done(void) { uint32_t ctrl_reg; @@ -97,15 +91,15 @@ reg_offset = 0x50; } - sii_bar = physmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE) + reg_offset; + sii_bar = rphysmap("SATA SiI registers", addr, SATASII_MEMMAP_SIZE); + if (sii_bar == ERROR_PTR) + return 1; + sii_bar += reg_offset; /* Check if ROM cycle are OK. */ if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26)))) msg_pwarn("Warning: Flash seems unconnected.\n"); - if (register_shutdown(satasii_shutdown, NULL)) - return 1; - register_par_programmer(&par_programmer_satasii, BUS_PARALLEL); return 0; Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Wed Aug 14 16:47:26 2013 (r1713) +++ trunk/sb600spi.c Wed Aug 14 17:48:44 2013 (r1714) @@ -326,8 +326,10 @@ return 0; /* Physical memory has to be mapped at page (4k) boundaries. */ - sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, - 0x1000); + sb600_spibar = rphysmap("SB600 SPI registers", tmp & 0xfffff000, 0x1000); + if (sb600_spibar == ERROR_PTR) + return 1; + /* The low bits of the SPI base address are used as offset into * the mapped page. */

1 0

[commit] r1713 - in trunk: . util
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 16:47:26 2013 New Revision: 1713 URL: http://flashrom.org/trac/flashrom/changeset/1713 Log: Add getrevision.sh utility script. This allows to retrieve various data from SCM systems (git and svn) and use them in the build process to better indicate which source was used. For now only use it for the upstream (i.e. svn) revision number, which was previously implemented by an awful line in the Makefile. Signed-Off-By: David Hendricks <dhendrix(a)google.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: trunk/util/getrevision.sh (contents, props changed) Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Aug 14 16:41:29 2013 (r1712) +++ trunk/Makefile Wed Aug 14 16:47:26 2013 (r1713) @@ -326,7 +326,7 @@ # of the checked out flashrom files. # Note to packagers: Any tree exported with "make export" or "make tarball" # will not require subversion. The downloadable snapshots are already exported. -SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) +SVNVERSION := $(shell ./util/getrevision.sh -u) RELEASE := 0.9.7 VERSION := $(RELEASE)-r$(SVNVERSION) Added: trunk/util/getrevision.sh ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/util/getrevision.sh Wed Aug 14 16:47:26 2013 (r1713) @@ -0,0 +1,228 @@ +#!/bin/sh +# +# This file is part of the flashrom project. +# +# Copyright (C) 2005 coresystems GmbH <stepan(a)coresystems.de> +# Copyright (C) 2009,2010 Carl-Daniel Hailfinger +# Copyright (C) 2010 Chromium OS Authors +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# + +EXIT_SUCCESS=0 +EXIT_FAILURE=1 + +svn_revision() { + LC_ALL=C svnversion -cn . 2>/dev/null | \ + sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | \ + grep "[0-9]" || + LC_ALL=C svn info . 2>/dev/null | \ + awk '/^Revision:/ {print $$2 }' | \ + grep "[0-9]" || + LC_ALL=C git svn info . 2>/dev/null | \ + awk '/^Revision:/ {print $$2 }' | \ + grep "[0-9]" || + echo '' +} + +svn_url() { + echo $(LC_ALL=C svn info 2>/dev/null | + grep URL: | + sed 's/.*URL:[[:blank:]]*//' | + grep ^. + ) +} + +svn_timestamp() { + local date_format="+%Y-%m-%d %H:%M:%S" + local timestamp + + # are there local changes in the client? + if svn status | egrep '^ *[ADMR] *' > /dev/null ; then + timestamp=$(date "${date_format} +") + else + # No local changes, get date of the last log record. + local last_commit_date=$(svn info | grep '^Last Changed Date:' | \ + awk '{print $4" "$5" "$6}') + timestamp=$(date --utc --date "${last_commit_date}" \ + "${date_format} UTC") + fi + + echo "${timestamp}" +} + +git_revision() { + echo $(git log --oneline | head -1 | awk '{print $1}') +} + +# Retrieve svn revision using git log data (for git mirrors) +gitsvn_revision() { + local r + + git log| + grep git-svn-id| + sed 's/.*git-svn-id:[[:blank:]]*$[^@]\+$@[0-9]\+[[:blank:]]\+$[^[:blank:]]\+$/\1 \2/'| + sort| + uniq| + read url uuid + + r=$(git log --grep="git-svn-id.*$uuid"| grep git-svn-id | \ + sed 's/.*@//;s/[[:blank:]].*//'| \ + sort -n | \ + tail -1) + + echo "${r}" +} + +git_timestamp() { + local date_format="+%b %d %Y %H:%M:%S" + local timestamp + + # are there local changes in the client? + if git status | \ + egrep '^# Change(s to be committed|d but not updated):$' > /dev/null + then + timestamp=$(date "${date_format} +") + else + # No local changes, get date of the last log record. + local last_commit_date=$(git log | head -3 | grep '^Date:' | \ + awk '{print $3" "$4" "$6" "$5" "$7}') + timestamp=$(date --utc --date "${last_commit_date}" \ + "${date_format} UTC") + fi + + echo "${timestamp}" +} + +git_url() { + # Only the first line of `git remote' is considered. + echo $(LC_ALL=C git remote show origin 2>/dev/null | + grep 'Fetch URL:' | + sed 's/.*URL:[[:blank:]]*//' | + grep ^. + ) +} + +scm_url() { + local url + + if [ -d ".svn" ] ; then + url=$(svn_url) + elif [ -d ".git" ] ; then + url=$(git_url) + fi + + echo "${url}" +} + +# Retrieve timestamp since last modification. If the sources are pristine, +# then the timestamp will match that of the SCM's more recent modification +# date. +timestamp() { + local t + + if [ -d ".svn" ] ; then + t=$(svn_timestamp) + elif [ -d ".git" ] ; then + t=$(git_timestamp) + fi + + echo ${t} +} + +# Retrieve local SCM revision info. This is useful if we're working in +# a even different SCM than upstream. +# +# If local copy is svn, then there is nothing to do here. +# If local copy is git, then retrieve useful git revision info +local_revision() { + local r + + if [ -d ".git" ] ; then + r=$(git_revision) + fi + + echo ${r} +} + +# Get the upstream flashrom revision stored in SVN metadata. +# +# If the local copy is svn, then use svnversion +# If the local copy is git, then scrape upstream revision from git logs +upstream_revision() { + local r + + if [ -d ".svn" ] ; then + r=$(svn_revision) + elif [ -d ".git" ] ; then + r=$(gitsvn_revision) + fi + + echo "${r}" +} + +show_help() { + echo "Usage: + ${0} <option> + +Options + -h or --help + Display this message. + -u or --upstream + upstream flashrom revision + -l or --local + local revision (if different from upstream) + -t or --timestamp + timestamp of most recent modification + -U or --url + url associated with local copy of flashrom + " + return +} + +if [ ! -n "${1}" ] +then + show_help; + echo "No options specified"; + exit ${EXIT_SUCCESS} +fi + +# The is the main loop +while [[ ${1} = -* ]]; +do + case ${1} in + -h|--help) + show_help; + shift;; + -u|--upstream) + echo "$(upstream_revision)"; + shift;; + -l|--local) + echo "$(local_revision)"; + shift;; + -t|--timestamp) + echo "$(timestamp)"; + shift;; + -U|--url) + echo "$(scm_url)"; + shift;; + *) + show_help; + echo "invalid option: ${1}" + exit ${EXIT_FAILURE} + esac; +done + +exit ${EXIT_SUCCESS}

1 0

[commit] r1712 - branches/0.9.7
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 16:41:29 2013 New Revision: 1712 URL: http://flashrom.org/trac/flashrom/changeset/1712 Log: Create flashrom 0.9.7 stable branch. For backporting important patches and tagging subsequent 0.9.7 service releases. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Added: branches/0.9.7/ - copied from r1711, tags/flashrom-0.9.7/

1 0

Re: [flashrom] [PATCH] Add a bunch of new/tested stuff and various small changes 19.
by Stefan Tauner 14 Aug '13

14 Aug '13

r1709 -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

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