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[commit] r1711 - tags/flashrom-0.9.7
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 00:21:00 2013 New Revision: 1711 URL: http://flashrom.org/trac/flashrom/changeset/1711 Log: Tag flashrom 0.9.7. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: David Hendricks <dhendrix(a)google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: tags/flashrom-0.9.7/ - copied from r1710, trunk/

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[commit] r1710 - trunk
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 00:13:01 2013 New Revision: 1710 URL: http://flashrom.org/trac/flashrom/changeset/1710 Log: Increase flashrom release number to 0.9.7. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: David Hendricks <dhendrix(a)google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Aug 14 00:10:41 2013 (r1709) +++ trunk/Makefile Wed Aug 14 00:13:01 2013 (r1710) @@ -328,7 +328,7 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . 2>/dev/null | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || LC_ALL=C svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || LC_ALL=C git svn info . 2>/dev/null | awk '/^Revision:/ {print $$2 }' | grep "[0-9]" || echo unknown) -RELEASE := 0.9.6.1 +RELEASE := 0.9.7 VERSION := $(RELEASE)-r$(SVNVERSION) RELEASENAME ?= $(VERSION)

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[commit] r1709 - trunk
by repository service 14 Aug '13

14 Aug '13

Author: stefanct Date: Wed Aug 14 00:10:41 2013 New Revision: 1709 URL: http://flashrom.org/trac/flashrom/changeset/1709 Log: Add a bunch of new/tested stuff and various small changes 19. Tested mainboards: OK: - ASUS P8H77-V LE http://www.flashrom.org/pipermail/flashrom/2013-June/011127.html - HP Pegatron IPMEL-AE (Evans-GL6) Reported by Idwer on IRC - MSI MS-7379 (G31M) http://paste.flashrom.org/view.php?id=1726 - MSI MS-7816 (H87-G43) http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html - MSI MS-9830 (IM-945GSE-A, A9830IMS) http://paste.flashrom.org/view.php?id=1730 - Supermicro X8SAX http://paste.flashrom.org/view.php?id=1717 NOT OK: - Intel D2700MUD http://paste.flashrom.org/view.php?id=1723 - Intel DQ45CB http://www.flashrom.org/pipermail/flashrom/2013-August/011369.html Chipsets: - Add PCI ID for Intel's Coleto Creek. - Mark Intel H87 (0x8c4a) as OK. http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html Miscellaneous: - ichspi: Fix printing address ranges if space is divided by FPB. - Tiny other stuff. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/ichspi.c trunk/print.c trunk/programmer.h Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Tue Aug 13 09:09:57 2013 (r1708) +++ trunk/board_enable.c Wed Aug 14 00:10:41 2013 (r1709) @@ -2235,6 +2235,7 @@ * Suited for all boards with ambiguous DMI chassis information, which should be * whitelisted because they are known to work: * - ASRock IMB-A180(-H) + * - Intel D945GCNL * - MSC Q7 Tunnel Creek Module (Q7-TCTC) */ static int p2_not_a_laptop(void) Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Tue Aug 13 09:09:57 2013 (r1708) +++ trunk/chipset_enable.c Wed Aug 14 00:10:41 2013 (r1709) @@ -1440,6 +1440,7 @@ {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, + {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, @@ -1511,7 +1512,7 @@ {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, - {0x8086, 0x8c4a, NT, "Intel", "H87", enable_flash_pch8}, + {0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8}, {0x8086, 0x8c4b, NT, "Intel", "HM87", enable_flash_pch8}, {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Tue Aug 13 09:09:57 2013 (r1708) +++ trunk/ichspi.c Wed Aug 14 00:10:41 2013 (r1709) @@ -1210,7 +1210,7 @@ } else { msg_cdbg("The flash address space (0x%06x - 0x%06x) is divided " "at address 0x%06x in two partitions.\n", - 0, size_high-1, boundary); + 0, total_size-1, boundary); size_low = total_size - size_high; erase_size_low = ich_hwseq_get_erase_block_size(0); @@ -1224,7 +1224,7 @@ eraser->eraseblocks[1].size = erase_size_high; eraser->eraseblocks[1].count = size_high / erase_size_high; msg_cdbg("The second partition ranges from 0x%06x to 0x%06x.\n", - boundary, size_high-1); + boundary, total_size-1); msg_cdbg("In that range are %d erase blocks with %d B each.\n", size_high / erase_size_high, erase_size_high); } Modified: trunk/print.c ============================================================================== --- trunk/print.c Tue Aug 13 09:09:57 2013 (r1708) +++ trunk/print.c Wed Aug 14 00:10:41 2013 (r1709) @@ -720,6 +720,7 @@ B("ASUS", "P8H67-M PRO", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H77-I", OK, "http://www.asus.com/Motherboards/P8H77I/", NULL), B("ASUS", "P8H77-M", OK, "http://www.asus.com/Motherboards/P8H77M/", NULL), + B("ASUS", "P8H77-V LE", OK, "http://www.asus.com/Motherboards/P8H77V_LE/", NULL), B("ASUS", "P8P67 (rev. 3.1)", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8P67 LE (B2)", OK, NULL, NULL), B("ASUS", "P8P67 LE (B3)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -850,6 +851,7 @@ B("GIGABYTE", "GA-Z77MX-D3H", BAD, "http://www.gigabyte.com/products/product-page.aspx?pid=4145", "Uses MX25L6436E and requires a small patch (but works flawlessly with that)."), B("HP", "8100 Elite CMT PC (304Bh)", BAD, NULL, "SPI lock down, PR, read-only descriptor, locked ME region."), B("HP", "e-Vectra P2706T", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&pro…", NULL), + B("HP", "Evans-GL6 (Pegatron IPMEL-AE)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?cc=us&lc=en&dlc=en&docname=c019…", "Found in HP Pavilion Slimline s5220f."), B("HP", "ProLiant DL145 G3", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c008…", NULL), B("HP", "ProLiant DL165 G6", OK, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-33…", NULL), B("HP", "ProLiant N40L", OK, NULL, NULL), @@ -866,6 +868,7 @@ B("IBM", "x3455", OK, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL), B("IEI", "PICOe-9452", OK, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&…", NULL), B("Intel", "D201GLY", OK, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL), + B("Intel", "D2700MUD", BAD, "http://www.intel.com/cd/products/services/emea/eng/motherboards/desktop/D27…", "SMM protection enabled"), B("Intel", "D425KT", BAD, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/de…", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"), B("Intel", "D865GLC", BAD, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"), B("Intel", "D945GCNL", OK, NULL, NULL), @@ -876,6 +879,7 @@ B("Intel", "DH67CF", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"), B("Intel", "DH67CL", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html"), B("Intel", "DN2800MT (Marshalltown)", BAD, NULL, "BIOS locked via BIOS_CNTL."), + B("Intel", "DQ45CB", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Intel", "DQ77MK", BAD, NULL, "Q77 with BIOS lock enable and locked ME region, see http://paste.flashrom.org/view.php?id=1603"), B("Intel", "EP80759", OK, NULL, NULL), B("Intel", "Foxhollow", OK, NULL, "Intel reference board."), @@ -927,8 +931,9 @@ B("MSI", "MS-7368 (K9AG Neo2-Digital)", OK, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL), B("MSI", "MS-7369 (K9N Neo V2)", OK, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL), B("MSI", "MS-7376 (K9A2 Platinum V1)", OK, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL), + B("MSI", "MS-7379 (G31M)", OK, "http://www.msi.com/product/mb/G31M.html", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", OK, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), - B("MSI", "MS-7529 (G31TM-P21)", OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), + B("MSI", "MS-7529 (G31TM-P21)", OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), B("MSI", "MS-7548 (Aspen-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&d…", NULL), B("MSI", "MS-7551 (KA780G)", OK, "http://www.msi.com/product/mb/KA780G.html", NULL), B("MSI", "MS-7596 (785GM-E51)", OK, "http://www.msi.com/product/mb/785GM-E51.html", NULL), @@ -945,6 +950,8 @@ B("MSI", "MS-7740 (H61MA-E35(B3))", OK, "http://www.msi.com/product/mb/H61MA-E35--B3-.html", NULL), B("MSI", "MS-7756 (H77MA-G43)", OK, "http://www.msi.com/product/mb/H77MA-G43.html", NULL), B("MSI", "MS-7808 (B75MA-E33)", OK, "http://www.msi.com/product/mb/B75MA-E33.html", NULL), + B("MSI", "MS-7816 (H87-G43)", OK, "http://www.msi.com/product/mb/H87-G43.html", NULL), + B("MSI", "MS-9830 (IM-945GSE-A, A9830IMS)", OK, "http://www.msi.com/product/ipc/IM-945GSE-A.html", NULL), B("NEC", "PowerMate 2000", OK, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL), B("Nokia", "IP530", OK, NULL, NULL), B("Palit", "N61S", OK, NULL, NULL), @@ -993,6 +1000,7 @@ B("Supermicro", "X8DTT-HIBQF", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL), B("Supermicro", "X8DTU-6TF+", BAD, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&…", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X8DTU-F", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL), + B("Supermicro", "X8SAX", OK, "http://www.supermicro.com/products/motherboard/xeon3000/x58/x8sax.cfm", NULL), B("Supermicro", "X8SIE(-F)", BAD, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), B("Supermicro", "X8STi", OK, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), B("Supermicro", "X9DR3-F", BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9dr3-f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -1073,7 +1081,7 @@ B("Acer", "Aspire 1520", OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspir…", NULL), B("Acer", "Aspire One", BAD, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"), B("ASUS", "A8Jm", OK, NULL, NULL), - B("ASUS", "Eee PC 701 4G", BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), + B("ASUS", "Eee PC 701 4G", BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), B("ASUS", "M6Ne", NT, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."), B("Clevo", "P150HM", BAD, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Dell", "Inspiron 1420", OK, NULL, NULL), Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Tue Aug 13 09:09:57 2013 (r1708) +++ trunk/programmer.h Wed Aug 14 00:10:41 2013 (r1709) @@ -572,7 +572,7 @@ enum ich_chipset ich_generation); int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); -/* imc.c */ +/* amd_imc.c */ int amd_imc_shutdown(struct pci_dev *dev); /* it85spi.c */

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Re: [flashrom] Flashrom fails on write. P4 motherboard
by san 13 Aug '13

13 Aug '13

With patch: san@flashrom:~/flashrom/P4$ flashrom -V -w P4.rom flashrom v0.9.6.1-r1704 on Linux 3.5.0-23-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.8, GCC 4.6.3, little endian Command line (3 args): flashrom -V -w P4.rom Please select a programmer with the --programmer parameter. Previously this was not necessary because there was a default set. To choose the mainboard of this computer use 'internal'. Valid choices are: internal, dummy, nic3com, nicrealtek, gfxnvidia, drkaiser, satasii, ft2232_spi, serprog, buspirate_spi, rayer_spi, pony_spi, nicintel, nicintel_spi, ogp_spi, satamv, linux_spi, usbblaster_spi. san@flashrom:~/flashrom/P4$ flashrom -V -w P4.rom --programmer internal flashrom v0.9.6.1-r1704 on Linux 3.5.0-23-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.8, GCC 4.6.3, little endian Command line (5 args): flashrom -V -w P4.rom --programmer internal Calibrating delay loop... OS timer resolution is 13 usecs, 727M loops per second, 10 myus = 19 us, 100 myus = 2518 us, 1000 myus = 1153 us, 10000 myus = 11277 us, 52 myus = 57 us, OK. Initializing internal programmer ERROR: Could not get I/O privileges (Operation not permitted). You need to be root. Error: Programmer initialization failed. san@flashrom:~/flashrom/P4$ sudo flashrom -V -w P4.rom --programmer internal [sudo] password for san: flashrom v0.9.6.1-r1704 on Linux 3.5.0-23-generic (i686) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.8, GCC 4.6.3, little endian Command line (5 args): flashrom -V -w P4.rom --programmer internal Calibrating delay loop... OS timer resolution is 12 usecs, 512M loops per second, delay more than 10% too short (got 63% of expected delay), recalculating... 713M loops per second, 10 myus = 19 us, 100 myus = 3282 us, 1000 myus = 835 us, 10000 myus = 22949 us, 48 myus = 53 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: " " DMI string baseboard-product-name: "i845E-PC87366" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Active config mode, unknown reg 0x20 ID: e9. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with W836xx: your board name: flashrom -V as the subject to help us finish support for your Super I/O. Thanks. Found chipset "Intel ICH4/ICH4-L" with PCI ID 8086:24c0. Enabling flash write... BIOS_CNTL = 0x01: BIOS Lock Enable: disabled, BIOS Write Enable: enabled OK. The following protocols are supported: FWH. Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xbf, id2 0x57 Found SST flash chip "SST49LF002A/B" (256 kB, FWH) at physical address 0xfffc0000. Lock status for 0x000000 (size 0x004000) is 01, write locked Lock status for 0x004000 (size 0x004000) is 00, full access Lock status for 0x008000 (size 0x004000) is 01, write locked Lock status for 0x00c000 (size 0x004000) is 00, full access Lock status for 0x010000 (size 0x004000) is 01, write locked Lock status for 0x014000 (size 0x004000) is 00, full access Lock status for 0x018000 (size 0x004000) is 01, write locked Lock status for 0x01c000 (size 0x004000) is 00, full access Lock status for 0x020000 (size 0x004000) is 01, write locked Lock status for 0x024000 (size 0x004000) is 00, full access Lock status for 0x028000 (size 0x004000) is 01, write locked Lock status for 0x02c000 (size 0x004000) is 00, full access Lock status for 0x030000 (size 0x004000) is 01, write locked Lock status for 0x034000 (size 0x004000) is 00, full access Lock status for 0x038000 (size 0x004000) is 01, write locked Lock status for 0x03c000 (size 0x004000) is 00, full access Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0x25, id2 0x82, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xbf, id2 0x57 Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xbf, id2 0x57 Found SST flash chip "SST49LF002A/B" (256 kB, FWH). Lock status for 0x000000 (size 0x004000) is 01, write locked Trying to clear lock for 0x000000... Lock status for 0x000000 (size 0x004000) is 00, full access OK Lock status for 0x004000 (size 0x004000) is 00, full access Lock status for 0x008000 (size 0x004000) is 01, write locked Trying to clear lock for 0x008000... Lock status for 0x008000 (size 0x004000) is 00, full access OK Lock status for 0x00c000 (size 0x004000) is 00, full access Lock status for 0x010000 (size 0x004000) is 01, write locked Trying to clear lock for 0x010000... Lock status for 0x010000 (size 0x004000) is 00, full access OK Lock status for 0x014000 (size 0x004000) is 00, full access Lock status for 0x018000 (size 0x004000) is 01, write locked Trying to clear lock for 0x018000... Lock status for 0x018000 (size 0x004000) is 00, full access OK Lock status for 0x01c000 (size 0x004000) is 00, full access Lock status for 0x020000 (size 0x004000) is 01, write locked Trying to clear lock for 0x020000... Lock status for 0x020000 (size 0x004000) is 00, full access OK Lock status for 0x024000 (size 0x004000) is 00, full access Lock status for 0x028000 (size 0x004000) is 01, write locked Trying to clear lock for 0x028000... Lock status for 0x028000 (size 0x004000) is 00, full access OK Lock status for 0x02c000 (size 0x004000) is 00, full access Lock status for 0x030000 (size 0x004000) is 01, write locked Trying to clear lock for 0x030000... Lock status for 0x030000 (size 0x004000) is 00, full access OK Lock status for 0x034000 (size 0x004000) is 00, full access Lock status for 0x038000 (size 0x004000) is 01, write locked Trying to clear lock for 0x038000... Lock status for 0x038000 (size 0x004000) is 00, full access OK Lock status for 0x03c000 (size 0x004000) is 00, full access Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:S, 0x001000-0x001fff:S, 0x002000-0x002fff:S, 0x003000-0x003fff:S, 0x004000-0x004fff:S, 0x005000-0x005fff:S, 0x006000-0x006fff:S, 0x007000-0x007fff:S, 0x008000-0x008fff:S, 0x009000-0x009fff:S, 0x00a000-0x00afff:S, 0x00b000-0x00bfff:S, 0x00c000-0x00cfff:S, 0x00d000-0x00dfff:S, 0x00e000-0x00efff:S, 0x00f000-0x00ffff:S, 0x010000-0x010fff:S, 0x011000-0x011fff:S, 0x012000-0x012fff:S, 0x013000-0x013fff:S, 0x014000-0x014fff:S, 0x015000-0x015fff:S, 0x016000-0x016fff:S, 0x017000-0x017fff:S, 0x018000-0x018fff:S, 0x019000-0x019fff:S, 0x01a000-0x01afff:S, 0x01b000-0x01bfff:S, 0x01c000-0x01cfff:S, 0x01d000-0x01dfff:S, 0x01e000-0x01efff:S, 0x01f000-0x01ffff:S, 0x020000-0x020fff:S, 0x021000-0x021fff:S, 0x022000-0x022fff:S, 0x023000-0x023fff:S, 0x024000-0x024fff:S, 0x025000-0x025fff:S, 0x026000-0x026fff:S, 0x027000-0x027fff:S, 0x028000-0x028fff:S, 0x029000-0x029fff:S, 0x02a000-0x02afff:S, 0x02b000-0x02bfff:S, 0x02c000-0x02cfff:S, 0x02d000-0x02dfff:S, 0x02e000-0x02efff:S, 0x02f000-0x02ffff:S, 0x030000-0x030fff:S, 0x031000-0x031fff:S, 0x032000-0x032fff:S, 0x033000-0x033fff:S, 0x034000-0x034fff:S, 0x035000-0x035fff:S, 0x036000-0x036fff:S, 0x037000-0x037fff:S, 0x038000-0x038fff:S, 0x039000-0x039fff:S, 0x03a000-0x03afff:S, 0x03b000-0x03bfff:S, 0x03c000-0x03cfff:S, 0x03d000-0x03dfff:S, 0x03e000-0x03efff:S, 0x03f000-0x03ffff:EFAILED at 0x0003f015! Expected=0xff, Found=0x20, failed byte count from 0x0003f000-0x0003ffff: 0xfbc ERASE FAILED! Reading current flash chip contents... done. Looking for another erase function. Trying erase function 1... 0x000000-0x003fff:S, 0x004000-0x007fff:S, 0x008000-0x00bfff:S, 0x00c000-0x00ffff:S, 0x010000-0x013fff:S, 0x014000-0x017fff:S, 0x018000-0x01bfff:S, 0x01c000-0x01ffff:S, 0x020000-0x023fff:S, 0x024000-0x027fff:S, 0x028000-0x02bfff:S, 0x02c000-0x02ffff:S, 0x030000-0x033fff:S, 0x034000-0x037fff:S, 0x038000-0x03bfff:S, 0x03c000-0x03ffff:EFAILED at 0x0003c000! Expected=0xff, Found=0xe8, failed byte count from 0x0003c000-0x0003ffff: 0x3e4b ERASE FAILED! Looking for another erase function. No usable erase functions left. FAILED! Uh oh. Erase/write failed. Checking if anything changed. Good. It seems nothing was changed. Writing to the flash chip apparently didn't do anything. This means we have to add special support for your board, programmer or flash chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! ------------------------------------------------------------------------------- You may now reboot or simply leave the machine running. Restoring PCI config space for 00:1f:0 reg 0x4e 2013/8/3 Maciej Pijanka <maciej.pijanka(a)agaran.kernel.pl> > On Sat, 27 Jul 2013, san wrote: > > > nie bangla > > Bez logów i lspci nikt nie wrzuci tego patcha do flashroma na stałe nawet > jako > niesprawdzonego. > > > > > > 2013/7/26 san <san(a)plusnet.pl> > > > > > właśnie się tym zajmowałem ;) > > > > > > > > > 2013/7/26 Maciej Pijanka <maciej.pijanka(a)agaran.kernel.pl> > > > > > >> On Fri, 26 Jul 2013, san wrote: > > >> > > >> > W następnym mailu napisał, ze to jednak nie zadziała. > > >> > > >> Imo można sprawdzić, jak nie zadziała, to nie zrobi nic zupełnie. > > >> > > >> > 26 lip 2013 13:21, "Maciej Pijanka" < > maciej.pijanka(a)agaran.kernel.pl> > > >> > napisał(a): > > >> > > > >> > > On Fri, 26 Jul 2013, san wrote: > > >> > > > > >> > > > Yeah, i tried to understand it about three times... > > >> > > > > > >> > > > I'll try again, tommorow. Only thing i found is > > >> > > > > > >> > > > > >> > > Trzeba wziąść zródła z SVN, nałożyć łatkę która wysłał 2 maile > temu > > >> stefan > > >> > > (w > > >> > > załaczniku), skompilować, odpalić z -V zapis (czyli -V -w <plik>) > > >> > > Plik powinien różnić się od zawartości romu czyli jakiś nowszy > jest > > >> > > potrzebny, > > >> > > bo inaczej test zapisu jest niewiarygodny. > > >> > > > > >> > > ponadto potrzebny jest wynik lspci -nnv zeby poprawić łatkę tak by > > >> działała > > >> > > tylko dla jednej konkretnej płyty a nie losowych, czyli mogła > zostać > > >> > > wrzucona > > >> > > do zródeł flashroma do repozytorium bo w takiej postaci jak w > > >> załaczniku > > >> > > nie > > >> > > może zostać commitnięta. > > >> > > > > >> > > /Cut/ > > >> > > > > >> > > > > > >> > > > but have no idea how to use it... > > >> > > > best regards. > > >> > > > > > >> > > > > > >> > > > 2013/7/25 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > > >> > > > > > >> > > > > On Thu, 25 Jul 2013 21:31:01 +0200 > > >> > > > > Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > > >> > > > > > > >> > > > > > You can also set this somehow with pciset as you know, I am > > >> just not > > >> > > > > > entirely sure about the exact commands. > > >> > > > > > you would need to get the gpiobase first with > > >> > > > > > setpci -s 00:1f.0 58.l > > >> > > > > > (only bits 6-15 are the base address see datasheet) > > >> > > > > > and then fetch the old value with > > >> > > > > > setpci -s 0:1f.0 gpiobase+0x0c > > >> > > > > > and set it with > > >> > > > > > setpci -s 0:1f.0 gpiobase+0x0c=... > > >> > > > > > > >> > > > > Actually this can't work out (thanks to Kyösti for pointing > that > > >> out). > > >> > > > > Because the gpiobase address is in the separated i/o address > > >> space of > > >> > > > > the cpu. "The control for the general purpose I/O signals is > > >> handled > > >> > > > > through a separate 64-byte I/O space." > > >> > > > > I am not aware of any distributed binaries that work similar > to > > >> setpci > > >> > > > > but in the i/o space, so you would need to program your own... > > >> like the > > >> > > > > one described here: > > >> > > > > http://flashrom.org/Board_Enable > > >> > > > > > > >> > > > > -- > > >> > > > > Kind regards/Mit freundlichen Grüßen, Stefan Tauner > > >> > > > > > > >> > > > > > >> > > > > > >> > > > > > >> > > > -- > > >> > > > [ e-San.info | San(a)plusnet.pl ] > > >> > > > > >> > > > _______________________________________________ > > >> > > > flashrom mailing list > > >> > > > flashrom(a)flashrom.org > > >> > > > http://www.flashrom.org/mailman/listinfo/flashrom > > >> > > > > >> > > > > >> > > -- > > >> > > Maciej Pijanka > > >> > > I don't fear computers, I fear lack of them -- Isaac Asimov > > >> > > > > >> > > >> -- > > >> Maciej Pijanka > > >> I don't fear computers, I fear lack of them -- Isaac Asimov > > >> > > > > > > > > > > > > -- > > > [ e-San.info | San(a)plusnet.pl ] > > > > > > > > > > > -- > > [ e-San.info | San(a)plusnet.pl ] > > -- > Maciej Pijanka > I don't fear computers, I fear lack of them -- Isaac Asimov > -- [ e-San.info | San(a)plusnet.pl ]

1 0

[PATCH] Abort on unused programmer parameters
by Carl-Daniel Hailfinger 13 Aug '13

13 Aug '13

An unused programmer parameter is a sign that the user wanted to either do something not supported by the programmer or misspelled a parameter which may be essential for the given programmer. Aborting is the only safe choice. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-abort_unused_programmer_param/flashrom.c =================================================================== --- flashrom-abort_unused_programmer_param/flashrom.c (Revision 1706) +++ flashrom-abort_unused_programmer_param/flashrom.c (Arbeitskopie) @@ -389,13 +389,14 @@ programmer_may_write = 1; programmer_param = param; - msg_pdbg("Initializing %s programmer\n", - programmer_table[programmer].name); + msg_pdbg("Initializing %s programmer\n", programmer_table[programmer].name); ret = programmer_table[programmer].init(); if (programmer_param && strlen(programmer_param)) { - msg_perr("Unhandled programmer parameters: %s\n", - programmer_param); - /* Do not error out here, the init itself was successful. */ + msg_perr("Unhandled programmer parameters: %s\n", programmer_param); + msg_perr("Aborting.\n"); + /* Do not overwrite any error code from programmer init. */ + if (!ret) + ret = ERROR_FATAL; } return ret; } -- http://www.hailfinger.org/

2 4

[commit] r1708 - trunk
by repository service 13 Aug '13

13 Aug '13

Author: hailfinger Date: Tue Aug 13 09:09:57 2013 New Revision: 1708 URL: http://flashrom.org/trac/flashrom/changeset/1708 Log: An unused programmer parameter is a sign that the user wanted to either do something not supported by the programmer or misspelled a parameter which may be essential for the given programmer. Aborting is the only safe choice. If the programmer parameter is unused because of an error during programmer init, aborting would have happened anyway due to that error. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashrom.c Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Tue Aug 13 00:58:43 2013 (r1707) +++ trunk/flashrom.c Tue Aug 13 09:09:57 2013 (r1708) @@ -392,13 +392,23 @@ programmer_may_write = 1; programmer_param = param; - msg_pdbg("Initializing %s programmer\n", - programmer_table[programmer].name); + msg_pdbg("Initializing %s programmer\n", programmer_table[programmer].name); ret = programmer_table[programmer].init(); if (programmer_param && strlen(programmer_param)) { - msg_perr("Unhandled programmer parameters: %s\n", - programmer_param); - /* Do not error out here, the init itself was successful. */ + if (ret != 0) { + /* It is quite possible that any unhandled programmer parameter would have been valid, + * but an error in actual programmer init happened before the parameter was evaluated. + */ + msg_pwarn("Unhandled programmer parameters (possibly due to another failure): %s\n", + programmer_param); + } else { + /* Actual programmer init was successful, but the user specified an invalid or unusable + * (for the current programmer configuration) parameter. + */ + msg_perr("Unhandled programmer parameters: %s\n", programmer_param); + msg_perr("Aborting.\n"); + ret = ERROR_FATAL; + } } return ret; }

1 0

[PATCH] Add a bunch of new/tested stuff and various small changes 19.
by Stefan Tauner 13 Aug '13

13 Aug '13

Tested mainboards: OK: - ASUS P8H77-V LE http://www.flashrom.org/pipermail/flashrom/2013-June/011127.html - HP Pegatron IPMEL-AE (Evans-GL6) Reported by Idwer on IRC - MSI MS-7379 (G31M) http://paste.flashrom.org/view.php?id=1726 - MSI MS-7816 (H87-G43) http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html - MSI MS-9830 (IM-945GSE-A, A9830IMS) http://paste.flashrom.org/view.php?id=1730 - Supermicro X8SAX http://paste.flashrom.org/view.php?id=1717 NOT OK: - Intel D2700MUD http://paste.flashrom.org/view.php?id=1723 - Intel DQ45CB http://www.flashrom.org/pipermail/flashrom/2013-August/011369.html Chipsets: - Add PCI ID for Intel's Coleto Creek. - Mark Intel H87 (0x8c4a) as OK. http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html Miscellaneous: - ichspi: Fix printing address ranges if space is divided by FPB. - Tiny other stuff. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- board_enable.c | 1 + chipset_enable.c | 3 ++- ichspi.c | 4 ++-- print.c | 12 ++++++++++-- programmer.h | 2 +- 5 files changed, 16 insertions(+), 6 deletions(-) diff --git a/board_enable.c b/board_enable.c index d3460c1..074cabb 100644 --- a/board_enable.c +++ b/board_enable.c @@ -2235,6 +2235,7 @@ static int it8718f_gpio63_raise(void) * Suited for all boards with ambiguous DMI chassis information, which should be * whitelisted because they are known to work: * - ASRock IMB-A180(-H) + * - Intel D945GCNL * - MSC Q7 Tunnel Creek Module (Q7-TCTC) */ static int p2_not_a_laptop(void) diff --git a/chipset_enable.c b/chipset_enable.c index 2706be4..a2df263 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1440,6 +1440,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, + {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, @@ -1511,7 +1512,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, - {0x8086, 0x8c4a, NT, "Intel", "H87", enable_flash_pch8}, + {0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8}, {0x8086, 0x8c4b, NT, "Intel", "HM87", enable_flash_pch8}, {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, diff --git a/ichspi.c b/ichspi.c index 4f6a1b1..6d1bd1a 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1210,7 +1210,7 @@ static int ich_hwseq_probe(struct flashctx *flash) } else { msg_cdbg("The flash address space (0x%06x - 0x%06x) is divided " "at address 0x%06x in two partitions.\n", - 0, size_high-1, boundary); + 0, total_size-1, boundary); size_low = total_size - size_high; erase_size_low = ich_hwseq_get_erase_block_size(0); @@ -1224,7 +1224,7 @@ static int ich_hwseq_probe(struct flashctx *flash) eraser->eraseblocks[1].size = erase_size_high; eraser->eraseblocks[1].count = size_high / erase_size_high; msg_cdbg("The second partition ranges from 0x%06x to 0x%06x.\n", - boundary, size_high-1); + boundary, total_size-1); msg_cdbg("In that range are %d erase blocks with %d B each.\n", size_high / erase_size_high, erase_size_high); } diff --git a/print.c b/print.c index 0d209c1..6766eeb 100644 --- a/print.c +++ b/print.c @@ -720,6 +720,7 @@ const struct board_info boards_known[] = { B("ASUS", "P8H67-M PRO", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8H77-I", OK, "http://www.asus.com/Motherboards/P8H77I/", NULL), B("ASUS", "P8H77-M", OK, "http://www.asus.com/Motherboards/P8H77M/", NULL), + B("ASUS", "P8H77-V LE", OK, "http://www.asus.com/Motherboards/P8H77V_LE/", NULL), B("ASUS", "P8P67 (rev. 3.1)", BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("ASUS", "P8P67 LE (B2)", OK, NULL, NULL), B("ASUS", "P8P67 LE (B3)", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -850,6 +851,7 @@ const struct board_info boards_known[] = { B("GIGABYTE", "GA-Z77MX-D3H", BAD, "http://www.gigabyte.com/products/product-page.aspx?pid=4145", "Uses MX25L6436E and requires a small patch (but works flawlessly with that)."), B("HP", "8100 Elite CMT PC (304Bh)", BAD, NULL, "SPI lock down, PR, read-only descriptor, locked ME region."), B("HP", "e-Vectra P2706T", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&pro…", NULL), + B("HP", "Evans-GL6 (Pegatron IPMEL-AE)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?cc=us&lc=en&dlc=en&docname=c019…", "Found in HP Pavilion Slimline s5220f."), B("HP", "ProLiant DL145 G3", OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c008…", NULL), B("HP", "ProLiant DL165 G6", OK, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-33…", NULL), B("HP", "ProLiant N40L", OK, NULL, NULL), @@ -866,6 +868,7 @@ const struct board_info boards_known[] = { B("IBM", "x3455", OK, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL), B("IEI", "PICOe-9452", OK, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&…", NULL), B("Intel", "D201GLY", OK, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL), + B("Intel", "D2700MUD", BAD, "http://www.intel.com/cd/products/services/emea/eng/motherboards/desktop/D27…", "SMM protection enabled"), B("Intel", "D425KT", BAD, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/de…", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"), B("Intel", "D865GLC", BAD, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"), B("Intel", "D945GCNL", OK, NULL, NULL), @@ -876,6 +879,7 @@ const struct board_info boards_known[] = { B("Intel", "DH67CF", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"), B("Intel", "DH67CL", BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html"), B("Intel", "DN2800MT (Marshalltown)", BAD, NULL, "BIOS locked via BIOS_CNTL."), + B("Intel", "DQ45CB", BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Intel", "DQ77MK", BAD, NULL, "Q77 with BIOS lock enable and locked ME region, see http://paste.flashrom.org/view.php?id=1603"), B("Intel", "EP80759", OK, NULL, NULL), B("Intel", "Foxhollow", OK, NULL, "Intel reference board."), @@ -927,8 +931,9 @@ const struct board_info boards_known[] = { B("MSI", "MS-7368 (K9AG Neo2-Digital)", OK, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL), B("MSI", "MS-7369 (K9N Neo V2)", OK, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL), B("MSI", "MS-7376 (K9A2 Platinum V1)", OK, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL), + B("MSI", "MS-7379 (G31M)", OK, "http://www.msi.com/product/mb/G31M.html", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", OK, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), - B("MSI", "MS-7529 (G31TM-P21)", OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), + B("MSI", "MS-7529 (G31TM-P21)", OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL), B("MSI", "MS-7548 (Aspen-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&d…", NULL), B("MSI", "MS-7551 (KA780G)", OK, "http://www.msi.com/product/mb/KA780G.html", NULL), B("MSI", "MS-7596 (785GM-E51)", OK, "http://www.msi.com/product/mb/785GM-E51.html", NULL), @@ -945,6 +950,8 @@ const struct board_info boards_known[] = { B("MSI", "MS-7740 (H61MA-E35(B3))", OK, "http://www.msi.com/product/mb/H61MA-E35--B3-.html", NULL), B("MSI", "MS-7756 (H77MA-G43)", OK, "http://www.msi.com/product/mb/H77MA-G43.html", NULL), B("MSI", "MS-7808 (B75MA-E33)", OK, "http://www.msi.com/product/mb/B75MA-E33.html", NULL), + B("MSI", "MS-7816 (H87-G43)", OK, "http://www.msi.com/product/mb/H87-G43.html", NULL), + B("MSI", "MS-9830 (IM-945GSE-A, A9830IMS)", OK, "http://www.msi.com/product/ipc/IM-945GSE-A.html", NULL), B("NEC", "PowerMate 2000", OK, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL), B("Nokia", "IP530", OK, NULL, NULL), B("Palit", "N61S", OK, NULL, NULL), @@ -993,6 +1000,7 @@ const struct board_info boards_known[] = { B("Supermicro", "X8DTT-HIBQF", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL), B("Supermicro", "X8DTU-6TF+", BAD, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&…", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Supermicro", "X8DTU-F", OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL), + B("Supermicro", "X8SAX", OK, "http://www.supermicro.com/products/motherboard/xeon3000/x58/x8sax.cfm", NULL), B("Supermicro", "X8SIE(-F)", BAD, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI…", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."), B("Supermicro", "X8STi", OK, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL), B("Supermicro", "X9DR3-F", BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9dr3-f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), @@ -1073,7 +1081,7 @@ const struct board_info laptops_known[] = { B("Acer", "Aspire 1520", OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspir…", NULL), B("Acer", "Aspire One", BAD, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"), B("ASUS", "A8Jm", OK, NULL, NULL), - B("ASUS", "Eee PC 701 4G", BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), + B("ASUS", "Eee PC 701 4G", BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."), B("ASUS", "M6Ne", NT, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."), B("Clevo", "P150HM", BAD, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), B("Dell", "Inspiron 1420", OK, NULL, NULL), diff --git a/programmer.h b/programmer.h index f03eac3..4db8d58 100644 --- a/programmer.h +++ b/programmer.h @@ -572,7 +572,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, enum ich_chipset ich_generation); int via_init_spi(struct pci_dev *dev, uint32_t mmio_base); -/* imc.c */ +/* amd_imc.c */ int amd_imc_shutdown(struct pci_dev *dev); /* it85spi.c */ -- Kind regards, Stefan Tauner

1 0

Re: [flashrom] [PATCH] Fix verification operation.
by Carl-Daniel Hailfinger 13 Aug '13

13 Aug '13

Am 12.08.2013 02:00 schrieb Stefan Tauner: > I broke this in r1702 where I enabled avoidance of the verification step if > we did not modify anything in the erase/write step. The problem is that > all_skipped is initialized to true and hence it would only ever verify if > there have been changes noted in the erase/write step. This obviously > breaks the verification operation (-v/--verify) because there we never > enter the erase/write loop. > > The better alternative would be to enable (the implicit) verification > in the write loop and not in cli_classic.c. This would require a bigger > change due to the existance of dont_verify_it. Eventually this is the > right thing to do but not so shortly before a release. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > diff --git a/flashrom.c b/flashrom.c > index db5b1c7..41e7bd8 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -335,6 +335,9 @@ struct shutdown_func_data { > */ > static int may_register_shutdown = 0; > > +/* Did we change something or was every erase/write skipped (if any)? */ > +static bool all_skipped = true; This static variable will be a PITA for libflashrom. We should move it into struct flashctx after the release. > + > static int check_block_eraser(const struct flashctx *flash, int k, int log); > > /* Register a function to be executed on programmer shutdown. > @@ -1309,7 +1312,6 @@ static int selfcheck_eraseblocks(const struct flashchip *chip) > return ret; > } > > -static bool all_skipped = true; > static int erase_and_write_block_helper(struct flashctx *flash, > unsigned int start, unsigned int len, > uint8_t *curcontents, Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1707 - trunk
by repository service 13 Aug '13

13 Aug '13

Author: stefanct Date: Tue Aug 13 00:58:43 2013 New Revision: 1707 URL: http://flashrom.org/trac/flashrom/changeset/1707 Log: Fix verification operation. I broke this in r1702 where I enabled avoidance of the verification step if we did not modify anything in the erase/write step. The problem is that all_skipped is initialized to true and hence it would only ever verify if there have been changes noted in the erase/write step. This obviously breaks the verification operation (-v/--verify) because there we never enter the erase/write loop. The better alternative would be to enable (the implicit) verification in the write loop and not in cli_classic.c. This would require a bigger change due to the existance of dont_verify_it. Eventually this is the right thing to do but not so shortly before a release. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/cli_classic.c trunk/flashrom.c Modified: trunk/cli_classic.c ============================================================================== --- trunk/cli_classic.c Thu Aug 8 14:00:19 2013 (r1706) +++ trunk/cli_classic.c Tue Aug 13 00:58:43 2013 (r1707) @@ -175,8 +175,7 @@ cli_classic_abort_usage(); } if (dont_verify_it) { - fprintf(stderr, "--verify and --noverify are" - "mutually exclusive. Aborting.\n"); + fprintf(stderr, "--verify and --noverify are mutually exclusive. Aborting.\n"); cli_classic_abort_usage(); } filename = strdup(optarg); @@ -184,8 +183,7 @@ break; case 'n': if (verify_it) { - fprintf(stderr, "--verify and --noverify are" - "mutually exclusive. Aborting.\n"); + fprintf(stderr, "--verify and --noverify are mutually exclusive. Aborting.\n"); cli_classic_abort_usage(); } dont_verify_it = 1; Modified: trunk/flashrom.c ============================================================================== --- trunk/flashrom.c Thu Aug 8 14:00:19 2013 (r1706) +++ trunk/flashrom.c Tue Aug 13 00:58:43 2013 (r1707) @@ -335,6 +335,9 @@ */ static int may_register_shutdown = 0; +/* Did we change something or was every erase/write skipped (if any)? */ +static bool all_skipped = true; + static int check_block_eraser(const struct flashctx *flash, int k, int log); /* Register a function to be executed on programmer shutdown. @@ -1309,7 +1312,6 @@ return ret; } -static bool all_skipped = true; static int erase_and_write_block_helper(struct flashctx *flash, unsigned int start, unsigned int len, uint8_t *curcontents, @@ -1995,7 +1997,8 @@ } } - if (verify_it && !all_skipped) { + /* Verify only if we either did not try to write (verify operation) or actually changed something. */ + if (verify_it && (!write_it || !all_skipped)) { msg_cinfo("Verifying flash... "); if (write_it) {

1 0

Re: [flashrom] [PATCH] Fix ROM decoding on VIA VT82C596 and VT82C686A/B.
by Carl-Daniel Hailfinger 12 Aug '13

12 Aug '13

Am 11.08.2013 22:00 schrieb Stefan Tauner: > These support an additional bit which we did not turn on yet. > Without this patch they decode up to 512 kB, with this up to 1 MB. > Also, add some more debug output. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> If you're changing the available decode window, you should adjust max_rom_decode.parallel (or can those things do LPC/FWH as well?) to match the code and to have flashrom warn about too big chips. Regards, Carl-Daniel -- http://www.hailfinger.org/

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