flashrom

flashrom@flashrom.org

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[PATCH 2/3] Refine handling chips that exceed maximum programmer sizes.
by Stefan Tauner 08 Aug '14

08 Aug '14

- Change check_max_decode() to return the number of (common) busses where the flash chip exceeds the supported size of the programmer. - Refine its signature to use a flashctx pointer only. - Move CLI-related bits to cli_classic.c. - Rename check_max_decode() to count_max_decode_exceedings() to better reflect what it (now) really does. - Refine the messages printed by the caller to better integrate with the new setup, and simplify them. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- cli_classic.c | 16 ++++++++++++---- flashrom.c | 24 ++++++++---------------- programmer.h | 2 +- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/cli_classic.c b/cli_classic.c index 60b8b88..8034287 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -91,7 +91,6 @@ static int check_filename(char *filename, char *type) int main(int argc, char *argv[]) { - unsigned long size; /* Probe for up to three flash chips. */ const struct flashchip *chip = NULL; struct flashctx flashes[6] = {{0}}; @@ -501,9 +500,18 @@ int main(int argc, char *argv[]) check_chip_supported(fill_flash->chip); - size = fill_flash->chip->total_size * 1024; - if (check_max_decode(fill_flash->mst->buses_supported & fill_flash->chip->bustype, size) && (!force)) { - msg_cerr("Chip is too big for this programmer (-V gives details). Use --force to override.\n"); + unsigned int limitexceeded = count_max_decode_exceedings(fill_flash); + if (limitexceeded > 0 && !force) { + enum chipbustype commonbuses = fill_flash->mst->buses_supported & fill_flash->chip->bustype; + + /* Sometimes chip and programmer have more than one bus in common, + * and the limit is not exceeded on all buses. Tell the user. */ + if ((bitcount(commonbuses) > limitexceeded)) { + msg_pdbg("There is at least one interface available which could support the size of\n" + "the selected flash chip.\n"); + } + msg_cerr("This flash chip is too big for this programmer (--verbose/-V gives details).\n" + "Use --force/-f to override at your own risk.\n"); ret = 1; goto out_shutdown; } diff --git a/flashrom.c b/flashrom.c index eeed90b..0ff6b63 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1009,9 +1009,13 @@ int generate_testpattern(uint8_t *buf, uint32_t size, int variant) return 0; } -int check_max_decode(enum chipbustype buses, uint32_t size) +/* Returns the number of busses commonly supported by the current programmer and flash chip where the latter + * can not be completely accessed due to size/address limits of the programmer. */ +unsigned int count_max_decode_exceedings(struct flashctx *flash) { - int limitexceeded = 0; + unsigned int limitexceeded = 0; + uint32_t size = flash->chip->total_size * 1024; + enum chipbustype buses = flash->mst->buses_supported & flash->chip->bustype; if ((buses & BUS_PARALLEL) && (max_rom_decode.parallel < size)) { limitexceeded++; @@ -1045,17 +1049,7 @@ int check_max_decode(enum chipbustype buses, uint32_t size) "probe/read/erase/write may fail. ", size / 1024, max_rom_decode.spi / 1024, "SPI"); } - if (!limitexceeded) - return 0; - /* Sometimes chip and programmer have more than one bus in common, - * and the limit is not exceeded on all buses. Tell the user. - */ - if (bitcount(buses) > limitexceeded) - /* FIXME: This message is designed towards CLI users. */ - msg_pdbg("There is at least one common chip/programmer " - "interface which can support a chip of this size. " - "You can try --force at your own risk.\n"); - return 1; + return limitexceeded; } int probe_flash(struct registered_master *mst, int startchip, struct flashctx *flash, int force) @@ -1079,9 +1073,6 @@ int probe_flash(struct registered_master *mst, int startchip, struct flashctx *f continue; } - size = chip->total_size * 1024; - check_max_decode(buses_common, size); - /* Start filling in the dynamic data. */ flash->chip = calloc(1, sizeof(struct flashchip)); if (!flash->chip) { @@ -1091,6 +1082,7 @@ int probe_flash(struct registered_master *mst, int startchip, struct flashctx *f memcpy(flash->chip, chip, sizeof(struct flashchip)); flash->mst = mst; + size = chip->total_size * 1024; base = flashbase ? flashbase : (0xffffffff - size + 1); flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size); diff --git a/programmer.h b/programmer.h index 62acfeb..7b0e77f 100644 --- a/programmer.h +++ b/programmer.h @@ -513,7 +513,7 @@ struct decode_sizes { extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -int check_max_decode(enum chipbustype buses, uint32_t size); +unsigned int count_max_decode_exceedings(struct flashctx *flash); char *extract_programmer_param(const char *param_name); /* spi.c */ -- Kind regards, Stefan Tauner

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[PATCH 1/3] Refactor some CLI-relevant parts.
by Stefan Tauner 08 Aug '14

08 Aug '14

Begin to move functions that clearly belong to the (command line) user interface out of flashrom's core files like flashrom.c. - Refine messages within check_chip_supported() and move it to newly created cli_common.c. - Move flashbuses_to_text() to cli_common.c as well. - Move global verbosity variables to cli_output.c. --- Other things that should be moved elsewhere because they do not embody core functionality but dictate command syntax and thereby become part of the UI: board_parse_parameter(), all code regarding extract_programmer_param (the parameters should be stored in a machine-readable form in struct flashctx instead), TBC Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> --- Makefile | 2 +- cli_common.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ cli_output.c | 3 ++ flash.h | 9 +++-- flashrom.c | 70 ----------------------------------- print.c | 33 ----------------- programmer.h | 1 - 7 files changed, 127 insertions(+), 108 deletions(-) create mode 100644 cli_common.c diff --git a/Makefile b/Makefile index d0d6454..98230a5 100644 --- a/Makefile +++ b/Makefile @@ -363,7 +363,7 @@ LIB_OBJS = layout.o flashrom.o udelay.o programmer.o helpers.o ############################################################################### # Frontend related stuff. -CLI_OBJS = cli_classic.o cli_output.o print.o +CLI_OBJS = cli_classic.o cli_output.o cli_common.o print.o # Set the flashrom version string from the highest revision number of the checked out flashrom files. # Note to packagers: Any tree exported with "make export" or "make tarball" diff --git a/cli_common.c b/cli_common.c new file mode 100644 index 0000000..078c1f8 --- /dev/null +++ b/cli_common.c @@ -0,0 +1,117 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2011-2014 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include "flash.h" + +/* + * Return a string corresponding to the bustype parameter. + * Memory is obtained with malloc() and must be freed with free() by the caller. + */ +char *flashbuses_to_text(enum chipbustype bustype) +{ + char *ret = calloc(1, 1); + /* + * FIXME: Once all chipsets and flash chips have been updated, NONSPI + * will cease to exist and should be eliminated here as well. + */ + if (bustype == BUS_NONSPI) { + ret = strcat_realloc(ret, "Non-SPI, "); + } else { + if (bustype & BUS_PARALLEL) + ret = strcat_realloc(ret, "Parallel, "); + if (bustype & BUS_LPC) + ret = strcat_realloc(ret, "LPC, "); + if (bustype & BUS_FWH) + ret = strcat_realloc(ret, "FWH, "); + if (bustype & BUS_SPI) + ret = strcat_realloc(ret, "SPI, "); + if (bustype & BUS_PROG) + ret = strcat_realloc(ret, "Programmer-specific, "); + if (bustype == BUS_NONE) + ret = strcat_realloc(ret, "None, "); + } + /* Kill last comma. */ + ret[strlen(ret) - 2] = '\0'; + ret = realloc(ret, strlen(ret) + 1); + return ret; +} + + +void check_chip_supported(const struct flashchip *chip) +{ + if (chip->feature_bits & FEATURE_OTP) { + msg_cdbg("This chip may contain one-time programmable memory. flashrom cannot read\n" + "and may never be able to write it, hence it may not be able to completely\n" + "clone the contents of this chip (see man page for details).\n"); + } + + if ((chip->tested.erase == NA) && (chip->tested.write == NA)) { + msg_cdbg("This chip's main memory can not be erased/written by design.\n"); + } + + if ((chip->tested.probe == BAD) || (chip->tested.probe == NT) || + (chip->tested.read == BAD) || (chip->tested.read == NT) || + (chip->tested.erase == BAD) || (chip->tested.erase == NT) || + (chip->tested.write == BAD) || (chip->tested.write == NT)){ + msg_cinfo("===\n"); + if ((chip->tested.probe == BAD) || + (chip->tested.read == BAD) || + (chip->tested.erase == BAD) || + (chip->tested.write == BAD)) { + msg_cinfo("This flash part has status NOT WORKING for operations:"); + if (chip->tested.probe == BAD) + msg_cinfo(" PROBE"); + if (chip->tested.read == BAD) + msg_cinfo(" READ"); + if (chip->tested.erase == BAD) + msg_cinfo(" ERASE"); + if (chip->tested.write == BAD) + msg_cinfo(" WRITE"); + msg_cinfo("\n"); + } + if ((chip->tested.probe == NT) || + (chip->tested.read == NT) || + (chip->tested.erase == NT) || + (chip->tested.write == NT)) { + msg_cinfo("This flash part has status UNTESTED for operations:"); + if (chip->tested.probe == NT) + msg_cinfo(" PROBE"); + if (chip->tested.read == NT) + msg_cinfo(" READ"); + if (chip->tested.erase == NT) + msg_cinfo(" ERASE"); + if (chip->tested.write == NT) + msg_cinfo(" WRITE"); + msg_cinfo("\n"); + } + msg_cinfo("The test status of this chip may have been updated in the latest development\n" + "version of flashrom. If you are running the latest development version,\n" + "please email a report to flashrom(a)flashrom.org if any of the above operations\n" + "work correctly for you with this flash chip. Please include the flashrom log\n" + "file for all operations you tested (see the man page for details), and mention\n" + "which mainboard or programmer you tested in the subject line.\n" + "Thanks for your help!\n"); + } +} + diff --git a/cli_output.c b/cli_output.c index 5eff1c0..feafbd2 100644 --- a/cli_output.c +++ b/cli_output.c @@ -25,6 +25,9 @@ #include <errno.h> #include "flash.h" +int verbose_screen = MSG_INFO; +int verbose_logfile = MSG_DEBUG2; + #ifndef STANDALONE static FILE *logfile = NULL; diff --git a/flash.h b/flash.h index 8271da9..82a8b74 100644 --- a/flash.h +++ b/flash.h @@ -238,7 +238,6 @@ uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr); void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); /* print.c */ -char *flashbuses_to_text(enum chipbustype bustype); int print_supported(void); void print_supported_wiki(void); @@ -251,8 +250,6 @@ char *strcat_realloc(char *dest, const char *src); void tolower_string(char *str); /* flashrom.c */ -extern int verbose_screen; -extern int verbose_logfile; extern const char flashrom_version[]; extern const char *chip_to_probe; void map_flash_registers(struct flashctx *flash); @@ -285,7 +282,13 @@ int write_buf_to_file(const unsigned char *buf, unsigned long size, const char * */ #define ERROR_FLASHROM_LIMIT -201 +/* cli_common.c */ +char *flashbuses_to_text(enum chipbustype bustype); +void check_chip_supported(const struct flashchip *chip); + /* cli_output.c */ +extern int verbose_screen; +extern int verbose_logfile; #ifndef STANDALONE int open_logfile(const char * const filename); int close_logfile(void); diff --git a/flashrom.c b/flashrom.c index 3f29e6d..eeed90b 100644 --- a/flashrom.c +++ b/flashrom.c @@ -42,11 +42,8 @@ const char flashrom_version[] = FLASHROM_VERSION; const char *chip_to_probe = NULL; -int verbose_screen = MSG_INFO; -int verbose_logfile = MSG_DEBUG2; static enum programmer programmer = PROGRAMMER_INVALID; - static const char *programmer_param = NULL; /* @@ -1783,73 +1780,6 @@ int selfcheck(void) return ret; } -void check_chip_supported(const struct flashchip *chip) -{ - if (chip->feature_bits & FEATURE_OTP) { - msg_cdbg("This chip may contain one-time programmable memory. " - "flashrom cannot read\nand may never be able to write " - "it, hence it may not be able to completely\n" - "clone the contents of this chip (see man page for " - "details).\n"); - } - - if ((chip->tested.erase == NA) && (chip->tested.write == NA)) { - msg_cdbg("This chip's main memory can not be erased/written by design.\n"); - } - - if ((chip->tested.probe == BAD) || (chip->tested.probe == NT) || - (chip->tested.read == BAD) || (chip->tested.read == NT) || - (chip->tested.erase == BAD) || (chip->tested.erase == NT) || - (chip->tested.write == BAD) || (chip->tested.write == NT)){ - msg_cinfo("===\n"); - if ((chip->tested.probe == BAD) || - (chip->tested.read == BAD) || - (chip->tested.erase == BAD) || - (chip->tested.write == BAD)) { - msg_cinfo("This flash part has status NOT WORKING for operations:"); - if (chip->tested.probe == BAD) - msg_cinfo(" PROBE"); - if (chip->tested.read == BAD) - msg_cinfo(" READ"); - if (chip->tested.erase == BAD) - msg_cinfo(" ERASE"); - if (chip->tested.write == BAD) - msg_cinfo(" WRITE"); - msg_cinfo("\n"); - } - if ((chip->tested.probe == NT) || - (chip->tested.read == NT) || - (chip->tested.erase == NT) || - (chip->tested.write == NT)) { - msg_cinfo("This flash part has status UNTESTED for operations:"); - if (chip->tested.probe == NT) - msg_cinfo(" PROBE"); - if (chip->tested.read == NT) - msg_cinfo(" READ"); - if (chip->tested.erase == NT) - msg_cinfo(" ERASE"); - if (chip->tested.write == NT) - msg_cinfo(" WRITE"); - msg_cinfo("\n"); - } - /* FIXME: This message is designed towards CLI users. */ - msg_cinfo("The test status of this chip may have been updated " - "in the latest development\n" - "version of flashrom. If you are running the latest " - "development version,\n" - "please email a report to flashrom(a)flashrom.org if " - "any of the above operations\n" - "work correctly for you with this flash part. Please " - "include the flashrom\n" - "output with the additional -V option for all " - "operations you tested (-V, -Vr,\n" - "-VE, -Vw), and mention which mainboard or " - "programmer you tested.\n" - "Please mention your board in the subject line. " - "Thanks for your help!\n"); - } -} - /* FIXME: This function signature needs to be improved once doit() has a better * function signature. */ diff --git a/print.c b/print.c index b1faea7..243aa49 100644 --- a/print.c +++ b/print.c @@ -59,39 +59,6 @@ static const char *test_state_to_text(enum test_state test_state) } } -/* - * Return a string corresponding to the bustype parameter. - * Memory is obtained with malloc() and must be freed with free() by the caller. - */ -char *flashbuses_to_text(enum chipbustype bustype) -{ - char *ret = calloc(1, 1); - /* - * FIXME: Once all chipsets and flash chips have been updated, NONSPI - * will cease to exist and should be eliminated here as well. - */ - if (bustype == BUS_NONSPI) { - ret = strcat_realloc(ret, "Non-SPI, "); - } else { - if (bustype & BUS_PARALLEL) - ret = strcat_realloc(ret, "Parallel, "); - if (bustype & BUS_LPC) - ret = strcat_realloc(ret, "LPC, "); - if (bustype & BUS_FWH) - ret = strcat_realloc(ret, "FWH, "); - if (bustype & BUS_SPI) - ret = strcat_realloc(ret, "SPI, "); - if (bustype & BUS_PROG) - ret = strcat_realloc(ret, "Programmer-specific, "); - if (bustype == BUS_NONE) - ret = strcat_realloc(ret, "None, "); - } - /* Kill last comma. */ - ret[strlen(ret) - 2] = '\0'; - ret = realloc(ret, strlen(ret) + 1); - return ret; -} - static int print_supported_chips(void) { const char *delim = "/"; diff --git a/programmer.h b/programmer.h index 3ad553a..62acfeb 100644 --- a/programmer.h +++ b/programmer.h @@ -513,7 +513,6 @@ struct decode_sizes { extern struct decode_sizes max_rom_decode; extern int programmer_may_write; extern unsigned long flashbase; -void check_chip_supported(const struct flashchip *chip); int check_max_decode(enum chipbustype buses, uint32_t size); char *extract_programmer_param(const char *param_name); -- Kind regards, Stefan Tauner

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[PATCH 0/3] Probing rewrite 2nd try - prefix
by Stefan Tauner 08 Aug '14

08 Aug '14

While creating a sane foundation to build the new probing upon the following patches were conceived. I'll rebase my probing patches on top of them hence they need to be reviewed before the refined probing patches to come. Especially the last one is rather important anyway because it fixes the problem of wrongly mapped flash memory ranges for SPI chips that provokes nasty warnings since a while ago. Stefan Tauner (3): Refactor some CLI-relevant parts. Refine handling chips that exceed maximum programmer sizes. Refine physical address mapping of flash chips. 82802ab.c | 2 - Makefile | 2 +- cli_classic.c | 16 ++++-- cli_common.c | 117 ++++++++++++++++++++++++++++++++++++++ cli_output.c | 3 + flash.h | 10 ++-- flashrom.c | 176 +++++++++++++++++++++++----------------------------------- jedec.c | 6 -- print.c | 33 ----------- programmer.h | 3 +- 10 files changed, 210 insertions(+), 158 deletions(-) create mode 100644 cli_common.c -- Kind regards, Stefan Tauner

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CHIPSET: ASRock N68-S
by tarqui＠aruba.it 08 Aug '14

08 Aug '14

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ASRock N68-S: flashrom -V
by tarqui＠aruba.it 08 Aug '14

08 Aug '14

# flashrom flashrom v0.9.5.2-r1546 on Linux 3.2.0-4-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA MCP61". Enabling flash write... This chipset is not really supported yet. Guesswork... Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. WARNING: unexpected second chipset match: "NVIDIA MCP61" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. # # # # flashrom -V flashrom v0.9.5.2-r1546 on Linux 3.2.0-4-amd64 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.1.7, GCC 4.6.2, little endian Command line (1 args): flashrom -V Calibrating delay loop... OS timer resolution is 1 usecs, 1392M loops per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 995 us, 10000 myus = 10085 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To Be Filled By O.E.M." DMI string system-product-name: "To Be Filled By O.E.M." DMI string system-version: "To Be Filled By O.E.M." DMI string baseboard-manufacturer: "ASRock" DMI string baseboard-product-name: "N68-S" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP61" with PCI ID 10de:03e1. Enabling flash write... This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:03eb at 00:01:1 MCP SPI BAR is at 0xfec80000 Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. WARNING: unexpected second chipset match: "NVIDIA MCP61" ignoring, please report lspci and board URL to flashrom(a)flashrom.org with 'CHIPSET: your board name' in the subject line. The following protocols are supported: LPC. Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT49LH002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. Restoring PCI config space for 00:01:0 reg 0x6d Restoring PCI config space for 00:01:0 reg 0x90 Restoring PCI config space for 00:01:0 reg 0x8c Restoring PCI config space for 00:01:0 reg 0x88 #

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Re: [flashrom] [PATCH] Unify non-shifted and shifted JEDEC access.
by Stefan Tauner 08 Aug '14

08 Aug '14

On Thu, 7 Aug 2014 23:49:57 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use > normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit) > for 8-bit mode. Some programmers can access them in 16-bit mode, but on > all flashrom-supported programmers so far, we access them in 8-bit mode. > This means we have to shift the addresses but apart from the addresses > we can share the code. > > This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED > flag in common JEDEC functions and applying the right addresses respectively. > > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> > --- > > I have removed the obsolete code, changed the probe_timing field to 10 > plus a comment explaining it where relevant, applied the changes to a > few other chips that probably were not there before, and refined the > shift handling as discussed on IRC. Acked by Carl-Daniel and committed in r1840. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Flashed BIOS on M4N78 SE
by Dima Veselov 08 Aug '14

08 Aug '14

Hello! I have recently used flashrom on Asus M4N78SE motherboard. Flashrom advised me to send logs. Everything worked as expected. -- Sincerelly yours

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[commit] r1840 - trunk
by repository service 08 Aug '14

08 Aug '14

Author: stefanct Date: Fri Aug 8 10:33:01 2014 New Revision: 1840 URL: http://flashrom.org/trac/flashrom/changeset/1840 Log: Unify non-shifted and shifted JEDEC access. Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit) for 8-bit mode. Some programmers can access them in 16-bit mode, but on all flashrom-supported programmers so far, we access them in 8-bit mode. This means we have to shift the addresses but apart from the addresses we can share the code. This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED flag in common JEDEC functions and applying the right addresses respectively. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Deleted: trunk/m29f400bt.c Modified: trunk/82802ab.c trunk/Makefile trunk/chipdrivers.h trunk/en29lv640b.c trunk/flashchips.c trunk/jedec.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Wed Aug 6 17:09:15 2014 (r1839) +++ trunk/82802ab.c Fri Aug 8 10:33:01 2014 (r1840) @@ -44,7 +44,7 @@ { chipaddr bios = flash->virtual_memory; uint8_t id1, id2, flashcontent1, flashcontent2; - int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) != 0; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; /* Reset to get a clean state */ chip_writeb(flash, 0xFF, bios); Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Wed Aug 6 17:09:15 2014 (r1839) +++ trunk/Makefile Fri Aug 8 10:33:01 2014 (r1840) @@ -351,7 +351,7 @@ # Flash chip drivers and bus support infrastructure. CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ - sst28sf040.o m29f400bt.o 82802ab.o \ + sst28sf040.o 82802ab.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ opaque.o sfdp.o en29lv640b.o at45db.o Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Wed Aug 6 17:09:15 2014 (r1839) +++ trunk/chipdrivers.h Fri Aug 8 10:33:01 2014 (r1840) @@ -155,10 +155,6 @@ int printlock_regspace2_block_eraser_0(struct flashctx *flash); int printlock_regspace2_block_eraser_1(struct flashctx *flash); -/* m29f400bt.c */ -int probe_m29f400bt(struct flashctx *flash); -int write_m29f400bt(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); - /* sst28sf040.c */ int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size); @@ -197,8 +193,6 @@ /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); -int erase_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len); -int erase_chip_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len); int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); #endif /* !__CHIPDRIVERS_H__ */ Modified: trunk/en29lv640b.c ============================================================================== --- trunk/en29lv640b.c Wed Aug 6 17:09:15 2014 (r1839) +++ trunk/en29lv640b.c Fri Aug 8 10:33:01 2014 (r1840) @@ -85,51 +85,3 @@ return 0; } - -static int erase_chip_shifted_jedec(struct flashctx *flash) -{ - chipaddr bios = flash->virtual_memory; - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x80, bios + 0xAAA); - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x10, bios + 0xAAA); - - programmer_delay(10); - toggle_ready_jedec(flash, bios); - - /* FIXME: Check the status register for errors. */ - return 0; -} - -int erase_block_shifted_jedec(struct flashctx *flash, unsigned int start, unsigned int len) -{ - chipaddr bios = flash->virtual_memory; - chipaddr dst = bios + start; - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x80, bios + 0xAAA); - - chip_writeb(flash, 0xAA, bios + 0xAAA); - chip_writeb(flash, 0x55, bios + 0x555); - chip_writeb(flash, 0x30, dst); - - programmer_delay(10); - toggle_ready_jedec(flash, bios); - - /* FIXME: Check the status register for errors. */ - return 0; -} - -int erase_chip_block_shifted_jedec(struct flashctx *flash, unsigned int address, unsigned int blocklen) -{ - if ((address != 0) || (blocklen != flash->chip->total_size * 1024)) { - msg_cerr("%s called with incorrect arguments\n", __func__); - return -1; - } - return erase_chip_shifted_jedec(flash); -} Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Wed Aug 6 17:09:15 2014 (r1839) +++ trunk/flashchips.c Fri Aug 8 10:33:01 2014 (r1840) @@ -4869,7 +4869,7 @@ .model_id = EON_EN29LV640B, .total_size = 8192, .page_size = 8192, - .feature_bits = 0, + .feature_bits = FEATURE_ADDR_SHIFTED, .tested = TEST_OK_PREW, .probe = probe_en29lv640b, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ @@ -4880,10 +4880,10 @@ {8 * 1024, 8}, {64 * 1024, 127}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_block_jedec, }, { .eraseblocks = { {8 * 1024 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, .write = write_en29lv640b, @@ -5078,10 +5078,10 @@ .model_id = FUJITSU_MBM29F400BC, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = 10, // FIXME: check datasheet. Using the 10 us from probe_m29f400bt .block_erasers = { { @@ -5091,13 +5091,13 @@ {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4750, 5250}, /* 4.75-5.25V for type -55, others 4.5-5.5V */ }, @@ -5110,10 +5110,10 @@ .model_id = FUJITSU_MBM29F400TC, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = 10, // FIXME: check datasheet. Using the 10 us from probe_m29f400bt .block_erasers = { { @@ -5123,13 +5123,13 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4750, 5250}, /* 4.75-5.25V for type -55, others 4.5-5.5V */ }, @@ -5144,8 +5144,8 @@ .page_size = 0, .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, + .probe = probe_jedec, + .probe_timing = 10, // FIXME: check datasheet. Using the 10 us from probe_m29f400bt .block_erasers = { { @@ -5155,13 +5155,13 @@ {32 * 1024, 1}, {64 * 1024, 31}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_block_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, - .write = write_m29f400bt, /* Supports a fast mode too */ + .write = write_jedec_1, /* Supports a fast mode too */ .read = read_memmapped, .voltage = {3000, 3600}, /* 3.0-3.6V for type -70, others 2.7-3.6V */ }, @@ -5176,8 +5176,8 @@ .page_size = 0, .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, + .probe = probe_jedec, + .probe_timing = 10, // FIXME: check datasheet. Using the 10 us from probe_m29f400bt .block_erasers = { { @@ -5187,13 +5187,13 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_block_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, - .write = write_m29f400bt, /* Supports a fast mode too */ + .write = write_jedec_1, /* Supports a fast mode too */ .read = read_memmapped, .voltage = {3000, 3600}, /* 3.0-3.6V for type -70, others 2.7-3.6V */ }, @@ -12178,10 +12178,10 @@ .model_id = ST_M29F400BB, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = 10, // FIXME: check datasheet. Using the 10 us from probe_m29f400bt .block_erasers = { { @@ -12191,13 +12191,13 @@ {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, } }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4500, 5500}, }, @@ -12210,10 +12210,10 @@ .model_id = ST_M29F400BT, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = 10, // FIXME: check datasheet. Using the 10 us from probe_m29f400bt .block_erasers = { { @@ -12223,13 +12223,13 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, } }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4500, 5500}, }, Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Wed Aug 6 17:09:15 2014 (r1839) +++ trunk/jedec.c Fri Aug 8 10:33:01 2014 (r1840) @@ -4,7 +4,7 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2006 Giampiero Giancipoli <gianci(a)email.it> * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> - * Copyright (C) 2007, 2011 Carl-Daniel Hailfinger + * Copyright (C) 2007-2012 Carl-Daniel Hailfinger * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * Copyright (C) 2014 Stefan Tauner * @@ -116,9 +116,11 @@ static void start_program_jedec_common(const struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); - chip_writeb(flash, 0xA0, bios + (0x5555 & mask)); + bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); + + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); + chip_writeb(flash, 0xA0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); } int probe_jedec_29gl(struct flashctx *flash) @@ -174,6 +176,7 @@ { chipaddr bios = flash->virtual_memory; const struct flashchip *chip = flash->chip; + bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); uint8_t id1, id2; uint32_t largeid1, largeid2; uint32_t flashcontent1, flashcontent2; @@ -203,31 +206,31 @@ /* Reset chip to a clean slate */ if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) programmer_delay(10); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); if (probe_timing_exit) programmer_delay(10); } - chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xF0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) programmer_delay(probe_timing_exit); /* Issue JEDEC Product ID Entry command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(flash, 0x90, bios + (0x5555 & mask)); + chip_writeb(flash, 0x90, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_enter) programmer_delay(probe_timing_enter); /* Read product ID */ - id1 = chip_readb(flash, bios); - id2 = chip_readb(flash, bios + 0x01); + id1 = chip_readb(flash, bios + (0x00 << shifted)); + id2 = chip_readb(flash, bios + (0x01 << shifted)); largeid1 = id1; largeid2 = id2; @@ -246,14 +249,14 @@ /* Issue JEDEC Product ID Exit command */ if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) programmer_delay(10); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); if (probe_timing_exit) programmer_delay(10); } - chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xF0, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); if (probe_timing_exit) programmer_delay(probe_timing_exit); @@ -262,8 +265,8 @@ msg_cdbg(", id1 parity violation"); /* Read the product ID location again. We should now see normal flash contents. */ - flashcontent1 = chip_readb(flash, bios); - flashcontent2 = chip_readb(flash, bios + 0x01); + flashcontent1 = chip_readb(flash, bios + (0x00 << shifted)); + flashcontent2 = chip_readb(flash, bios + (0x01 << shifted)); /* Check if it is a continuation ID, this should be a while loop. */ if (flashcontent1 == 0x7F) { @@ -294,21 +297,23 @@ unsigned int pagesize, unsigned int mask) { chipaddr bios = flash->virtual_memory; + bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); unsigned int delay_us = 0; + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the Sector Erase command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); programmer_delay(delay_us); chip_writeb(flash, 0x30, bios + page); programmer_delay(delay_us); @@ -324,21 +329,23 @@ unsigned int blocksize, unsigned int mask) { chipaddr bios = flash->virtual_memory; + bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); unsigned int delay_us = 0; + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the Sector Erase command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); programmer_delay(delay_us); chip_writeb(flash, 0x50, bios + block); programmer_delay(delay_us); @@ -353,23 +360,25 @@ static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; + bool shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED); unsigned int delay_us = 0; + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the JEDEC Chip Erase command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((shifted ? 0x5555 : 0x2AAA) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x10, bios + (0x5555 & mask)); + chip_writeb(flash, 0x10, bios + ((shifted ? 0x2AAA : 0x5555) & mask)); programmer_delay(delay_us); toggle_ready_jedec_slow(flash, bios);

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[PATCH] Allow shifted JEDEC access
by Carl-Daniel Hailfinger 08 Aug '14

08 Aug '14

Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit) for 8-bit mode. Some programmers can access them in 16-bit mode, but on all flashrom-supported programmers so far, we access them in 8-bit mode. This means we have to shift the addresses. Untested, should work. This is a patch written shortly after r886 was committed, and it has been forward-ported. Missing from this patch is the deletion of now-unused code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-jedec_shifted/jedec.c =================================================================== --- flashrom-jedec_shifted/jedec.c (Revision 1818) +++ flashrom-jedec_shifted/jedec.c (Arbeitskopie) @@ -4,7 +4,7 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2006 Giampiero Giancipoli <gianci(a)email.it> * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> - * Copyright (C) 2007 Carl-Daniel Hailfinger + * Copyright (C) 2007-2012 Carl-Daniel Hailfinger * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> * * This program is free software; you can redistribute it and/or modify @@ -115,15 +115,18 @@ static void start_program_jedec_common(const struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); - chip_writeb(flash, 0xA0, bios + (0x5555 & mask)); + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; + + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); + chip_writeb(flash, 0xA0, bios + ((0x5555 << shifted) & mask)); } static int probe_jedec_common(struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; const struct flashchip *chip = flash->chip; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; uint8_t id1, id2; uint32_t largeid1, largeid2; uint32_t flashcontent1, flashcontent2; @@ -153,31 +156,31 @@ /* Reset chip to a clean slate */ if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); if (probe_timing_exit) programmer_delay(10); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); if (probe_timing_exit) programmer_delay(10); } - chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xF0, bios + ((0x5555 << shifted) & mask)); if (probe_timing_exit) programmer_delay(probe_timing_exit); /* Issue JEDEC Product ID Entry command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); if (probe_timing_enter) programmer_delay(10); - chip_writeb(flash, 0x90, bios + (0x5555 & mask)); + chip_writeb(flash, 0x90, bios + ((0x5555 << shifted) & mask)); if (probe_timing_enter) programmer_delay(probe_timing_enter); /* Read product ID */ - id1 = chip_readb(flash, bios); - id2 = chip_readb(flash, bios + 0x01); + id1 = chip_readb(flash, bios + (0x00 << shifted)); + id2 = chip_readb(flash, bios + (0x01 << shifted)); largeid1 = id1; largeid2 = id2; @@ -196,14 +199,14 @@ /* Issue JEDEC Product ID Exit command */ if ((chip->feature_bits & FEATURE_RESET_MASK) == FEATURE_LONG_RESET) { - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); if (probe_timing_exit) programmer_delay(10); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); if (probe_timing_exit) programmer_delay(10); } - chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); + chip_writeb(flash, 0xF0, bios + ((0x5555 << shifted) & mask)); if (probe_timing_exit) programmer_delay(probe_timing_exit); @@ -212,8 +215,8 @@ msg_cdbg(", id1 parity violation"); /* Read the product ID location again. We should now see normal flash contents. */ - flashcontent1 = chip_readb(flash, bios); - flashcontent2 = chip_readb(flash, bios + 0x01); + flashcontent1 = chip_readb(flash, bios + (0x00 << shifted)); + flashcontent2 = chip_readb(flash, bios + (0x01 << shifted)); /* Check if it is a continuation ID, this should be a while loop. */ if (flashcontent1 == 0x7F) { @@ -244,21 +247,23 @@ unsigned int pagesize, unsigned int mask) { chipaddr bios = flash->virtual_memory; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; unsigned int delay_us = 0; + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the Sector Erase command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); programmer_delay(delay_us); chip_writeb(flash, 0x30, bios + page); programmer_delay(delay_us); @@ -274,21 +279,23 @@ unsigned int blocksize, unsigned int mask) { chipaddr bios = flash->virtual_memory; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; unsigned int delay_us = 0; + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the Sector Erase command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); programmer_delay(delay_us); chip_writeb(flash, 0x50, bios + block); programmer_delay(delay_us); @@ -303,23 +310,25 @@ static int erase_chip_jedec_common(struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; unsigned int delay_us = 0; + if(flash->chip->probe_timing != TIMING_ZERO) delay_us = 10; /* Issue the JEDEC Chip Erase command */ - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x80, bios + (0x5555 & mask)); + chip_writeb(flash, 0x80, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0xAA, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x55, bios + ((0x2AAA << shifted) & mask)); programmer_delay(delay_us); - chip_writeb(flash, 0x10, bios + (0x5555 & mask)); + chip_writeb(flash, 0x10, bios + ((0x5555 << shifted) & mask)); programmer_delay(delay_us); toggle_ready_jedec_slow(flash, bios); Index: flashrom-jedec_shifted/82802ab.c =================================================================== --- flashrom-jedec_shifted/82802ab.c (Revision 1818) +++ flashrom-jedec_shifted/82802ab.c (Arbeitskopie) @@ -44,7 +44,7 @@ { chipaddr bios = flash->virtual_memory; uint8_t id1, id2, flashcontent1, flashcontent2; - int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) != 0; + int shifted = (flash->chip->feature_bits & FEATURE_ADDR_SHIFTED) ? 1 : 0; /* Reset to get a clean state */ chip_writeb(flash, 0xFF, bios); Index: flashrom-jedec_shifted/flashchips.c =================================================================== --- flashrom-jedec_shifted/flashchips.c (Revision 1818) +++ flashrom-jedec_shifted/flashchips.c (Arbeitskopie) @@ -4892,10 +4892,10 @@ .model_id = FUJITSU_MBM29F400BC, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -4905,13 +4905,13 @@ {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4750, 5250}, /* 4.75-5.25V for type -55, others 4.5-5.5V */ }, @@ -4924,10 +4924,10 @@ .model_id = FUJITSU_MBM29F400TC, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -4937,13 +4937,13 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, }, }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4750, 5250}, /* 4.75-5.25V for type -55, others 4.5-5.5V */ }, @@ -11388,10 +11388,10 @@ .model_id = ST_M29F400BB, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -11401,13 +11401,13 @@ {32 * 1024, 1}, {64 * 1024, 7}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, } }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4500, 5500}, }, @@ -11420,10 +11420,10 @@ .model_id = ST_M29F400BT, .total_size = 512, .page_size = 64 * 1024, - .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, + .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, - .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ + .probe = probe_jedec, + .probe_timing = TIMING_FIXME, .block_erasers = { { @@ -11433,13 +11433,13 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_shifted_jedec, + .block_erase = erase_sector_jedec, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = erase_chip_block_shifted_jedec, + .block_erase = erase_chip_block_jedec, } }, - .write = write_m29f400bt, + .write = write_jedec_1, .read = read_memmapped, .voltage = {4500, 5500}, }, -- http://www.hailfinger.org/

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how does we design a flashrom
by phanquang thinh 07 Aug '14

07 Aug '14

Dear Sir/ Madam My name is Thinh, I am a student In Vietnam. I have a topic to reseach how does deaign flashrom so i searched on internet but i could not find any doument related that topic. can you help me some document or book on line so i can lear them my topic? Thank for your support Thinh

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