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Re: [flashrom] [PATCH 02/12] add pretty printing functions for SSFS+SSFC and the OPCODE struct and use them
by Carl-Daniel Hailfinger 11 Jun '11

11 Jun '11

Am 08.06.2011 04:55 schrieb Stefan Tauner: > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > Thanks for your patch! > --- > ichspi.c | 51 +++++++++++++++++++++++++++++++++++++++++++++------ > 1 files changed, 45 insertions(+), 6 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 676b93a..7e4a363 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -243,6 +243,44 @@ static OPCODE POSSIBLE_OPCODES[] = { > > static OPCODES O_EXISTING = {}; > > +/* pretty printing functions */ > +static void pretty_print_opcodes(OPCODES *ops) > +{ > + if(ops == NULL) > + return; > + > + msg_pdbg("preop0=0x%02x, preop1=0x%02x\n", ops->preop[0], ops->preop[1]); > 80 columns > + > + OPCODE oc; > + uint8_t i; > + for (i = 0; i < 8; i++) { > + oc = ops->opcode[i]; > + msg_pdbg("op[%d]=0x%02x, %d, %d\n", i, oc.opcode, oc.spi_type, oc.atomic); > 80 columns > + } > +} > + > +#define pprint_reg(reg, bit, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) > For this macro, 80 col violations are OK. But please insert an empty line afterwards. > +static void prettyprint_ich9_reg_ssfs(uint32_t reg_val) > +{ > + msg_pdbg("SSFS: "); > + pprint_reg(SSFS, SCIP, reg_val, ", "); > + pprint_reg(SSFS, FDONE, reg_val, ", "); > + pprint_reg(SSFS, FCERR, reg_val, ", "); > + pprint_reg(SSFS, AEL, reg_val, "\n"); > +} > + > +static void prettyprint_ich9_reg_ssfc(uint32_t reg_val) > +{ > + msg_pdbg("SSFC: "); > + pprint_reg(SSFC, SCGO, reg_val, ", "); > + pprint_reg(SSFC, ACS, reg_val, ", "); > + pprint_reg(SSFC, SPOP, reg_val, ", "); > + pprint_reg(SSFC, COP, reg_val, ", "); > + pprint_reg(SSFC, DBC, reg_val, ", "); > + pprint_reg(SSFC, SME, reg_val, ", "); > + pprint_reg(SSFC, SCF, reg_val, "\n"); > +} > + > static uint8_t lookup_spi_type(uint8_t opcode) > { > int a; > @@ -519,6 +557,8 @@ static int ich_init_opcodes(void) > } else { > curopcodes = curopcodes_done; > msg_pdbg("done\n"); > + pretty_print_opcodes(curopcodes); > + msg_pdbg("\n"); > return 0; > } > } > @@ -793,6 +833,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, > temp32 = REGREAD32(ICH9_REG_SSFS); > if (temp32 & SSFS_FCERR) { > msg_perr("Transaction error!\n"); > + prettyprint_ich9_reg_ssfs(temp32); > + prettyprint_ich9_reg_ssfc(temp32); > /* keep reserved bits */ > temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; > /* Clear the transaction error. */ > @@ -1195,16 +1237,13 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, > > tmp = mmio_readl(ich_spibar + 0x90); > msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); > - msg_pdbg("AEL %i, ", (tmp >> 4) & 1); > - msg_pdbg("FCERR %i, ", (tmp >> 3) & 1); > - msg_pdbg("FDONE %i, ", (tmp >> 2) & 1); > - msg_pdbg("SCIP %i\n", (tmp >> 0) & 1); > + prettyprint_ich9_reg_ssfs(tmp); > if (tmp & (1 << 3)) { > msg_pdbg("Clearing SSFS.FCERR\n"); > mmio_writeb(1 << 3, ich_spibar + 0x90); > } > - tmp >>= 8; > - msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp); > + msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp >> 8); > + prettyprint_ich9_reg_ssfc(tmp); > > msg_pdbg("0x94: 0x%04x (PREOP)\n", > mmio_readw(ich_spibar + 0x94)); > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH 01/12] improve macros for SSFS and SSFC bits
by Carl-Daniel Hailfinger 11 Jun '11

11 Jun '11

One additional comment... Am 08.06.2011 04:55 schrieb Stefan Tauner: > - introduce offset macros and use them to (re)define the existing mask macros > - add comments > - rename SSFS_CDS to SSFS_FDONE (abbr. used in datasheet not in SSFS but HSFS) > - use those for refactoring and magic number elemination. > - following patch uses them for pretty printing > > --- a/ichspi.c > +++ b/ichspi.c > @@ -709,8 +721,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, > temp32 = REGREAD32(ICH9_REG_SSFS); > /* Keep reserved bits only */ > temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; > - /* clear error status registers */ > - temp32 |= (SSFS_CDS + SSFS_FCERR); > + /* Clear cycle done and cycle error status registers */ > + temp32 |= (SSFS_FDONE + SSFS_FCERR); > Please use | instead of + here. > REGWRITE32(ICH9_REG_SSFS, temp32); > > /* Use 20 MHz */ > Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1330 - trunk
by repository service 11 Jun '11

11 Jun '11

Author: stefanct Date: Sat Jun 11 11:53:22 2011 New Revision: 1330 URL: http://flashrom.org/trac/flashrom/changeset/1330 Log: ichspi.c: add macros and pretty printing for HSFS and HSFC Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Sat Jun 11 11:53:16 2011 (r1329) +++ trunk/ichspi.c Sat Jun 11 11:53:22 2011 (r1330) @@ -43,6 +43,37 @@ #include "spi.h" /* ICH9 controller register definition */ +#define ICH9_REG_HSFS 0x04 /* 16 Bits Hardware Sequencing Flash Status */ +#define HSFS_FDONE_OFF 0 /* 0: Flash Cycle Done */ +#define HSFS_FDONE (0x1 << HSFS_FDONE_OFF) +#define HSFS_FCERR_OFF 1 /* 1: Flash Cycle Error */ +#define HSFS_FCERR (0x1 << HSFS_FCERR_OFF) +#define HSFS_AEL_OFF 2 /* 2: Access Error Log */ +#define HSFS_AEL (0x1 << HSFS_AEL_OFF) +#define HSFS_BERASE_OFF 3 /* 3-4: Block/Sector Erase Size */ +#define HSFS_BERASE (0x3 << HSFS_BERASE_OFF) +#define HSFS_SCIP_OFF 5 /* 5: SPI Cycle In Progress */ +#define HSFS_SCIP (0x1 << HSFS_SCIP_OFF) + /* 6-12: reserved */ +#define HSFS_FDOPSS_OFF 13 /* 13: Flash Descriptor Override Pin-Strap Status */ +#define HSFS_FDOPSS (0x1 << HSFS_FDOPSS_OFF) +#define HSFS_FDV_OFF 14 /* 14: Flash Descriptor Valid */ +#define HSFS_FDV (0x1 << HSFS_FDV_OFF) +#define HSFS_FLOCKDN_OFF 15 /* 15: Flash Configuration Lock-Down */ +#define HSFS_FLOCKDN (0x1 << HSFS_FLOCKDN_OFF) + +#define ICH9_REG_HSFC 0x06 /* 16 Bits Hardware Sequencing Flash Control */ +#define HSFC_FGO_OFF 0 /* 0: Flash Cycle Go */ +#define HSFC_FGO (0x1 << HSFC_FGO_OFF) +#define HSFC_FCYCLE_OFF 1 /* 1-2: FLASH Cycle */ +#define HSFC_FCYCLE (0x3 << HSFC_FCYCLE_OFF) + /* 3-7: reserved */ +#define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ +#define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) + /* 14: reserved */ +#define HSFC_SME_OFF 15 /* 15: SPI SMI# Enable */ +#define HSFC_SME (0x1 << HSFC_SME_OFF) + #define ICH9_REG_FADDR 0x08 /* 32 Bits */ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ @@ -268,6 +299,28 @@ #define pprint_reg(reg, bit, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) +static void prettyprint_ich9_reg_hsfs(uint16_t reg_val) +{ + msg_pdbg("HSFS: "); + pprint_reg(HSFS, FDONE, reg_val, ", "); + pprint_reg(HSFS, FCERR, reg_val, ", "); + pprint_reg(HSFS, AEL, reg_val, ", "); + pprint_reg(HSFS, BERASE, reg_val, ", "); + pprint_reg(HSFS, SCIP, reg_val, ", "); + pprint_reg(HSFS, FDOPSS, reg_val, ", "); + pprint_reg(HSFS, FDV, reg_val, ", "); + pprint_reg(HSFS, FLOCKDN, reg_val, "\n"); +} + +static void prettyprint_ich9_reg_hsfc(uint16_t reg_val) +{ + msg_pdbg("HSFC: "); + pprint_reg(HSFC, FGO, reg_val, ", "); + pprint_reg(HSFC, FCYCLE, reg_val, ", "); + pprint_reg(HSFC, FDBC, reg_val, ", "); + pprint_reg(HSFC, SME, reg_val, "\n"); +} + static void prettyprint_ich9_reg_ssfs(uint32_t reg_val) { msg_pdbg("SSFS: "); @@ -1213,14 +1266,15 @@ case SPI_CONTROLLER_ICH9: tmp2 = mmio_readw(ich_spibar + 4); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); - msg_pdbg("FLOCKDN %i, ", (tmp2 >> 15 & 1)); - msg_pdbg("FDV %i, ", (tmp2 >> 14) & 1); - msg_pdbg("FDOPSS %i, ", (tmp2 >> 13) & 1); - msg_pdbg("SCIP %i, ", (tmp2 >> 5) & 1); - msg_pdbg("BERASE %i, ", (tmp2 >> 3) & 3); - msg_pdbg("AEL %i, ", (tmp2 >> 2) & 1); - msg_pdbg("FCERR %i, ", (tmp2 >> 1) & 1); - msg_pdbg("FDONE %i\n", (tmp2 >> 0) & 1); + prettyprint_ich9_reg_hsfs(tmp2); + if (tmp2 & (1 << 15)) { + msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + ichspi_lock = 1; + } + + tmp2 = mmio_readw(ich_spibar + 6); + msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); + prettyprint_ich9_reg_hsfc(tmp2); tmp = mmio_readl(ich_spibar + 0x50); msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp); @@ -1267,10 +1321,6 @@ ichspi_bbar); msg_pdbg("0xB0: 0x%08x (FDOC)\n", mmio_readl(ich_spibar + 0xB0)); - if (tmp2 & (1 << 15)) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); - ichspi_lock = 1; - } ich_init_opcodes(); break; default:

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[commit] r1329 - trunk
by repository service 11 Jun '11

11 Jun '11

Author: stefanct Date: Sat Jun 11 11:53:16 2011 New Revision: 1329 URL: http://flashrom.org/trac/flashrom/changeset/1329 Log: ichspi.c: add pretty printing for SSFS+SSFC and the OPCODE struct Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Sat Jun 11 11:53:09 2011 (r1328) +++ trunk/ichspi.c Sat Jun 11 11:53:16 2011 (r1329) @@ -245,6 +245,50 @@ static OPCODES O_EXISTING = {}; +/* pretty printing functions */ +static void pretty_print_opcodes(OPCODES *ops) +{ + if(ops == NULL) + return; + + msg_pdbg("preop0=0x%02x, preop1=0x%02x\n", ops->preop[0], + ops->preop[1]); + + OPCODE oc; + uint8_t i; + for (i = 0; i < 8; i++) { + oc = ops->opcode[i]; + msg_pdbg("op[%d]=0x%02x, %d, %d\n", + i, + oc.opcode, + oc.spi_type, + oc.atomic); + } +} + +#define pprint_reg(reg, bit, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) + +static void prettyprint_ich9_reg_ssfs(uint32_t reg_val) +{ + msg_pdbg("SSFS: "); + pprint_reg(SSFS, SCIP, reg_val, ", "); + pprint_reg(SSFS, FDONE, reg_val, ", "); + pprint_reg(SSFS, FCERR, reg_val, ", "); + pprint_reg(SSFS, AEL, reg_val, "\n"); +} + +static void prettyprint_ich9_reg_ssfc(uint32_t reg_val) +{ + msg_pdbg("SSFC: "); + pprint_reg(SSFC, SCGO, reg_val, ", "); + pprint_reg(SSFC, ACS, reg_val, ", "); + pprint_reg(SSFC, SPOP, reg_val, ", "); + pprint_reg(SSFC, COP, reg_val, ", "); + pprint_reg(SSFC, DBC, reg_val, ", "); + pprint_reg(SSFC, SME, reg_val, ", "); + pprint_reg(SSFC, SCF, reg_val, "\n"); +} + static uint8_t lookup_spi_type(uint8_t opcode) { int a; @@ -521,6 +565,8 @@ } else { curopcodes = curopcodes_done; msg_pdbg("done\n"); + pretty_print_opcodes(curopcodes); + msg_pdbg("\n"); return 0; } } @@ -796,6 +842,8 @@ temp32 = REGREAD32(ICH9_REG_SSFS); if (temp32 & SSFS_FCERR) { msg_perr("Transaction error!\n"); + prettyprint_ich9_reg_ssfs(temp32); + prettyprint_ich9_reg_ssfc(temp32); /* keep reserved bits */ temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; /* Clear the transaction error. */ @@ -1198,16 +1246,13 @@ tmp = mmio_readl(ich_spibar + 0x90); msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); - msg_pdbg("AEL %i, ", (tmp >> 4) & 1); - msg_pdbg("FCERR %i, ", (tmp >> 3) & 1); - msg_pdbg("FDONE %i, ", (tmp >> 2) & 1); - msg_pdbg("SCIP %i\n", (tmp >> 0) & 1); + prettyprint_ich9_reg_ssfs(tmp); if (tmp & (1 << 3)) { msg_pdbg("Clearing SSFS.FCERR\n"); mmio_writeb(1 << 3, ich_spibar + 0x90); } - tmp >>= 8; - msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp); + msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp >> 8); + prettyprint_ich9_reg_ssfc(tmp); msg_pdbg("0x94: 0x%04x (PREOP)\n", mmio_readw(ich_spibar + 0x94));

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[commit] r1328 - trunk
by repository service 11 Jun '11

11 Jun '11

Author: stefanct Date: Sat Jun 11 11:53:09 2011 New Revision: 1328 URL: http://flashrom.org/trac/flashrom/changeset/1328 Log: ichspi.c: improve macros for SSFS and SSFC bits - introduce offset macros and use them to (re)define the existing mask macros - fix masks of SSFC_COP, SSFC_DBC, SSFC_SCF (were single-bit masks erroneously) - add comments - rename SSFS_CDS to SSFS_FDONE (abbr. used in datasheet; not in SSFS but HSFS) - use those for refactoring and magic number elemination. following patch uses them for pretty printing. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/ichspi.c Modified: trunk/ichspi.c ============================================================================== --- trunk/ichspi.c Thu Jun 9 22:59:30 2011 (r1327) +++ trunk/ichspi.c Sat Jun 11 11:53:09 2011 (r1328) @@ -47,27 +47,41 @@ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ #define ICH9_REG_SSFS 0x90 /* 08 Bits */ -#define SSFS_SCIP 0x00000001 -#define SSFS_CDS 0x00000004 -#define SSFS_FCERR 0x00000008 -#define SSFS_AEL 0x00000010 +#define SSFS_SCIP_OFF 0 /* SPI Cycle In Progress */ +#define SSFS_SCIP (0x1 << SSFS_SCIP_OFF) +#define SSFS_FDONE_OFF 2 /* Cycle Done Status */ +#define SSFS_FDONE (0x1 << SSFS_FDONE_OFF) +#define SSFS_FCERR_OFF 3 /* Flash Cycle Error */ +#define SSFS_FCERR (0x1 << SSFS_FCERR_OFF) +#define SSFS_AEL_OFF 4 /* Access Error Log */ +#define SSFS_AEL (0x1 << SSFS_AEL_OFF) /* The following bits are reserved in SSFS: 1,5-7. */ #define SSFS_RESERVED_MASK 0x000000e2 #define ICH9_REG_SSFC 0x91 /* 24 Bits */ -#define SSFC_SCGO 0x00000200 -#define SSFC_ACS 0x00000400 -#define SSFC_SPOP 0x00000800 -#define SSFC_COP 0x00001000 -#define SSFC_DBC 0x00010000 -#define SSFC_DS 0x00400000 -#define SSFC_SME 0x00800000 -#define SSFC_SCF 0x01000000 -#define SSFC_SCF_20MHZ 0x00000000 -#define SSFC_SCF_33MHZ 0x01000000 /* We combine SSFS and SSFC to one 32-bit word, - * therefore SSFC bits are off by 8. - * The following bits are reserved in SSFC: 23-19,7,0. */ + * therefore SSFC bits are off by 8. */ + /* 0: reserved */ +#define SSFC_SCGO_OFF (1 + 8) /* 1: SPI Cycle Go */ +#define SSFC_SCGO (0x1 << SSFC_SCGO_OFF) +#define SSFC_ACS_OFF (2 + 8) /* 2: Atomic Cycle Sequence */ +#define SSFC_ACS (0x1 << SSFC_ACS_OFF) +#define SSFC_SPOP_OFF (3 + 8) /* 3: Sequence Prefix Opcode Pointer */ +#define SSFC_SPOP (0x1 << SSFC_SPOP_OFF) +#define SSFC_COP_OFF (4 + 8) /* 4-6: Cycle Opcode Pointer */ +#define SSFC_COP (0x7 << SSFC_COP_OFF) + /* 7: reserved */ +#define SSFC_DBC_OFF (8 + 8) /* 8-13: Data Byte Count */ +#define SSFC_DBC (0x3f << SSFC_DBC_OFF) +#define SSFC_DS_OFF (14 + 8) /* 14: Data Cycle */ +#define SSFC_DS (0x1 << SSFC_DS_OFF) +#define SSFC_SME_OFF (15 + 8) /* 15: SPI SMI# Enable */ +#define SSFC_SME (0x1 << SSFC_SME_OFF) +#define SSFC_SCF_OFF (16 + 8) /* 16-18: SPI Cycle Frequency */ +#define SSFC_SCF (0x7 << SSFC_SCF_OFF) +#define SSFC_SCF_20MHZ 0x00000000 +#define SSFC_SCF_33MHZ 0x01000000 + /* 19-23: reserved */ #define SSFC_RESERVED_MASK 0xf8008100 #define ICH9_REG_PREOP 0x94 /* 16 Bits */ @@ -567,7 +581,7 @@ /* keep reserved bits */ temp16 &= SPIS_RESERVED_MASK; /* clear error status registers */ - temp16 |= (SPIS_CDS + SPIS_FCERR); + temp16 |= (SPIS_CDS | SPIS_FCERR); REGWRITE16(ICH7_REG_SPIS, temp16); /* Assemble SPIC */ @@ -709,8 +723,8 @@ temp32 = REGREAD32(ICH9_REG_SSFS); /* Keep reserved bits only */ temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; - /* clear error status registers */ - temp32 |= (SSFS_CDS + SSFS_FCERR); + /* Clear cycle done and cycle error status registers */ + temp32 |= (SSFS_FDONE | SSFS_FCERR); REGWRITE32(ICH9_REG_SSFS, temp32); /* Use 20 MHz */ @@ -720,7 +734,8 @@ if (datalength != 0) { uint32_t datatemp; temp32 |= SSFC_DS; - datatemp = ((uint32_t) ((datalength - 1) & 0x3f)) << (8 + 8); + datatemp = ((((uint32_t)datalength - 1) << SSFC_DBC_OFF) & + SSFC_DBC); temp32 |= datatemp; } @@ -767,7 +782,7 @@ REGWRITE32(ICH9_REG_SSFS, temp32); /* Wait for Cycle Done Status or Flash Cycle Error. */ - while (((REGREAD32(ICH9_REG_SSFS) & (SSFS_CDS | SSFS_FCERR)) == 0) && + while (((REGREAD32(ICH9_REG_SSFS) & (SSFS_FDONE | SSFS_FCERR)) == 0) && --timeout) { programmer_delay(10); }

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[Patch] + RFC: Use shutdown callback mechanism to shutdown programmers
by David Hendricks 10 Jun '11

10 Jun '11

Hi everyone, Lately we've been looking into reverse PCI<http://flashrom.org/trac/flashrom/changeset/1232>and MMIO <http://patchwork.coreboot.org/patch/2331/> writes, along with the shutdown callback mechanism. The main usage case for Flashrom makes this a pretty simple matter, since most users only worry about a single programmer being used. However, when external devices are used which depend on internal programmer settings, things can get messy. Consider the case of a laptop with an x86 southbridge and an EC -- To communicate with the EC thru the LPC/FWH interface, some register settings in the southbridge might need to be changed. The code flow should be: 1. Set up SB, use rpci_* and rmmio_* to register reverse PCI and MMIO callbacks wherever necessary. 2. Set up EC. 3. Run code. 4. Call EC shutdown routine. 5. Reverse SB PCI/MMIO writes. However, the current code calls the programmer shutdown routine in step 4 * after* doing all shutdown callbacks in step 5. This causes southbridge registers to be reverted before the EC's shutdown routine is called, potentially making the EC unreachable. The attached patch addresses this by using programmer shutdown functions the same as any other shutdown callback. The internal_shutdown function is registered early in the internal_init() function so that newly discovered external programmers (ie SuperIO/EC LPC -> SPI bridges) can be discovered and have their shutdown callbacks added in the correct order. If this seems useful, we should make necessary changes to other programmers as well before committing this patch. Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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MSI 848P Neo-V (MS-6788-040) flashrom v0.9.3-r1247 on Linux 2.6.26-2-686 (i686)
by Melroy van den Berg 09 Jun '11

09 Jun '11

Hi, After this patch applied: http://patchwork.coreboot.org/patch/2452/ And finnaly added " -p internal:boardenable=force" to the command line. It says VERIFIED, I think everything went well using the MSI 848P Neo-V motherboard. server-pc:/home/melroy# flashrom -p internal:boardenable=force -w A6788IMS.610 flashrom v0.9.3-r1247 on Linux 2.6.26-2-686 (i686), built with libpci 3.0.0, GCC 4.3.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "Intel ICH5/ICH5R", enabling flash write... OK. This chipset supports the following protocols: FWH. NOTE: Running an untested board enable procedure. Please report success/failure to flashrom(a)flashrom.org with your board name and SUCCESS or FAILURE in the subject. Disabling flash write protection for board "MSI MS-6788-040 (848P NeoV)"... OK. Found chip "Winbond W39V040FA" (512 KB, FWH) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Flash image seems to be a legacy BIOS. Disabling checks. Erasing and writing flash chip... Done. Verifying flash... VERIFIED. The (latest) BIOS can be found at the MSI website. -- Kind regards, Melroy van den Berg

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Board enable for MSI MS-6788-040 (848P Neo-V)
by Maciej Pijanka 09 Jun '11

09 Jun '11

Hello Its a boardenable patch based on Michael's work for MSI MS-6788-04. -- Maciej Pijanka I don't fear computers, I fear lack of them -- Isaac Asimov

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[commit] r1327 - trunk
by repository service 09 Jun '11

09 Jun '11

Author: hailfinger Date: Thu Jun 9 22:59:30 2011 New Revision: 1327 URL: http://flashrom.org/trac/flashrom/changeset/1327 Log: Add board enable for MSI MS-6788-040 (848P Neo-V). Based on reverse engineering by Michael Karcher. Signed-off-by: Maciej Pijanka <maciej.pijanka(a)gmail.com> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Tested-by: Melroy van den Berg http://www.flashrom.org/pipermail/flashrom/2010-December/005642.html Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Thu Jun 9 22:06:34 2011 (r1326) +++ trunk/board_enable.c Thu Jun 9 22:59:30 2011 (r1327) @@ -1572,6 +1572,7 @@ * Suited for: * - P4SD-LA (HP OEM): i865 + ICH5 * - GIGABYTE GA-8PE667 Ultra 2: socket 478 + i845PE + ICH4 + * - MSI MS-6788-40 (aka 848P Neo-V) */ static int intel_ich_gpio32_raise(void) { @@ -2037,6 +2038,7 @@ {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, NULL, P3, "MSI", "MS-6702E (K8T Neo2-F)", 0, OK, w83627thf_gpio44_raise_2e}, {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, P3, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1106, 0x3148, 0 , 0 , 0x1106, 0x3177, 0 , 0 , NULL, "msi", "ms6787", P3, "MSI", "MS-6787 (P4MAM-V/P4MAM-L)", 0, OK, w836xx_memw_enable_2e}, + {0x8086, 0x24d3, 0x1462, 0x7880, 0x8086, 0x2570, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-6788-040 (848P NeoV)", 0, OK, intel_ich_gpio32_raise}, {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, P3, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, P3, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, P3, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise},

1 0

[PATCH] Fix compilation for CONFIG_INTERNAL=no
by Carl-Daniel Hailfinger 09 Jun '11

09 Jun '11

Fix compilation for CONFIG_INTERNAL=no CONFIG_INTERNAL implies Super I/O support and NEED_PCI. NEED_PCI is only used to guard PCI stuff which may be needed for external PCI-based programmers. That way, using #if NEED_PCI can be avoided inside -if CONFIG_INTERNAL. Please note that the patch seems to be nonsensical in some hunks, but if you look at the patched file you'll notice it's OK. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-compilefixes/buspirate_spi.c =================================================================== --- flashrom-compilefixes/buspirate_spi.c (Revision 1325) +++ flashrom-compilefixes/buspirate_spi.c (Arbeitskopie) @@ -30,6 +30,11 @@ /* Change this to #define if you want to test without a serial implementation */ #undef FAKE_COMMUNICATION +struct buspirate_spispeeds { + const char *name; + const int speed; +}; + #ifndef FAKE_COMMUNICATION static int buspirate_serialport_setup(char *dev) { Index: flashrom-compilefixes/programmer.h =================================================================== --- flashrom-compilefixes/programmer.h (Revision 1325) +++ flashrom-compilefixes/programmer.h (Arbeitskopie) @@ -239,7 +239,7 @@ void print_supported_pcidevs(const struct pcidev_status *devs); #endif -#if CONFIG_INTERNAL +#if CONFIG_INTERNAL == 1 /* board_enable.c */ void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port); @@ -262,6 +262,7 @@ void *physmap(const char *descr, unsigned long phys_addr, size_t len); void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); +#if CONFIG_INTERNAL == 1 int setup_cpu_msr(int cpu); void cleanup_cpu_msr(void); @@ -277,7 +278,6 @@ int dmi_match(const char *pattern); /* internal.c */ -#if NEED_PCI == 1 struct superio { uint16_t vendor; uint16_t port; @@ -287,6 +287,8 @@ extern int superio_count; #define SUPERIO_VENDOR_NONE 0x0 #define SUPERIO_VENDOR_ITE 0x1 +#endif +#if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter); struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); @@ -491,28 +493,21 @@ int rayer_spi_init(void); #endif -/* mcp6x_spi.c */ -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) -int mcp6x_spi_init(int want_spi); -#endif -#endif - /* bitbang_spi.c */ int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_shutdown(const struct bitbang_spi_master *master); /* buspirate_spi.c */ -struct buspirate_spispeeds { - const char *name; - const int speed; -}; +#if CONFIG_BUSPIRATE_SPI == 1 int buspirate_spi_init(void); int buspirate_spi_shutdown(void); +#endif /* dediprog.c */ +#if CONFIG_DEDIPROG == 1 int dediprog_init(void); int dediprog_shutdown(void); +#endif /* flashrom.c */ struct decode_sizes { @@ -593,7 +588,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, int ich_generation); int via_init_spi(struct pci_dev *dev); -#endif /* it85spi.c */ int it85xx_spi_init(struct superio s); @@ -605,23 +599,25 @@ void probe_superio_ite(void); int init_superio_ite(void); +/* mcp6x_spi.c */ +int mcp6x_spi_init(int want_spi); + /* sb600spi.c */ -#if CONFIG_INTERNAL == 1 int sb600_probe_spi(struct pci_dev *dev); -#endif /* wbsio_spi.c */ -#if CONFIG_INTERNAL == 1 int wbsio_check_for_spi(void); #endif /* serprog.c */ +#if CONFIG_SERPROG == 1 int serprog_init(void); int serprog_shutdown(void); void serprog_chip_writeb(uint8_t val, chipaddr addr); uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int delay); +#endif /* serial.c */ #if _WIN32 -- http://www.hailfinger.org/

2 2

[commit] r1326 - trunk
by repository service 09 Jun '11

09 Jun '11

Author: hailfinger Date: Thu Jun 9 22:06:34 2011 New Revision: 1326 URL: http://flashrom.org/trac/flashrom/changeset/1326 Log: Fix compilation for CONFIG_INTERNAL=no CONFIG_INTERNAL implies Super I/O support and NEED_PCI. NEED_PCI is only used to guard PCI stuff which may be needed for external PCI-based programmers. That way, using #if NEED_PCI can be avoided inside #if CONFIG_INTERNAL. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Modified: trunk/buspirate_spi.c trunk/programmer.h Modified: trunk/buspirate_spi.c ============================================================================== --- trunk/buspirate_spi.c Mon Jun 6 19:50:20 2011 (r1325) +++ trunk/buspirate_spi.c Thu Jun 9 22:06:34 2011 (r1326) @@ -30,6 +30,11 @@ /* Change this to #define if you want to test without a serial implementation */ #undef FAKE_COMMUNICATION +struct buspirate_spispeeds { + const char *name; + const int speed; +}; + #ifndef FAKE_COMMUNICATION static int buspirate_serialport_setup(char *dev) { Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Mon Jun 6 19:50:20 2011 (r1325) +++ trunk/programmer.h Thu Jun 9 22:06:34 2011 (r1326) @@ -239,7 +239,7 @@ void print_supported_pcidevs(const struct pcidev_status *devs); #endif -#if CONFIG_INTERNAL +#if CONFIG_INTERNAL == 1 /* board_enable.c */ void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port); @@ -262,6 +262,7 @@ void *physmap(const char *descr, unsigned long phys_addr, size_t len); void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); +#if CONFIG_INTERNAL == 1 int setup_cpu_msr(int cpu); void cleanup_cpu_msr(void); @@ -277,7 +278,6 @@ int dmi_match(const char *pattern); /* internal.c */ -#if NEED_PCI == 1 struct superio { uint16_t vendor; uint16_t port; @@ -287,6 +287,8 @@ extern int superio_count; #define SUPERIO_VENDOR_NONE 0x0 #define SUPERIO_VENDOR_ITE 0x1 +#endif +#if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter); struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); @@ -491,28 +493,21 @@ int rayer_spi_init(void); #endif -/* mcp6x_spi.c */ -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) -int mcp6x_spi_init(int want_spi); -#endif -#endif - /* bitbang_spi.c */ int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); int bitbang_spi_shutdown(const struct bitbang_spi_master *master); /* buspirate_spi.c */ -struct buspirate_spispeeds { - const char *name; - const int speed; -}; +#if CONFIG_BUSPIRATE_SPI == 1 int buspirate_spi_init(void); int buspirate_spi_shutdown(void); +#endif /* dediprog.c */ +#if CONFIG_DEDIPROG == 1 int dediprog_init(void); int dediprog_shutdown(void); +#endif /* flashrom.c */ struct decode_sizes { @@ -593,7 +588,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, int ich_generation); int via_init_spi(struct pci_dev *dev); -#endif /* it85spi.c */ int it85xx_spi_init(struct superio s); @@ -605,23 +599,25 @@ void probe_superio_ite(void); int init_superio_ite(void); +/* mcp6x_spi.c */ +int mcp6x_spi_init(int want_spi); + /* sb600spi.c */ -#if CONFIG_INTERNAL == 1 int sb600_probe_spi(struct pci_dev *dev); -#endif /* wbsio_spi.c */ -#if CONFIG_INTERNAL == 1 int wbsio_check_for_spi(void); #endif /* serprog.c */ +#if CONFIG_SERPROG == 1 int serprog_init(void); int serprog_shutdown(void); void serprog_chip_writeb(uint8_t val, chipaddr addr); uint8_t serprog_chip_readb(const chipaddr addr); void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); void serprog_delay(int delay); +#endif /* serial.c */ #if _WIN32

1 0

Re: [flashrom] [PATCH 01/12] improve macros for SSFS and SSFC bits
by Carl-Daniel Hailfinger 08 Jun '11

08 Jun '11

Am 08.06.2011 04:55 schrieb Stefan Tauner: > - introduce offset macros and use them to (re)define the existing mask macros > - add comments > - rename SSFS_CDS to SSFS_FDONE (abbr. used in datasheet not in SSFS but HSFS) > - use those for refactoring and magic number elemination. > - following patch uses them for pretty printing > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > ichspi.c | 48 ++++++++++++++++++++++++++++++------------------ > 1 files changed, 30 insertions(+), 18 deletions(-) > > diff --git a/ichspi.c b/ichspi.c > index 299cbf3..676b93a 100644 > --- a/ichspi.c > +++ b/ichspi.c > @@ -47,24 +47,36 @@ > #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ > > #define ICH9_REG_SSFS 0x90 /* 08 Bits */ > -#define SSFS_SCIP 0x00000001 > -#define SSFS_CDS 0x00000004 > -#define SSFS_FCERR 0x00000008 > -#define SSFS_AEL 0x00000010 > +#define SSFS_SCIP_OFF 0 /* SPI Cycle In Progress */ > +#define SSFS_SCIP (0x1 << SSFS_SCIP_OFF) > +#define SSFS_FDONE_OFF 2 /* Cycle Done Status */ > +#define SSFS_FDONE (0x1 << SSFS_FDONE_OFF) > +#define SSFS_FCERR_OFF 3 /* Flash Cycle Error */ > +#define SSFS_FCERR (0x1 << SSFS_FCERR_OFF) > +#define SSFS_AEL_OFF 4 /* Access Error Log */ > +#define SSFS_AEL (0x1 << SSFS_AEL_OFF) > /* The following bits are reserved in SSFS: 1,5-7. */ > #define SSFS_RESERVED_MASK 0x000000e2 > > #define ICH9_REG_SSFC 0x91 /* 24 Bits */ > -#define SSFC_SCGO 0x00000200 > -#define SSFC_ACS 0x00000400 > -#define SSFC_SPOP 0x00000800 > -#define SSFC_COP 0x00001000 > -#define SSFC_DBC 0x00010000 > -#define SSFC_DS 0x00400000 > -#define SSFC_SME 0x00800000 > -#define SSFC_SCF 0x01000000 > -#define SSFC_SCF_20MHZ 0x00000000 > -#define SSFC_SCF_33MHZ 0x01000000 > +#define SSFC_SCGO_OFF (1 + 8) /* 1: SPI Cycle Go */ > +#define SSFC_SCGO (0x1 << SSFC_SCGO_OFF) > +#define SSFC_ACS_OFF (2 + 8) /* 2: Atomic Cycle Sequence */ > +#define SSFC_ACS (0x1 << SSFC_ACS_OFF) > +#define SSFC_SPOP_OFF (3 + 8) /* 3: Sequence Prefix Opcode Pointer */ > +#define SSFC_SPOP (0x1 << SSFC_SPOP_OFF) > +#define SSFC_COP_OFF (4 + 8) /* 4-6: Cycle Opcode Pointer */ > +#define SSFC_COP (0x7 << SSFC_COP_OFF) > This is a code change. Can you mention it in the changelog, please? Some generic statement like "fix masks for register definitions SSFC_COP, ..." would suffice and help others to understand what you were doing. Please recheck that the changes were intentional, though. > +#define SSFC_DBC_OFF (8 + 8) /* 8-13: Data Byte Count */ > +#define SSFC_DBC (0x3f << SSFC_DBC_OFF) > Code change, see above. > +#define SSFC_DS_OFF (14 + 8) /* 14: Data Cycle */ > +#define SSFC_DS (0x1 << SSFC_DS_OFF) > +#define SSFC_SME_OFF (15 + 8) /* 15: SPI SMI# Enable */ > +#define SSFC_SME (0x1 << SSFC_SME_OFF) > +#define SSFC_SCF_OFF (16 + 8) /* 16-18: SPI Cycle Frequency */ > +#define SSFC_SCF (0x7 << SSFC_SCF_OFF) > Code change, see above. > +#define SSFC_SCF_20MHZ 0x00000000 > +#define SSFC_SCF_33MHZ 0x01000000 > /* We combine SSFS and SSFC to one 32-bit word, > * therefore SSFC bits are off by 8. > * The following bits are reserved in SSFC: 23-19,7,0. */ > > @@ -720,7 +732,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, > if (datalength != 0) { > uint32_t datatemp; > temp32 |= SSFC_DS; > - datatemp = ((uint32_t) ((datalength - 1) & 0x3f)) << (8 + 8); > + datatemp = (uint32_t) (((datalength - 1) << SSFC_DBC_OFF) & SSFC_DBC); > Please change this to datatemp = ((((uint32_t)datalength - 1) << SSFC_DBC_OFF) & SSFC_DBC); > temp32 |= datatemp; > } > > I'm still not entirely happy with "duplicating" all those definitions, once with _OFF and once without. That said, I see where you're going with that, so this patch is (with the casting change) Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> No need to resend, just change the commit message and the cast before you commit. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

[PATCH] add util/pwclient_sequence.sh
by Stefan Tauner 08 Jun '11

08 Jun '11

allows using multiple patchwork ids in one go: e.g. you want to mark a whole patch set containing pw ids 2998 to 3008 as superseded: ./util/pwclient_sequence.sh 2998 3008 update -s Superseded this should probably be a patch to pwclient itself, but i dont wanna touch it right now. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- util/pwclient_sequence.sh | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) create mode 100755 util/pwclient_sequence.sh diff --git a/util/pwclient_sequence.sh b/util/pwclient_sequence.sh new file mode 100755 index 0000000..e901118 --- /dev/null +++ b/util/pwclient_sequence.sh @@ -0,0 +1,16 @@ +#!/bin/sh + +if [ $# -lt 3 ]; then + echo "usage: $0 id_low id_high arguments +will execute 'pwclient <arguments> id' +for every id from id_low to id_high" + exit 1 +fi + +low=$1 +high=$2 +shift 2 + +for id in `seq $low $high` ; do + pwclient $@ $id +done \ No newline at end of file -- 1.7.1

1 0

[PATCH 12/12] add intel 6 series pci ids to chipset_enables
by Stefan Tauner 08 Jun '11

08 Jun '11

as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-005, April 2011. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 5f1a6fd..4333a16 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1025,6 +1025,20 @@ const struct penable chipset_enables[] = { {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1166, 0x0200, OK, "Broadcom", "OSB4", enable_flash_osb4}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x1C4E, NT, "Intel", "Q67", enable_flash_ich10}, + {0x8086, 0x1C4C, NT, "Intel", "Q65", enable_flash_ich10}, + {0x8086, 0x1C50, NT, "Intel", "B65", enable_flash_ich10}, + {0x8086, 0x1C4A, NT, "Intel", "H67", enable_flash_ich10}, + {0x8086, 0x1C46, NT, "Intel", "P67", enable_flash_ich10}, + {0x8086, 0x1C5C, NT, "Intel", "H61", enable_flash_ich10}, + {0x8086, 0x1C52, NT, "Intel", "C202", enable_flash_ich10}, + {0x8086, 0x1C54, NT, "Intel", "C204", enable_flash_ich10}, + {0x8086, 0x1C56, NT, "Intel", "C206", enable_flash_ich10}, + {0x8086, 0x1C4F, NT, "Intel", "QM67", enable_flash_ich10}, + {0x8086, 0x1C47, NT, "Intel", "UM67", enable_flash_ich10}, + {0x8086, 0x1C4B, NT, "Intel", "HM67", enable_flash_ich10}, + {0x8086, 0x1C49, NT, "Intel", "HM65", enable_flash_ich10}, + {0x8086, 0x1C4D, NT, "Intel", "QS67", enable_flash_ich10}, {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, {0x8086, 0x3b02, NT, "Intel", "P55", enable_flash_ich10}, -- 1.7.1

1 0

[PATCH 11/12] add support for Intel Hardware Sequencing
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipdrivers.h | 6 + flashchips.c | 23 ++++- flashchips.h | 2 + flashrom.c | 6 +- ichspi.c | 340 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-- programmer.h | 1 + 6 files changed, 363 insertions(+), 15 deletions(-) diff --git a/chipdrivers.h b/chipdrivers.h index 92ddbea..f97e2ad 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -84,6 +84,12 @@ void print_status_82802ab(uint8_t status); int unlock_82802ab(struct flashchip *flash); int unlock_28f004s5(struct flashchip *flash); +/* ichspi.c */ +int ich_hwseq_probe(struct flashchip *flash); +int ich_hwseq_read(struct flashchip *flash, uint8_t *buf, int start, int len); +int ich_hwseq_block_erase(struct flashchip *flash, unsigned int addr, unsigned int blocklen); +int ich_hwseq_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); + /* jedec.c */ uint8_t oddparity(uint8_t val); void toggle_ready_jedec(chipaddr dst); diff --git a/flashchips.c b/flashchips.c index 427cdcd..2f0161f 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8507,7 +8507,27 @@ const struct flashchip flashchips[] = { .write = write_jedec_1, .read = read_memmapped, }, - +#if defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) + { + .vendor = "Intel", + .name = "Hardware Sequencing", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = INTEL_ID, + .model_id = INTEL_HWSEQ, + .total_size = 0, + .page_size = 256, + .tested = TEST_OK_PR, + .probe = ich_hwseq_probe, + .block_erasers = + { + { /* erase blocks will be set by the probing function */ + .block_erase = ich_hwseq_block_erase, + } + }, + .write = ich_hwseq_write_256, + .read = ich_hwseq_read, + }, +#endif // defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) { .vendor = "AMIC", .name = "unknown AMIC SPI chip", @@ -8640,6 +8660,7 @@ const struct flashchip flashchips[] = { .probe = probe_spi_rdid, .write = NULL, }, + { .vendor = "Generic", .name = "unknown SPI chip (REMS)", diff --git a/flashchips.h b/flashchips.h index 3b2b94f..6b8d574 100644 --- a/flashchips.h +++ b/flashchips.h @@ -340,6 +340,8 @@ #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ +#define INTEL_HWSEQ 0xFFFE /* dummy ID for hardware sequencing */ + #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */ /* diff --git a/flashrom.c b/flashrom.c index e9e6a77..41f4c26 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1191,7 +1191,7 @@ notfound: programmer_unmap_flash_region((void *)fill_flash->virtual_memory, size); } - if (!flash || !flash->name) + if (!fill_flash || !fill_flash->name) return -1; #if CONFIG_INTERNAL == 1 @@ -1203,8 +1203,8 @@ notfound: msg_cinfo("%s chip \"%s %s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", - flash->vendor, flash->name, flash->total_size, - flashbuses_to_text(flash->bustype), location); + fill_flash->vendor, fill_flash->name, fill_flash->total_size, + flashbuses_to_text(fill_flash->bustype), location); /* Flash registers will not be mapped if the chip was forced. Lock info * may be stored in registers, so avoid lock info printing. diff --git a/ichspi.c b/ichspi.c index 5bba0ab..238c43c 100644 --- a/ichspi.c +++ b/ichspi.c @@ -35,10 +35,11 @@ * */ -#if defined(__i386__) || defined(__x86_64__) +#if defined(CONFIG_INTERNAL) && (defined(__i386__) || defined(__x86_64__)) #include <string.h> #include "flash.h" +#include "flashchips.h" #include "chipdrivers.h" #include "programmer.h" #include "spi.h" @@ -1099,6 +1100,307 @@ static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, return result; } +static uint32_t ich_hwseq_get_flash_boundary(void) +{ + return (REGREAD32(ICH9_REG_FPB) & FPB_FPBA) << 12; +} + +/* Sets FADDR.FLA to 'addr' and returns the erase block size in bytes + * of the block containing this address. */ +static uint32_t ich_hwseq_get_erase_block_size(unsigned int addr) +{ + REGWRITE32(ICH9_REG_FADDR, (addr & 0x00FFFFFF)); + uint8_t enc_berase = (REGREAD16(ICH9_REG_HSFS) & HSFS_BERASE) >> + HSFS_BERASE_OFF; + const uint32_t dec_berase[4] = { + 256, + 4 * 1024, + 8 * 1024, + 64 * 1024 + }; + return dec_berase[enc_berase]; +} + +int ich_hwseq_probe(struct flashchip *flash) +{ + uint32_t total_size, boundary; + uint32_t erase_size_low, size_low, erase_size_high, size_high; + struct block_eraser eraser; + extern struct flash_descriptor fdbar; + + if (flash->manufacture_id != INTEL_ID || + flash->model_id != INTEL_HWSEQ) { + msg_cerr("This chip (%s) is not supported in hardware" + "sequencing mode and should never have been probed.\n", + flash->name); + msg_cerr("%s: Please report a bug at flashrom(a)flashrom.org\n", + __func__); + return 0; + } + + msg_cdbg("Prerequisites for Intel Hardware Sequencing are "); + if (spi_programmer->type != SPI_CONTROLLER_ICH_HWSEQ) { + msg_cdbg("not met.\n"); + return 0; + } + + msg_cdbg("met.\n"); + total_size = (getFCBA_component_density(0) + + getFCBA_component_density(1)); + msg_cdbg("Found %d attached SPI flash chip", fdbar.NC + 1); + if (fdbar.NC) + msg_cdbg("s with a combined"); + else + msg_cdbg(" with a"); + msg_cdbg(" density of %d kB.\n", total_size / 1024); + flash->total_size = total_size / 1024; + + eraser = flash->block_erasers[0]; + boundary = ich_hwseq_get_flash_boundary(); + size_high = total_size - boundary; + erase_size_high = ich_hwseq_get_erase_block_size(boundary); + + if (boundary == 0) { + msg_cdbg("There is only one partition containting the whole " + "address space (0x%06x - 0x%06x)\n", 0, size_high-1); + eraser.eraseblocks[0].size = erase_size_high; + eraser.eraseblocks[0].count = size_high / erase_size_high; + msg_cdbg("There are %d erase blocks with %d B each.\n", + size_high / erase_size_high, erase_size_high); + } else { + msg_cdbg("The flash is divided at address 0x%06x in two " + "partitions.\n", boundary); + size_low = total_size - size_high; + erase_size_low = ich_hwseq_get_erase_block_size(0); + + eraser.eraseblocks[0].size = erase_size_low; + eraser.eraseblocks[0].count = size_low / erase_size_low; + msg_cdbg("The first partition ranges from 0x%06x to 0x%06x.\n", + 0, size_low-1); + msg_cdbg("In that range are %d erase blocks with %d B each.\n", + size_low / erase_size_low, erase_size_low); + + eraser.eraseblocks[1].size = erase_size_high; + eraser.eraseblocks[1].count = size_high / erase_size_high; + msg_cdbg("The second partition ranges from 0x%06x to 0x%06x.\n", + boundary, size_high-1); + msg_cdbg("In that range are %d erase blocks with %d B each.\n", + size_high / erase_size_high, erase_size_high); + } + return 1; +} + +static int ich_hwseq_send_command(unsigned int writecnt, + unsigned int readcnt, + const unsigned char *writearr, + unsigned char *readarr) +{ + msg_pdbg("skipped. Intel Hardware Sequencing does not support sending " + "arbitrary commands."); + return -1; +} + +int ich_hwseq_block_erase(struct flashchip *flash, + unsigned int addr, + unsigned int len) +{ + uint32_t erase_block; + uint32_t hsfc; + uint32_t hsfs; + uint32_t timeout = 5000 * 1000; /* 5 s for max 64 kB */ + + if (flash->manufacture_id != INTEL_ID || + flash->model_id != INTEL_HWSEQ) { + msg_perr("This chip (%s) is not supported in hardware" + "sequencing mode\n", flash->name); + return -1; + } + + erase_block = ich_hwseq_get_erase_block_size(addr); + if (len != erase_block) { + msg_cerr("Erase block size for address 0x%06x is %d B, " + "but requested erase block size is %d B. " + "Not erasing anything.\n", + addr, + erase_block, + len); + return -1; + } + + /* Although the hardware supports this (it would erase the whole block + * containing the address) we play safe here. */ + if (addr % erase_block != 0) { + msg_cerr("Erase address 0x%06x is not aligned to the erase " + "block boundary (any multiple of %d). " + "Not erasing anything.\n", + addr, + erase_block); + return -1; + } + + msg_pdbg("Erasing %d bytes starting at 0x%06x\n", len, addr); + + hsfc = REGREAD16(ICH9_REG_HSFC); + /* make sure FDONE, FCERR, AEL are cleared by writing 1 to them */ + REGWRITE16(ICH9_REG_HSFC, hsfc); + hsfc &= ~HSFC_FCYCLE; /* clear operation */ + hsfc = (0x11 << HSFC_FCYCLE_OFF); /* set erase operation */ + hsfc |= HSFC_FGO; /* start */ + REGWRITE16(ICH9_REG_HSFC, hsfc); + + /* Wait for Cycle Done Status or Flash Cycle Error. */ + while (((REGREAD16(ICH9_REG_HSFS) & + (HSFS_FDONE | HSFS_FCERR)) == 0) && + --timeout) { + programmer_delay(10); + } + hsfs = REGREAD16(ICH9_REG_HSFS); + if (!timeout) { + msg_perr("timeout!\n"); + prettyprint_ich9_reg_hsfs(hsfs); + prettyprint_ich9_reg_hsfc(hsfs); + return 1; + } + + REGWRITE16(ICH9_REG_HSFS, hsfs); /* clear all error bits */ + if (hsfs & HSFS_FCERR) { + msg_perr("Transaction error between offset 0x%06x and 0x%06x + " + "%d (=0x%06x)!\n", + addr, addr, len, addr+len); + prettyprint_ich9_reg_hsfs(hsfs); + prettyprint_ich9_reg_hsfc(hsfs); + return 1; + } + return 0; +} + +int ich_hwseq_read(struct flashchip *flash, uint8_t *buf, int addr, int len) +{ + uint32_t *buf32 = (uint32_t *)buf; + uint16_t hsfc = REGREAD16(ICH9_REG_HSFC); + uint16_t hsfs; + uint16_t timeout = 100 * 60; + int i; + + if (flash->manufacture_id != INTEL_ID || + flash->model_id != INTEL_HWSEQ) { + msg_perr("This chip (%s) is not supported in hardware" + "sequencing mode.\n", flash->name); + return -1; + } + + if (len % 4 != 0) { + msg_perr("Read size has to be a multiple of 4 for this " + "implementation of hardware sequencing mode.\n"); + return -1; + } + + msg_pdbg("reading %d bytes starting at 0x%06x\n", len, addr); + /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ + REGWRITE16(ICH9_REG_HSFC, hsfc); + + for (i = 0; i < len; i += 4) { + REGWRITE32(ICH9_REG_FADDR, (addr & 0x00FFFFFF)); + hsfc = REGREAD16(ICH9_REG_HSFC); + hsfc &= ~HSFC_FCYCLE; /* set read operation */ + hsfc &= ~HSFC_FDBC; /* clear byte count */ + hsfc |= (3 << HSFC_FDBC_OFF); /* set byte count to 3+1 */ + hsfc |= HSFC_FGO; /* start */ + REGWRITE16(ICH9_REG_HSFC, hsfc); + + /* Wait for Cycle Done Status or Flash Cycle Error. */ + while (((REGREAD16(ICH9_REG_HSFS) & + (HSFS_FDONE | HSFS_FCERR)) == 0) && + --timeout) { + programmer_delay(10); + } + hsfs = REGREAD16(ICH9_REG_HSFS); + if (!timeout) { + msg_perr("timeout!\n"); + prettyprint_ich9_reg_hsfs(hsfs); + prettyprint_ich9_reg_hsfc(hsfs); + return 1; + } + + REGWRITE16(ICH9_REG_HSFS, hsfs); /* clear all error bits */ + if (hsfs & HSFS_FCERR) { + msg_perr("Transaction error between offset 0x%06x and " + "0x%06x + %d (= 0x%06x)!\n", + addr, addr, 4, addr + 4); + prettyprint_ich9_reg_hsfs(hsfs); + prettyprint_ich9_reg_hsfc(hsfs); + return 1; + } + + *buf32++ = REGREAD32(ICH9_REG_FDATA0); + addr += 4; + } + return 0; +} + +int ich_hwseq_write_256(struct flashchip *flash, uint8_t *buf, int addr, int len) +{ + uint32_t *buf32 = (uint32_t *)buf; + uint16_t hsfc = REGREAD16(ICH9_REG_HSFC); + uint16_t hsfs; + uint16_t timeout = 100 * 60; + int i; + if (flash->manufacture_id != INTEL_ID || + flash->model_id != INTEL_HWSEQ) { + msg_perr("This chip (%s) is not supported in hardware" + "sequencing mode\n", flash->name); + return -1; + } + + if ((len % 4 != 0)) { + msg_perr("Write size has to be a multiple of 4 for this " + "implementation of hardware sequencing mode\n"); + return -1; + } + + msg_pdbg("writing %d bytes starting at 0x%06x\n", len, addr); + /* clear FDONE, FCERR, AEL by writing 1 to them (if they are set) */ + REGWRITE16(ICH9_REG_HSFC, hsfc); + + for (i = 0; i < len; i += 4) { + REGWRITE32(ICH9_REG_FADDR, (addr & 0x00FFFFFF)); + REGWRITE32(ICH9_REG_FDATA0, *buf32++); + hsfc = REGREAD16(ICH9_REG_HSFC); + hsfc &= ~HSFC_FCYCLE; /* clear operation */ + hsfc = (0x10 << HSFC_FCYCLE_OFF); /* set write operation */ + hsfc &= ~HSFC_FDBC; /* clear byte count */ + hsfc |= (3 << HSFC_FDBC_OFF); /* set byte count to 3+1 */ + hsfc |= HSFC_FGO; /* start */ + REGWRITE16(ICH9_REG_HSFC, hsfc); + + /* Wait for Cycle Done Status or Flash Cycle Error. */ + while (((REGREAD16(ICH9_REG_HSFS) & + (HSFS_FDONE | HSFS_FCERR)) == 0) && + --timeout) { + programmer_delay(10); + } + hsfs = REGREAD16(ICH9_REG_HSFS); + if (!timeout) { + msg_perr("timeout!\n"); + prettyprint_ich9_reg_hsfs(hsfs); + prettyprint_ich9_reg_hsfc(hsfs); + return 1; + } + + REGWRITE16(ICH9_REG_HSFS, hsfs); /* clear all error bits */ + if (hsfs & HSFS_FCERR) { + msg_perr("Transaction error between offset 0x%06x and " + "0x%06x + %d (= 0x%06x)!\n", + addr, addr, 4, addr + 4); + prettyprint_ich9_reg_hsfs(hsfs); + prettyprint_ich9_reg_hsfc(hsfs); + return 1; + } + addr += 4; + } + return 0; +} + static int ich_spi_send_multicommand(struct spi_command *cmds) { int ret = 0; @@ -1217,6 +1519,16 @@ static const struct spi_programmer spi_programmer_ich9 = { .write_256 = default_spi_write_256, }; +static const struct spi_programmer spi_programmer_ich_hwseq = { + .type = SPI_CONTROLLER_ICH_HWSEQ, + .max_data_read = 64, + .max_data_write = 64, + .command = ich_hwseq_send_command, + .multicommand = default_spi_send_multicommand, + .read = ich_hwseq_read, + .write_256 = ich_hwseq_write_256, +}; + int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, int ich_generation) { @@ -1225,20 +1537,19 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, uint16_t spibar_offset, tmp2; uint32_t tmp; int ichspi_desc = 0; + /* used for hw sequencing detection */ + extern struct flash_descriptor fdbar; switch (ich_generation) { case 7: - register_spi_programmer(&spi_programmer_ich7); spibar_offset = 0x3020; break; case 8: - register_spi_programmer(&spi_programmer_ich9); spibar_offset = 0x3020; break; case 9: case 10: default: /* Future version might behave the same */ - register_spi_programmer(&spi_programmer_ich9); spibar_offset = 0x3800; break; } @@ -1249,8 +1560,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, /* Assign Virtual Address */ ich_spibar = rcrb + spibar_offset; - switch (spi_programmer->type) { - case SPI_CONTROLLER_ICH7: + switch (ich_generation) { + case 7: msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0)); msg_pdbg("0x02: 0x%04x (SPIC)\n", @@ -1286,9 +1597,13 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } + register_spi_programmer(&spi_programmer_ich7); ich_init_opcodes(); break; - case SPI_CONTROLLER_ICH9: + case 8: + case 9: + case 10: + default: /* Future version might behave the same */ tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); prettyprint_ich9_reg_hsfs(tmp2); @@ -1365,10 +1680,13 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, read_ich_descriptors_from_fdo(ich_spibar); pretty_print_ich_descriptors(); } - ich_init_opcodes(); - break; - default: - /* Nothing */ + + if (ichspi_lock || fdbar.NC != 0) + register_spi_programmer(&spi_programmer_ich_hwseq); + else { + register_spi_programmer(&spi_programmer_ich9); + ich_init_opcodes(); + } break; } diff --git a/programmer.h b/programmer.h index e1147f1..8ccaf0b 100644 --- a/programmer.h +++ b/programmer.h @@ -538,6 +538,7 @@ enum spi_controller { #if defined(__i386__) || defined(__x86_64__) SPI_CONTROLLER_ICH7, SPI_CONTROLLER_ICH9, + SPI_CONTROLLER_ICH_HWSEQ, SPI_CONTROLLER_IT85XX, SPI_CONTROLLER_IT87XX, SPI_CONTROLLER_SB600, -- 1.7.1

1 0

[PATCH 10/12] add FPB (Flash Partition Boundary) macros and init printing
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/ichspi.c b/ichspi.c index c8d8432..5bba0ab 100644 --- a/ichspi.c +++ b/ichspi.c @@ -150,6 +150,10 @@ #define VSCC_VCL (0x1 << VSCC_VCL_OFF) /* 24-31: reserved */ +#define ICH9_REG_FPB 0xD0 /* 32 Bits Flash Partition Boundary */ +#define FPB_FPBA_OFF 0 /* 0-12: Block/Sector Erase Size */ +#define FPB_FPBA (0x1FFF << FPB_FPBA_OFF) + // ICH9R SPI commands #define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 #define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 @@ -1353,6 +1357,9 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, msg_pdbg("UVSCC: "); prettyprint_ich9_reg_vscc(tmp); + tmp = mmio_readl(ich_spibar + ICH9_REG_FPB); + msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp); + msg_pdbg("\n"); if (ichspi_desc) { read_ich_descriptors_from_fdo(ich_spibar); -- 1.7.1

1 0

[PATCH 09/12] add macros and pretty printing for "Host Lower Vendor Specific Component Capabilities" registers
by Stefan Tauner 08 Jun '11

08 Jun '11

there are two of them: lower and upper. they are only useful for hardware sequencing and indicate properties of the respective flash chip/address space. the VSCC registers describe the properties of the address space lower and equal or above than FPBA. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 41 insertions(+), 0 deletions(-) diff --git a/ichspi.c b/ichspi.c index fd983ce..c8d8432 100644 --- a/ichspi.c +++ b/ichspi.c @@ -131,6 +131,25 @@ #define ICH9_REG_BBAR 0xA0 /* 32 Bits BIOS Base Address Configuration */ #define BBAR_MASK 0x00ffff00 /* 8-23: Bottom of System Flash */ +#define ICH9_REG_LVSCC 0xC4 /* 32 Bits Host Lower Vendor Specific Component Capabilities */ +#define ICH9_REG_UVSCC 0xC8 /* 32 Bits Host Upper Vendor Specific Component Capabilities */ +/* Field locations and semantics for LVSCC and UVSCC are equal therefore they + * share the same macros. */ +#define VSCC_EBS_OFF 0 /* 0-1: Block/Sector Erase Size */ +#define VSCC_EBS (0x3 << VSCC_EBS_OFF) +#define VSCC_WG_OFF 2 /* 2: Write Granularity */ +#define VSCC_WG (0x1 << VSCC_WG_OFF) +#define VSCC_WSR_OFF 3 /* 3: Write Status Required */ +#define VSCC_WSR (0x1 << VSCC_WSR_OFF) +#define VSCC_WEWS_OFF 4 /* 4: Write Enable on Write Status */ +#define VSCC_WEWS (0x1 << VSCC_WEWS_OFF) + /* 5-7: reserved */ +#define VSCC_EO_OFF 8 /* 8-15: Erase Opcode */ +#define VSCC_EO (0xff << VSCC_EO_OFF) +#define VSCC_VCL_OFF 23 /* 23: Vendor Component Lock */ +#define VSCC_VCL (0x1 << VSCC_VCL_OFF) + /* 24-31: reserved */ + // ICH9R SPI commands #define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 #define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 @@ -305,6 +324,7 @@ static void pretty_print_opcodes(OPCODES *ops) } #define pprint_reg(reg, bit, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) +#define pprint_reg_hex(reg, bit, val, sep) msg_pdbg("%s=0x%x" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) static void prettyprint_ich9_reg_hsfs(uint16_t reg_val) { msg_pdbg("HSFS: "); @@ -348,6 +368,16 @@ static void prettyprint_ich9_reg_ssfc(uint32_t reg_val) pprint_reg(SSFC, SCF, reg_val, "\n"); } +static void prettyprint_ich9_reg_vscc(uint32_t reg_val) +{ + pprint_reg_hex(VSCC, EBS, reg_val, ", "); + pprint_reg(VSCC, WG, reg_val, ", "); + pprint_reg(VSCC, WSR, reg_val, ", "); + pprint_reg(VSCC, WEWS, reg_val, ", "); + pprint_reg_hex(VSCC, EO, reg_val, ", "); + pprint_reg(VSCC, VCL, reg_val, "\n"); +} + static uint8_t lookup_spi_type(uint8_t opcode) { int a; @@ -1312,6 +1342,17 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); msg_pdbg("0xA0: 0x%08x (BBAR)\n", ichspi_bbar); + + tmp = mmio_readl(ich_spibar + ICH9_REG_LVSCC); + msg_pdbg("0xC4: 0x%08x (LVSCC)\n", tmp); + msg_pdbg("LVSCC: "); + prettyprint_ich9_reg_vscc(tmp); + + tmp = mmio_readl(ich_spibar + ICH9_REG_UVSCC); + msg_pdbg("0xC8: 0x%08x (UVSCC)\n", tmp); + msg_pdbg("UVSCC: "); + prettyprint_ich9_reg_vscc(tmp); + msg_pdbg("\n"); if (ichspi_desc) { read_ich_descriptors_from_fdo(ich_spibar); -- 1.7.1

1 0

[PATCH 08/12] simplify ich_set_bbar
by Stefan Tauner 08 Jun '11

08 Jun '11

~10 lines less, documenting better what the differences are (i.e. offset of BBAR only). Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 49 ++++++++++++++++++++----------------------------- 1 files changed, 20 insertions(+), 29 deletions(-) diff --git a/ichspi.c b/ichspi.c index d8df898..fd983ce 100644 --- a/ichspi.c +++ b/ichspi.c @@ -549,45 +549,36 @@ static int program_opcodes(OPCODES *op, int enable_undo) * Try to set BBAR (BIOS Base Address Register), but read back the value in case * it didn't stick. */ -void ich_set_bbar(uint32_t minaddr) +void ich_set_bbar(uint32_t min_addr) { - minaddr &= BBAR_MASK; + void *bbar_addr; switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: - ichspi_bbar = mmio_readl(ich_spibar + 0x50) & ~BBAR_MASK; - if (ichspi_bbar) { - msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", - ichspi_bbar); - } - ichspi_bbar |= minaddr; - rmmio_writel(ichspi_bbar, ich_spibar + 0x50); - ichspi_bbar = mmio_readl(ich_spibar + 0x50); - /* We don't have any option except complaining. And if the write - * failed, the restore will fail as well, so no problem there. - */ - if (ichspi_bbar != minaddr) - msg_perr("Setting BBAR failed!\n"); + bbar_addr = ich_spibar + 0x50; break; case SPI_CONTROLLER_ICH9: - ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR) & ~BBAR_MASK; - if (ichspi_bbar) { - msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", - ichspi_bbar); - } - ichspi_bbar |= minaddr; - rmmio_writel(ichspi_bbar, ich_spibar + ICH9_REG_BBAR); - ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); - /* We don't have any option except complaining. And if the write - * failed, the restore will fail as well, so no problem there. - */ - if (ichspi_bbar != minaddr) - msg_perr("Setting BBAR failed!\n"); + bbar_addr = ich_spibar + ICH9_REG_BBAR; break; default: msg_perr("Unknown chipset for BBAR setting!\n"); - break; + return; + } + if (ichspi_bbar) { + msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", + ichspi_bbar); } + + min_addr &= BBAR_MASK; + ichspi_bbar |= min_addr; + rmmio_writel(ichspi_bbar, bbar_addr); + ichspi_bbar = mmio_readl(bbar_addr); + + /* We don't have any option except complaining. And if the write + * failed, the restore will fail as well, so no problem there. + */ + if (ichspi_bbar != min_addr) + msg_perr("Setting BBAR failed!\n"); } /* This function generates OPCODES from or programs OPCODES to ICH according to -- 1.7.1

1 0

[PATCH 07/12] add ICH/PCH flash descriptor decoding
by Stefan Tauner 08 Jun '11

08 Jun '11

based on the work of Matthias 'mazzoo' Wenzel this patch adds... - pretty printing of those ICH/PCH flash descriptors that are cached/mapped by the chipset (and which are therefore reachable via FDOC/FDOD registers) and - a new tool to the util directory that is able to decode all flash descriptors stored in a flash dump file. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Makefile | 2 +- ich_descriptors.c | 453 ++++++++++++++++++++++ ich_descriptors.h | 408 +++++++++++++++++++ ichspi.c | 10 + util/ich_descriptors_tool/Makefile | 42 ++ util/ich_descriptors_tool/TODO | 5 + util/ich_descriptors_tool/ich_descriptors_tool.c | 226 +++++++++++ 7 files changed, 1145 insertions(+), 1 deletions(-) create mode 100644 ich_descriptors.c create mode 100644 ich_descriptors.h create mode 100644 util/ich_descriptors_tool/Makefile create mode 100644 util/ich_descriptors_tool/TODO create mode 100644 util/ich_descriptors_tool/ich_descriptors_tool.c diff --git a/Makefile b/Makefile index 6e6e2de..b61031f 100644 --- a/Makefile +++ b/Makefile @@ -223,7 +223,7 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o # FIXME: The PROGRAMMER_OBJS below should only be included on x86. -PROGRAMMER_OBJS += it87spi.o it85spi.o ichspi.o sb600spi.o wbsio_spi.o mcp6x_spi.o +PROGRAMMER_OBJS += it87spi.o it85spi.o ichspi.o ich_descriptors.o sb600spi.o wbsio_spi.o mcp6x_spi.o NEED_PCI := yes endif diff --git a/ich_descriptors.c b/ich_descriptors.c new file mode 100644 index 0000000..0b03624 --- /dev/null +++ b/ich_descriptors.c @@ -0,0 +1,453 @@ +/* This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * authors: + * (c) 2010 Matthias Wenzel <bios at mazzoo dot de> + * (c) 2011 Stefan Tauner + */ + +#include "ich_descriptors.h" + +#if defined(__i386__) || defined(__x86_64__) + +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP + +#define DESCRIPTOR_MODE_MAGIC 0x0ff0a55a +#define msg_pdbg printf +#include <stdio.h> + +struct flash_strap fisba; +struct flash_upper_map flumap; + +#else + +#include "flash.h" /* for msg_* */ + +#endif // ICH_DESCRIPTORS_FROM_MMAP_DUMP + +struct flash_descriptor fdbar = { 0 }; +struct flash_component fcba = { {0} }; +struct flash_region frba = { {0} }; +struct flash_master fmba = { {0} }; + +uint32_t getFCBA() +{ + return (fdbar.FLMAP0 << 4) & 0x00000ff0; +} + +uint32_t getFRBA() +{ + return (fdbar.FLMAP0 >> 12) & 0x00000ff0; +} + +uint32_t getFMBA() +{ + return (fdbar.FLMAP1 << 4) & 0x00000ff0; +} + +uint32_t getFMSBA() +{ + return (fdbar.FLMAP2 << 4) & 0x00000ff0; +} + +uint32_t getFLREG_limit(uint32_t flreg) +{ + return (flreg >> 4) & 0x01fff000; +} + +uint32_t getFLREG_base(uint32_t flreg) +{ + return (flreg << 12) & 0x01fff000; +} + +uint32_t getFISBA() +{ + return (fdbar.FLMAP1 >> 12) & 0x00000ff0; +} + +/** Returns the integer representation of the component density with index +comp in bytes or 0 if a correct size can not be determined. */ +int getFCBA_component_density(uint8_t comp) +{ + uint8_t size_enc; + const int dec_mem[6] = { + 512 * 1024, + 1 * 1024 * 1024, + 2 * 1024 * 1024, + 4 * 1024 * 1024, + 8 * 1024 * 1024, + 16 * 1024 * 1024, + }; + + switch(comp) { + case 0: + size_enc = fcba.comp1_density; + break; + case 1: + if (fdbar.NC == 0) + return 0; + size_enc = fcba.comp2_density; + break; + default: + msg_perr("Only component index 0 or 1 are supported yet.\n"); + return 0; + } + if (size_enc > 5) { + msg_perr("Density of component with index %d illegal or " + "unsupported. Encoded density is 0x%x.\n", + comp, + size_enc); + return 0; + } + return dec_mem[size_enc]; +} + +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP +uint32_t getVTBA() +{ + return (flumap.FLUMAP1 << 4) & 0x0ff0; +} +#endif + +const struct flash_descriptor_addresses desc_addr = { + .FCBA = getFCBA, + .FRBA = getFRBA, + .FMBA = getFMBA, + .FMSBA = getFMSBA, + .FISBA = getFISBA, + .FLREG_limit = getFLREG_limit, + .FLREG_base = getFLREG_base, +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP + .VTBA = getVTBA, +#endif +}; + +void pretty_print_ich_descriptors() +{ + pretty_print_ich_descriptor_map(); + pretty_print_ich_descriptor_component(); + pretty_print_ich_descriptor_region(); + pretty_print_ich_descriptor_master(); +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP + pretty_print_ich_descriptor_upper_map(); + /* FIXME: detect chipset correctly */ + pretty_print_ich_descriptor_straps(CHIPSET_SERIES_5_IBEX_PEAK); +#endif // ICH_DESCRIPTORS_FROM_MMAP_DUMP + msg_pdbg("\n"); +} + +void pretty_print_ich_descriptor_map(void) +{ + msg_pdbg("=== FDBAR ===\n"); + msg_pdbg("FLVALSIG 0x%8.8x\n", fdbar.FLVALSIG); + msg_pdbg("FLMAP0 0x%8.8x\n", fdbar.FLMAP0 ); + msg_pdbg("FLMAP1 0x%8.8x\n", fdbar.FLMAP1 ); + msg_pdbg("FLMAP2 0x%8.8x\n", fdbar.FLMAP2 ); + msg_pdbg("\n"); + msg_pdbg("--- FDBAR details ---\n"); + msg_pdbg("0x%2.2x NR Number of Regions\n", fdbar.NR ); + msg_pdbg("0x%8.8x FRBA Flash Region Base Address\n", desc_addr.FRBA() ); + msg_pdbg("0x%2.2x NC Number of Components\n", fdbar.NC ); + msg_pdbg("0x%8.8x FCBA Flash Component Base Address\n", desc_addr.FCBA() ); + msg_pdbg("\n"); + msg_pdbg("0x%2.2x ISL ICH Strap Length\n", fdbar.ISL ); + msg_pdbg("0x%8.8x FISBA Flash ICH Strap Base Address\n", desc_addr.FISBA()); + msg_pdbg("0x%2.2x NM Number of Masters\n", fdbar.NM ); + msg_pdbg("0x%8.8x FMBA Flash Master Base Address\n", desc_addr.FMBA() ); + msg_pdbg("\n"); + msg_pdbg("0x%2.2x MSL MCH Strap Length\n", fdbar.MSL ); + msg_pdbg("0x%8.8x FMSBA Flash MCH Strap Base Address\n", desc_addr.FMSBA()); +} + +void pretty_print_ich_descriptor_component(void) +{ + const char * str_freq[8] = { + "20 MHz", /* 000 */ + "33 MHz", /* 001 */ + "reserved/illegal", /* 010 */ + "reserved/illegal", /* 011 */ + "50 MHz", /* 100 */ + "reserved/illegal", /* 101 */ + "reserved/illegal", /* 110 */ + "reserved/illegal" /* 111 */ + }; + const char * str_mem[8] = { + "512kB", + "1 MB", + "2 MB", + "4 MB", + "8 MB", + "16 MB", + "undocumented/illegal", + "reserved/illegal" + }; + + msg_pdbg("\n"); + msg_pdbg("=== FCBA ===\n"); + msg_pdbg("FLCOMP 0x%8.8x\n", fcba.FLCOMP); + msg_pdbg("FLILL 0x%8.8x\n", fcba.FLILL ); + msg_pdbg("\n"); + msg_pdbg("--- FCBA details ---\n"); + msg_pdbg("0x%2.2x freq_read_id %s\n", + fcba.freq_read_id , str_freq[fcba.freq_read_id ]); + msg_pdbg("0x%2.2x freq_write %s\n", + fcba.freq_write , str_freq[fcba.freq_write ]); + msg_pdbg("0x%2.2x freq_fastread %s\n", + fcba.freq_fastread, str_freq[fcba.freq_fastread]); + msg_pdbg("0x%2.2x fastread %ssupported\n", + fcba.fastread, fcba.fastread ? "" : "not "); + msg_pdbg("0x%2.2x freq_read %s\n", + fcba.freq_read, str_freq[fcba.freq_read ]); + msg_pdbg("0x%2.2x comp 1 density %s\n", + fcba.comp1_density, str_mem[fcba.comp1_density]); + if (fdbar.NC) + msg_pdbg("0x%2.2x comp 2 density %s\n", + fcba.comp2_density, str_mem[fcba.comp2_density]); + else + msg_pdbg("0x%2.2x comp 2 is not used (FLMAP0.NC=0)\n", + fcba.comp2_density); + msg_pdbg("\n"); + msg_pdbg("0x%2.2x invalid instr 0\n", fcba.invalid_instr0); + msg_pdbg("0x%2.2x invalid instr 1\n", fcba.invalid_instr1); + msg_pdbg("0x%2.2x invalid instr 2\n", fcba.invalid_instr2); + msg_pdbg("0x%2.2x invalid instr 3\n", fcba.invalid_instr3); +} + +void pretty_print_ich_descriptor_region(void) +{ + msg_pdbg("\n"); + msg_pdbg("=== FRBA ===\n"); + msg_pdbg("FLREG0 0x%8.8x\n", frba.FLREG0); + msg_pdbg("FLREG1 0x%8.8x\n", frba.FLREG1); + msg_pdbg("FLREG2 0x%8.8x\n", frba.FLREG2); + msg_pdbg("FLREG3 0x%8.8x\n", frba.FLREG3); + msg_pdbg("\n"); + msg_pdbg("--- FRBA details ---\n"); + msg_pdbg("0x%8.8x region 0 limit (descr)\n", desc_addr.FLREG_limit(frba.FLREG0)); + msg_pdbg("0x%8.8x region 0 base (descr)\n", desc_addr.FLREG_base(frba.FLREG0)); + msg_pdbg("0x%8.8x region 1 limit ( BIOS)\n", desc_addr.FLREG_limit(frba.FLREG1)); + msg_pdbg("0x%8.8x region 1 base ( BIOS)\n", desc_addr.FLREG_base(frba.FLREG1)); + msg_pdbg("0x%8.8x region 2 limit ( ME )\n", desc_addr.FLREG_limit(frba.FLREG2)); + msg_pdbg("0x%8.8x region 2 base ( ME )\n", desc_addr.FLREG_base(frba.FLREG2)); + msg_pdbg("0x%8.8x region 3 limit ( GbE )\n", desc_addr.FLREG_limit(frba.FLREG3)); + msg_pdbg("0x%8.8x region 3 base ( GbE )\n", desc_addr.FLREG_base(frba.FLREG3)); +} + +void pretty_print_ich_descriptor_master(void) +{ + msg_pdbg("\n"); + msg_pdbg("=== FMBA ===\n"); + msg_pdbg("FLMSTR1 0x%8.8x\n", fmba.FLMSTR1); + msg_pdbg("FLMSTR2 0x%8.8x\n", fmba.FLMSTR2); + msg_pdbg("FLMSTR3 0x%8.8x\n", fmba.FLMSTR3); + + msg_pdbg("\n"); + msg_pdbg("--- FMBA details ---\n"); + msg_pdbg("BIOS can %s write GbE\n", fmba.BIOS_GbE_write ? " " : "NOT"); + msg_pdbg("BIOS can %s write ME\n", fmba.BIOS_ME_write ? " " : "NOT"); + msg_pdbg("BIOS can %s write BIOS\n", fmba.BIOS_BIOS_write ? " " : "NOT"); + msg_pdbg("BIOS can %s write descr\n", fmba.BIOS_descr_write ? " " : "NOT"); + msg_pdbg("BIOS can %s read GbE\n", fmba.BIOS_GbE_read ? " " : "NOT"); + msg_pdbg("BIOS can %s read ME\n", fmba.BIOS_ME_read ? " " : "NOT"); + msg_pdbg("BIOS can %s read BIOS\n", fmba.BIOS_BIOS_read ? " " : "NOT"); + msg_pdbg("BIOS can %s read descr\n", fmba.BIOS_descr_read ? " " : "NOT"); + msg_pdbg("ME can %s write GbE\n", fmba.ME_GbE_write ? " " : "NOT"); + msg_pdbg("ME can %s write ME\n", fmba.ME_ME_write ? " " : "NOT"); + msg_pdbg("ME can %s write BIOS\n", fmba.ME_BIOS_write ? " " : "NOT"); + msg_pdbg("ME can %s write descr\n", fmba.ME_descr_write ? " " : "NOT"); + msg_pdbg("ME can %s read GbE\n", fmba.ME_GbE_read ? " " : "NOT"); + msg_pdbg("ME can %s read ME\n", fmba.ME_ME_read ? " " : "NOT"); + msg_pdbg("ME can %s read BIOS\n", fmba.ME_BIOS_read ? " " : "NOT"); + msg_pdbg("ME can %s read descr\n", fmba.ME_descr_read ? " " : "NOT"); + msg_pdbg("GbE can %s write GbE\n", fmba.GbE_GbE_write ? " " : "NOT"); + msg_pdbg("GbE can %s write ME\n", fmba.GbE_ME_write ? " " : "NOT"); + msg_pdbg("GbE can %s write BIOS\n", fmba.GbE_BIOS_write ? " " : "NOT"); + msg_pdbg("GbE can %s write descr\n", fmba.GbE_descr_write ? " " : "NOT"); + msg_pdbg("GbE can %s read GbE\n", fmba.GbE_GbE_read ? " " : "NOT"); + msg_pdbg("GbE can %s read ME\n", fmba.GbE_ME_read ? " " : "NOT"); + msg_pdbg("GbE can %s read BIOS\n", fmba.GbE_BIOS_read ? " " : "NOT"); + msg_pdbg("GbE can %s read descr\n", fmba.GbE_descr_read ? " " : "NOT"); +} + +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP +void pretty_print_ich_descriptor_straps_ich8(void) +{ + const char * str_GPIO12[4] = { + "GPIO12", + "LAN PHY Power Control Function (Native Output)", + " GLAN_DOCK# (Native Input)", + "invalid configuration", + }; + + msg_pdbg("\n"); + msg_pdbg("=== FISBA ===\n"); + msg_pdbg("STRP0 0x%8.8x\n", fisba.ich8.STRP0); + + msg_pdbg("\n"); + msg_pdbg("--- FISBA details ---\n"); + msg_pdbg("ME SMBus addr2 0x%2.2x\n", fisba.ich8.ASD2); + msg_pdbg("ME SMBus addr1 0x%2.2x\n", fisba.ich8.ASD); + msg_pdbg("ME SMBus Controller is connected to %s\n", fisba.ich8.MESM2SEL ? "SMLink pins" : "SMBus pins"); + msg_pdbg("SPI CS1 is used for %s\n", fisba.ich8.SPICS1_LANPHYPC_SEL ? "LAN PHY Power Control Function" : "SPI Chip Select"); + msg_pdbg("GPIO12_SEL is used as %s\n", str_GPIO12[fisba.ich8.GPIO12_SEL]); + msg_pdbg("PCIe Port 6 is used for %s\n", fisba.ich8.GLAN_PCIE_SEL ? "integrated GLAN" : "PCI Express"); + msg_pdbg("Intel AMT SMBus Controller 1 is connected to %s\n", fisba.ich8.BMCMODE ? "SMLink" : "SMBus"); + msg_pdbg("TCO slave is on %s. Intel AMT SMBus Controller 1 is %sabled\n", + fisba.ich8.TCOMODE ? "SMBus" : "SMLink", fisba.ich8.TCOMODE ? "en" : "dis"); + msg_pdbg("ME A is %sabled\n", fisba.ich8.ME_DISABLE ? "dis" : "en"); + + msg_pdbg("\n"); + msg_pdbg("=== FMSBA ===\n"); + msg_pdbg("STRP1 0x%8.8x\n", fisba.ich8.STRP1); + + msg_pdbg("\n"); + msg_pdbg("--- FMSBA details ---\n"); + msg_pdbg("ME B is %sabled\n", fisba.ich8.ME_disable_B ? "dis" : "en"); +} + +void pretty_print_ich_descriptor_straps_ibex(void) +{ + int i; + msg_pdbg("\n"); + msg_pdbg("=== FPSBA ===\n"); + for(i = 0; i <= 15; i++) + msg_pdbg("STRP%-2d = 0x%8.8x\n", i, fisba.ibex.STRPs[i]); +} + +void pretty_print_ich_descriptor_straps(enum chipset cs) +{ + switch (cs) { + case CHIPSET_ICH8: + pretty_print_ich_descriptor_straps_ich8(); + break; + case CHIPSET_SERIES_5_IBEX_PEAK: + pretty_print_ich_descriptor_straps_ibex(); + break; + default: + break; + } +} + +void pretty_print_ich_descriptor_upper_map(void) +{ + int i; + msg_pdbg("\n"); + msg_pdbg("=== FLUMAP ===\n"); + msg_pdbg("FLUMAP1 0x%8.8x\n", flumap.FLUMAP1); + + msg_pdbg("\n"); + msg_pdbg("--- FLUMAP details ---\n"); + msg_pdbg("VTL 0x%8.8x\n", flumap.VTL); + msg_pdbg("VTBA 0x%8.8x\n", desc_addr.VTBA()); + msg_pdbg("\n"); + + for (i=0; i < flumap.VTL/2; i++) + { + msg_pdbg(" JID%d = 0x%8.8x\n", i, flumap.vscc_table[i].JID ); + msg_pdbg(" VSCC%d = 0x%8.8x\n", i, flumap.vscc_table[i].VSCC); + } +} + +int read_ich_descriptors_from_dump(uint32_t *dump) +{ + int i; + uint8_t pch_bug_offset = 0; + if (dump[0] != DESCRIPTOR_MODE_MAGIC) { + if (dump[4] == DESCRIPTOR_MODE_MAGIC) + pch_bug_offset = 4; + else + return -1; + } + + /* map */ + fdbar.FLVALSIG = dump[0 + pch_bug_offset]; + fdbar.FLMAP0 = dump[1 + pch_bug_offset]; + fdbar.FLMAP1 = dump[2 + pch_bug_offset]; + fdbar.FLMAP2 = dump[3 + pch_bug_offset]; + + /* component */ + fcba.FLCOMP = dump[(desc_addr.FCBA() >> 2) + 0]; + fcba.FLILL = dump[(desc_addr.FCBA() >> 2) + 1]; + fcba.FLPB = dump[(desc_addr.FCBA() >> 2) + 2]; + + /* region */ + frba.FLREG0 = dump[(desc_addr.FRBA() >> 2) + 0]; + frba.FLREG1 = dump[(desc_addr.FRBA() >> 2) + 1]; + frba.FLREG2 = dump[(desc_addr.FRBA() >> 2) + 2]; + frba.FLREG3 = dump[(desc_addr.FRBA() >> 2) + 3]; + + /* master */ + fmba.FLMSTR1 = dump[(desc_addr.FMBA() >> 2) + 0]; + fmba.FLMSTR2 = dump[(desc_addr.FMBA() >> 2) + 1]; + fmba.FLMSTR3 = dump[(desc_addr.FMBA() >> 2) + 2]; + + /* upper map */ + flumap.FLUMAP1 = dump[(0x0efc >> 2) + 0]; + + for (i=0; i < flumap.VTL; i++) + { + flumap.vscc_table[i].JID = dump[(desc_addr.VTBA() >> 2) + i * 2 + 0]; + flumap.vscc_table[i].VSCC = dump[(desc_addr.VTBA() >> 2) + i * 2 + 1]; + } + /* straps */ + /* FIXME: detect chipset correctly */ + switch (CHIPSET_SERIES_5_IBEX_PEAK) { + case CHIPSET_ICH8: + fisba.ich8.STRP0 = dump[(desc_addr.FISBA() >> 2) + 0]; + fisba.ich8.STRP1 = dump[(desc_addr.FMSBA() >> 2) + 0]; + break; + case CHIPSET_SERIES_5_IBEX_PEAK: + for(i = 0; i <= 15; i++) + fisba.ibex.STRPs[i] = dump[(desc_addr.FISBA() >> 2) + i]; + break; + default: + break; + } + + return 0; +} +#else // ICH_DESCRIPTORS_FROM_MMAP_DUMP + +static uint32_t read_descriptor_reg(uint8_t section, uint16_t offset, void *spibar) +{ + uint32_t control = 0; + control |= (section << FDOC_FDSS_OFF) & FDOC_FDSS; + control |= (offset << FDOC_FDSI_OFF) & FDOC_FDSI; + *(volatile uint32_t *) (spibar + ICH9_REG_FDOC) = control; + return *(volatile uint32_t *)(spibar + ICH9_REG_FDOD); +} + +void read_ich_descriptors_from_fdo(void *spibar) +{ + msg_pdbg("Reading flash descriptors " + "mapped by the chipset via FDOC/FDOD..."); + /* descriptor map section */ + fdbar.FLVALSIG = read_descriptor_reg(0, 0, spibar); + fdbar.FLMAP0 = read_descriptor_reg(0, 1, spibar); + fdbar.FLMAP1 = read_descriptor_reg(0, 2, spibar); + fdbar.FLMAP2 = read_descriptor_reg(0, 3, spibar); + + /* component section */ + fcba.FLCOMP = read_descriptor_reg(1, 0, spibar); + fcba.FLILL = read_descriptor_reg(1, 1, spibar); + fcba.FLPB = read_descriptor_reg(1, 2, spibar); + + /* region section */ + frba.FLREG0 = read_descriptor_reg(2, 0, spibar); + frba.FLREG1 = read_descriptor_reg(2, 1, spibar); + frba.FLREG2 = read_descriptor_reg(2, 2, spibar); + frba.FLREG3 = read_descriptor_reg(2, 3, spibar); + + /* master section */ + fmba.FLMSTR1 = read_descriptor_reg(3, 0, spibar); + fmba.FLMSTR2 = read_descriptor_reg(3, 1, spibar); + fmba.FLMSTR3 = read_descriptor_reg(3, 2, spibar); + + /* strap section and upper map */ + /* impossible via FDOC/FDOD(?) */ + msg_pdbg(" done\n"); +} + +#endif // ICH_DESCRIPTORS_FROM_MMAP_DUMP +#endif // defined(__i386__) || defined(__x86_64__) diff --git a/ich_descriptors.h b/ich_descriptors.h new file mode 100644 index 0000000..af9d0ba --- /dev/null +++ b/ich_descriptors.h @@ -0,0 +1,408 @@ +/* This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * authors: + * (c) 2010 Matthias Wenzel <bios at mazzoo dot de> + * (c) 2011 Stefan Tauner + */ + +#include <stdint.h> + +#if defined(__i386__) || defined(__x86_64__) +#ifndef __ICH_DESCRIPTORS_H__ +#define __ICH_DESCRIPTORS_H__ 1 + +/* should probably be in ichspi.h */ +#define ICH9_REG_FDOC 0xB0 /* 32 Bits Flash Descriptor Observability Control */ +#define FDOC_FDSI_OFF 2 /* 2-11: Flash Descriptor Section Select */ +#define FDOC_FDSI (0x3f << FDOC_FDSI_OFF) +#define FDOC_FDSS_OFF 12 /* 12-14: Flash Descriptor Section Select */ +#define FDOC_FDSS (0x3 << FDOC_FDSS_OFF) +#define ICH9_REG_FDOD 0xB4 /* 32 Bits Flash Descriptor Observability Data */ + +enum chipset { + CHIPSET_ICH8, + CHIPSET_ICH9, + CHIPSET_ICH10, + CHIPSET_SERIES_5_IBEX_PEAK, + CHIPSET_SERIES_6_COUGAR_POINT, + CHIPSET_SERIES_7_PANTHER_POINT +}; + +struct flash_descriptor_addresses { + uint32_t (*FCBA)(void); + uint32_t (*FRBA)(void); + uint32_t (*FMBA)(void); + uint32_t (*FMSBA)(void); + uint32_t (*FLREG_limit)(uint32_t flreg); + uint32_t (*FLREG_base)(uint32_t flreg); + uint32_t (*FISBA)(void); +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP + uint32_t (*VTBA)(void); +#endif // ICH_DESCRIPTORS_FROM_MMAP_DUMP +}; + +struct flash_descriptor { + uint32_t FLVALSIG; /* 0x00 */ + union { /* 0x04 */ + uint32_t FLMAP0; + struct { + uint8_t FCBA :8; + uint8_t NC :2; + unsigned :6; + uint8_t FRBA :8; + uint8_t NR :3; + unsigned :5; + }; + }; + union { /* 0x08 */ + uint32_t FLMAP1; + struct { + uint8_t FMBA :8; + uint8_t NM :3; + unsigned :5; + union { + uint8_t FISBA :8; + uint8_t FPSBA :8; + }; + uint8_t ISL :8; + }; + }; + union { /* 0x0c */ + uint32_t FLMAP2; + struct { + uint8_t FMSBA :8; + uint8_t MSL :8; + unsigned :16; + }; + }; +}; + +struct flash_component { + union { /* 0x00 */ + uint32_t FLCOMP; + struct { + uint8_t comp1_density :3; + uint8_t comp2_density :3; + unsigned :11; + uint8_t freq_read :3; + uint8_t fastread :1; + uint8_t freq_fastread :3; + uint8_t freq_write :3; + uint8_t freq_read_id :3; + unsigned :2; + }; + }; + union { /* 0x04 */ + uint32_t FLILL; + struct { + uint8_t invalid_instr0; + uint8_t invalid_instr1; + uint8_t invalid_instr2; + uint8_t invalid_instr3; + }; + }; + union { /* 0x08 */ + uint32_t FLPB; + struct { + uint16_t FPBA :13; + unsigned :19; + }; + }; +}; + +struct flash_region { + + union { + uint32_t FLREG0; /* Flash Descriptor */ + struct { + uint16_t reg0_base :13; + unsigned :3; + uint16_t reg0_limit :13; + unsigned :3; + }; + }; + union { + uint32_t FLREG1; /* BIOS */ + struct { + uint16_t reg1_base :13; + unsigned :3; + uint16_t reg1_limit :13; + unsigned :3; + }; + }; + union { + uint32_t FLREG2; /* ME */ + struct { + uint16_t reg2_base :13; + unsigned :3; + uint16_t reg2_limit :13; + unsigned :3; + }; + }; + union { + uint32_t FLREG3; /* GbE */ + struct { + uint16_t reg3_base :13; + unsigned :3; + uint16_t reg3_limit :13; + unsigned :3; + }; + }; +} frba; + +struct flash_master { + union { + uint32_t FLMSTR1; + struct { + uint16_t BIOS_req_ID :16; + uint8_t BIOS_descr_read :1; + uint8_t BIOS_BIOS_read :1; + uint8_t BIOS_ME_read :1; + uint8_t BIOS_GbE_read :1; + uint8_t BIOS_plat_read :1; + unsigned :3; + uint8_t BIOS_descr_write :1; + uint8_t BIOS_BIOS_write :1; + uint8_t BIOS_ME_write :1; + uint8_t BIOS_GbE_write :1; + uint8_t BIOS_plat_write :1; + unsigned :3; + }; + }; + union { + uint32_t FLMSTR2; + struct { + uint16_t ME_req_ID :16; + uint8_t ME_descr_read :1; + uint8_t ME_BIOS_read :1; + uint8_t ME_ME_read :1; + uint8_t ME_GbE_read :1; + uint8_t ME_plat_read :1; + unsigned :3; + uint8_t ME_descr_write :1; + uint8_t ME_BIOS_write :1; + uint8_t ME_ME_write :1; + uint8_t ME_GbE_write :1; + uint8_t ME_plat_write :1; + unsigned :3; + }; + }; + union { + uint32_t FLMSTR3; + struct { + uint16_t GbE_req_ID :16; + uint8_t GbE_descr_read :1; + uint8_t GbE_BIOS_read :1; + uint8_t GbE_ME_read :1; + uint8_t GbE_GbE_read :1; + uint8_t GbE_plat_read :1; + unsigned :3; + uint8_t GbE_descr_write :1; + uint8_t GbE_BIOS_write :1; + uint8_t GbE_ME_write :1; + uint8_t GbE_GbE_write :1; + uint8_t GbE_plat_write :1; + unsigned :3; + }; + }; +}; + +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP +struct flash_strap { + union { + struct { + union { + uint32_t STRP0; + struct { + uint8_t ME_DISABLE :1; + unsigned :6; + uint8_t TCOMODE :1; + uint8_t ASD :7; + uint8_t BMCMODE :1; + unsigned :3; + uint8_t GLAN_PCIE_SEL :1; + uint8_t GPIO12_SEL :2; + uint8_t SPICS1_LANPHYPC_SEL :1; + uint8_t MESM2SEL :1; + unsigned :1; + uint8_t ASD2 :7; + }; + }; + union { + uint32_t STRP1; + struct { + uint8_t ME_disable_B :1; + unsigned :31; + }; + }; + }ich8; + union { + uint32_t STRPs[15]; + struct { + union { + uint32_t STRP0; + struct { + unsigned :1; + uint8_t cs_ss2 :1; + unsigned :5; + uint8_t SMB_EN :1; + uint8_t SML0_EN :1; + uint8_t SML1_EN :1; + uint8_t SML1FRQ :2; + uint8_t SMB0FRQ :2; + uint8_t SML0FRQ :2; + unsigned :4; + uint8_t LANPHYPC_GP12_SEL :1; + uint8_t cs_ss1 :1; + unsigned :2; + uint8_t DMI_REQID_DIS :1; + unsigned :4; + uint8_t BBBS :2; + unsigned :1; + }; + }; + union { + uint32_t STRP1; + struct { + }; + }; + union { + uint32_t STRP2; + struct { + }; + }; + union { + uint32_t STRP3; + struct { + }; + }; + union { + uint32_t STRP4; + struct { + }; + }; + union { + uint32_t STRP5; + struct { + }; + }; + union { + uint32_t STRP6; + struct { + }; + }; + union { + uint32_t STRP7; + struct { + }; + }; + union { + uint32_t STRP8; + struct { + }; + }; + union { + uint32_t STRP9; + struct { + }; + }; + union { + uint32_t STRP10; + struct { + }; + }; + union { + uint32_t STRP11; + struct { + }; + }; + union { + uint32_t STRP12; + struct { + }; + }; + union { + uint32_t STRP13; + struct { + }; + }; + union { + uint32_t STRP14; + struct { + }; + }; + union { + uint32_t STRP15; + struct { + }; + }; + }; + }ibex; + }; +}; + +struct flash_upper_map { + union { + uint32_t FLUMAP1; + struct { + uint8_t VTBA :8; + uint8_t VTL :8; + unsigned :16; + }; + }; + struct { + union { + uint32_t JID; + struct { + uint8_t vid :8; + uint8_t cid0 :8; + uint8_t cid1 :8; + unsigned :8; + }; + }; + union { + uint32_t VSCC; + struct { + uint8_t ubes :2; + uint8_t uwg :1; + uint8_t uwsr :1; + uint8_t uwews :1; + unsigned :3; + uint8_t ueo :8; + uint8_t lbes :2; + uint8_t lwg :1; + uint8_t lwsr :1; + uint8_t lwews :1; + unsigned :3; + uint16_t leo :16; + }; + }; + }vscc_table[128]; +}; +#endif // ICH_DESCRIPTORS_FROM_MMAP_DUMP + +void pretty_print_ich_descriptors(void); + +void pretty_print_ich_descriptor_map(void); +void pretty_print_ich_descriptor_component(void); +void pretty_print_ich_descriptor_region(void); +void pretty_print_ich_descriptor_master(void); + +int getFCBA_component_density(uint8_t comp); + +#ifdef ICH_DESCRIPTORS_FROM_MMAP_DUMP + +void pretty_print_ich_descriptor_upper_map(void); +void pretty_print_ich_descriptor_straps(enum chipset cs); +int read_ich_descriptors_from_dump(uint32_t *dump); + +#else // ICH_DESCRIPTORS_FROM_MMAP_DUMP + +void read_ich_descriptors_from_fdo(void *spibar); + +#endif // ICH_DESCRIPTORS_FROM_MMAP_DUMP + +#endif // __ICH_DESCRIPTORS_H__ +#endif // defined(__i386__) || defined(__x86_64__) diff --git a/ichspi.c b/ichspi.c index 584cab4..d8df898 100644 --- a/ichspi.c +++ b/ichspi.c @@ -6,6 +6,7 @@ * Copyright (C) 2008 Dominik Geyer <dominik.geyer(a)kontron.com> * Copyright (C) 2008 coresystems GmbH <info(a)coresystems.de> * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger + * Copyright (C) 2011 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -41,6 +42,7 @@ #include "chipdrivers.h" #include "programmer.h" #include "spi.h" +#include "ich_descriptors.h" /* ICH9 controller register definition */ #define ICH9_REG_HSFS 0x04 /* 16 Bits Hardware Sequencing Flash Status */ @@ -1197,6 +1199,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, uint8_t old, new; uint16_t spibar_offset, tmp2; uint32_t tmp; + int ichspi_desc = 0; switch (ich_generation) { case 7: @@ -1268,6 +1271,8 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } + if (tmp2 & HSFS_FDV) + ichspi_desc = 1; tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFC); msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); @@ -1316,6 +1321,11 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); msg_pdbg("0xA0: 0x%08x (BBAR)\n", ichspi_bbar); + msg_pdbg("\n"); + if (ichspi_desc) { + read_ich_descriptors_from_fdo(ich_spibar); + pretty_print_ich_descriptors(); + } ich_init_opcodes(); break; default: diff --git a/util/ich_descriptors_tool/Makefile b/util/ich_descriptors_tool/Makefile new file mode 100644 index 0000000..9b1d096 --- /dev/null +++ b/util/ich_descriptors_tool/Makefile @@ -0,0 +1,42 @@ +CC ?= gcc + +PROGRAM=ich_descriptors_tool +EXTRAINCDIRS = ../../ . +DEPPATH = .dep +OBJATH = .obj +SHAREDSRC = ich_descriptors.c +SHAREDSRCDIR = ../.. + +SRC = $(wildcard *.c) + +CFLAGS=-Wall +CFLAGS += -MMD -MP -MF $(DEPPATH)/$((a)F).d +# enables functions that populate the descriptor structs from plain dump arrays +CFLAGS += -D ICH_DESCRIPTORS_FROM_MMAP_DUMP +CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) + +OBJ = $(OBJATH)/$(SRC:%.c=%.o) + +SHAREDOBJ = $(OBJATH)/$(notdir $(SHAREDSRC:%.c=%.o)) + +all:$(PROGRAM) + +$(OBJ): $(OBJATH)/%.o : %.c + $(CC) $(CFLAGS) -o $@ -c $< + +# this enables us to NOT share object files with flashrom, +# which would lead to unexpected results otherwise (w/o running make clean) +$(SHAREDOBJ): $(OBJATH)/%.o : $(SHAREDSRCDIR)/%.c + $(CC) $(CFLAGS) -o $@ -c $< + +$(PROGRAM): $(OBJ) $(SHAREDOBJ) + $(CC) -o $(PROGRAM) $(OBJ) $(SHAREDOBJ) + +clean: + rm -f $(PROGRAM) + rm -rf $(DEPPATH) $(OBJATH) + +# Include the dependency files. +-include $(shell mkdir -p $(DEPPATH) $(OBJATH) 2>/dev/null) $(wildcard $(DEPPATH)/*) + +.PHONY: all clean \ No newline at end of file diff --git a/util/ich_descriptors_tool/TODO b/util/ich_descriptors_tool/TODO new file mode 100644 index 0000000..e3933ee --- /dev/null +++ b/util/ich_descriptors_tool/TODO @@ -0,0 +1,5 @@ +- reverse the path, as in assemble a descriptormode image from various + blobs (BIOS, GbE, ME, OEM) and a description (xml? custom config? + sane defaults and cmd-line switches?) +- dump 256 OEM bytes +- handle descriptors of various chipsets correctly \ No newline at end of file diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c new file mode 100644 index 0000000..8ce7677 --- /dev/null +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -0,0 +1,226 @@ +/* + * dump information and binaries from BIOS images that are in descriptor mode/soft-strap + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * authors: + * (c) 2010 Matthias Wenzel <bios at mazzoo dot de> + * (c) 2011 Stefan Tauner + * + * */ +#include <stdio.h> +#include <stdint.h> +#include <stdlib.h> +#include <sys/mman.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <fcntl.h> +#include <unistd.h> +#include <string.h> +#include <errno.h> +#include "flash.h" +#include "ich_descriptors.h" + +extern struct flash_descriptor fdbar; +extern struct flash_component fcba; +extern struct flash_region frba; +extern struct flash_master fmba; +extern struct flash_strap fisba; +extern struct flash_upper_map flumap; +extern struct flash_descriptor_addresses desc_addr; + +static int f; /* file descriptor to flash file */ +static int fs; /* file size */ +static uint32_t *fm; /* mmap'd file */ + +void dump_file_descriptor(char * fn) +{ + char * n = malloc(strlen(fn) + 11); + snprintf(n, strlen(fn) + 11, "%s.descr.bin", fn); + printf("\n"); + printf("+++ dumping %s ... ", n); + int fh = open(n, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); + free(n); + if (fh < 0) + { + printf("ERROR: couldn't open(%s): %s\n", n, strerror(errno)); + exit(1); + } + + int ret; + ret = write(fh, &fm[frba.reg0_base >> 2], frba.reg0_limit); + if (ret != frba.reg0_limit) + { + printf("FAILED.\n"); + exit(1); + } + + printf("done.\n"); + + close(fh); +} + +void dump_file_BIOS(char * fn) +{ + char * n = malloc(strlen(fn) + 10); + snprintf(n, strlen(fn) + 10, "%s.BIOS.bin", fn); + printf("\n"); + printf("+++ dumping %s ... ", n); + int fh = open(n, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); + free(n); + if (fh < 0) + { + printf("ERROR: couldn't open(%s): %s\n", n, strerror(errno)); + exit(1); + } + + int ret; + ret = write(fh, &fm[frba.reg1_base >> 2], frba.reg1_limit); + if (ret != frba.reg1_limit) + { + printf("FAILED.\n"); + exit(1); + } + + printf("done.\n"); + + close(fh); +} + +void dump_file_ME(char * fn) +{ + char * n = malloc(strlen(fn) + 8); + snprintf(n, strlen(fn) + 8, "%s.ME.bin", fn); + printf("\n"); + printf("+++ dumping %s ... ", n); + int fh = open(n, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); + free(n); + if (fh < 0) + { + printf("ERROR: couldn't open(%s): %s\n", n, strerror(errno)); + exit(1); + } + + int ret; + ret = write(fh, &fm[frba.reg2_base >> 2], frba.reg2_limit); + if (ret != frba.reg2_limit) + { + printf("FAILED.\n"); + exit(1); + } + + printf("done.\n"); + + close(fh); +} + +void dump_file_GbE(char * fn) +{ + char * n = malloc(strlen(fn) + 9); + snprintf(n, strlen(fn) + 9, "%s.GbE.bin", fn); + printf("\n"); + printf("+++ dumping %s ... ", n); + int fh = open(n, O_WRONLY | O_CREAT, S_IRUSR | S_IWUSR); + free(n); + if (fh < 0) + { + printf("ERROR: couldn't open(%s): %s\n", n, strerror(errno)); + exit(1); + } + + int ret; + ret = write(fh, &fm[frba.reg3_base >> 2], frba.reg3_limit); + if (ret != frba.reg3_limit) + { + printf("FAILED.\n"); + exit(1); + } + + printf("done.\n"); + uint8_t * pMAC = (uint8_t *) &fm[frba.reg3_base >> 2]; + printf("the MAC-address might be: %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n", + pMAC[0], + pMAC[1], + pMAC[2], + pMAC[3], + pMAC[4], + pMAC[5] + ); + + close(fh); +} + +void dump_files(char * n) +{ + printf("=== dumping section files ===\n"); + if (frba.reg0_limit) + dump_file_descriptor(n); + if (frba.reg1_limit) + dump_file_BIOS(n); + if (frba.reg2_limit) + dump_file_ME(n); + if (frba.reg3_limit) + dump_file_GbE(n); +} + +void usage(char ** argv, char* error) +{ + printf("%s\n", error); + printf("\n"); + printf("usage: '%s <bios image file> [-d]'\n", argv[0]); + printf("\n"); + printf("\twhere <bios image file> isn't actually a BIOS image, but the SPI flash\n"); + printf("\tcontents of the SPI connected to your intel chipset.\n"); + printf("\tIn case that image is really in descriptor mode (a.k.a soft-strap)\n"); + printf("\t%s will pretty print all relevant information.\n", argv[0]); + printf("\tIf '-d' is specified as the second parameter some sections such as\n"); + printf("\tthe real BIOS image as seen by the CPU or a GbE blob that is\n"); + printf("\trequired to initialize your ICH GbE are also dumped to files.\n"); + exit(1); +} + +int main(int argc, char **argv) +{ + if (argc < 2) + usage(argv, "Need at least one parameter"); + f = open(argv[1], O_RDONLY); + if (f < 0) + usage(argv, "No such file"); + if (argc >= 3 && (strcmp("-d", argv[2]) == 0)) + usage(argv, "Bogus second argument"); + + fs = lseek(f, 0, SEEK_END); + if (fs < 0) + usage(argv, "Seeking to the end of the file failed"); + + fm = mmap(NULL, fs, PROT_READ, MAP_PRIVATE, f, 0); + if (fm == (void *) -1) + { + /* fallback for stupid OSes like cygwin */ + int ret; + fm = malloc(fs); + if (!fm) + usage(argv, "Could not allocate memory"); + lseek(f, 0, SEEK_SET); + ret = read(f, fm, fs); + if (ret != fs) + usage(argv, "Seeking to the end of the file failed"); + } + printf("flash image is %d [0x%x] bytes\n", fs, fs); + close(f); + + if(read_ich_descriptors_from_dump(fm)){ + printf("not in descriptor mode\n"); + exit(1); + } + + pretty_print_ich_descriptors(); + + if (argc >= 3) + dump_files(argv[1]); + + return 0; +} + -- 1.7.1

1 0

[PATCH 06/12] add missing ICH9 register macros and use them to eliminate magic numbers
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 63 ++++++++++++++++++++++++++++++++++++------------------------- 1 files changed, 37 insertions(+), 26 deletions(-) diff --git a/ichspi.c b/ichspi.c index dff6f32..584cab4 100644 --- a/ichspi.c +++ b/ichspi.c @@ -77,6 +77,15 @@ #define ICH9_REG_FADDR 0x08 /* 32 Bits */ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ +#define ICH9_REG_FRAP 0x50 /* 32 Bytes Flash Region Access Permissions */ +#define ICH9_REG_FREG0 0x54 /* 32 Bytes Flash Region 0 */ + +#define ICH9_REG_PR0 0x74 /* 32 Bytes Protected Range 0 */ +#define ICH9_REG_PR1 0x78 /* 32 Bytes Protected Range 1 */ +#define ICH9_REG_PR2 0x7c /* 32 Bytes Protected Range 2 */ +#define ICH9_REG_PR3 0x80 /* 32 Bytes Protected Range 3 */ +#define ICH9_REG_PR4 0x84 /* 32 Bytes Protected Range 4 */ + #define ICH9_REG_SSFS 0x90 /* 08 Bits */ #define SSFS_SCIP_OFF 0 /* SPI Cycle In Progress */ #define SSFS_SCIP (0x1 << SSFS_SCIP_OFF) @@ -117,6 +126,9 @@ #define ICH9_REG_OPTYPE 0x96 /* 16 Bits */ #define ICH9_REG_OPMENU 0x98 /* 64 Bits */ +#define ICH9_REG_BBAR 0xA0 /* 32 Bits BIOS Base Address Configuration */ +#define BBAR_MASK 0x00ffff00 /* 8-23: Bottom of System Flash */ + // ICH9R SPI commands #define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 #define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 @@ -537,15 +549,15 @@ static int program_opcodes(OPCODES *op, int enable_undo) */ void ich_set_bbar(uint32_t minaddr) { -#define BBAR_MASK 0x00ffff00 minaddr &= BBAR_MASK; switch (spi_programmer->type) { case SPI_CONTROLLER_ICH7: case SPI_CONTROLLER_VIA: ichspi_bbar = mmio_readl(ich_spibar + 0x50) & ~BBAR_MASK; - if (ichspi_bbar) + if (ichspi_bbar) { msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", ichspi_bbar); + } ichspi_bbar |= minaddr; rmmio_writel(ichspi_bbar, ich_spibar + 0x50); ichspi_bbar = mmio_readl(ich_spibar + 0x50); @@ -556,13 +568,14 @@ void ich_set_bbar(uint32_t minaddr) msg_perr("Setting BBAR failed!\n"); break; case SPI_CONTROLLER_ICH9: - ichspi_bbar = mmio_readl(ich_spibar + 0xA0) & ~BBAR_MASK; - if (ichspi_bbar) + ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR) & ~BBAR_MASK; + if (ichspi_bbar) { msg_pdbg("Reserved bits in BBAR not zero: 0x%04x", ichspi_bbar); + } ichspi_bbar |= minaddr; - rmmio_writel(ichspi_bbar, ich_spibar + 0xA0); - ichspi_bbar = mmio_readl(ich_spibar + 0xA0); + rmmio_writel(ichspi_bbar, ich_spibar + ICH9_REG_BBAR); + ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); /* We don't have any option except complaining. And if the write * failed, the restore will fail as well, so no problem there. */ @@ -1138,7 +1151,7 @@ static void do_ich9_spi_frap(uint32_t frap, int i) uint32_t base, limit; int rwperms = (((ICH_BRWA(frap) >> i) & 1) << 1) | (((ICH_BRRA(frap) >> i) & 1) << 0); - int offset = 0x54 + i * 4; + int offset = ICH9_REG_FREG0 + i * 4; uint32_t freg = mmio_readl(ich_spibar + offset); msg_pdbg("0x%02X: 0x%08x (FREG%i: %s)\n", @@ -1248,19 +1261,19 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, ich_init_opcodes(); break; case SPI_CONTROLLER_ICH9: - tmp2 = mmio_readw(ich_spibar + 4); + tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFS); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); prettyprint_ich9_reg_hsfs(tmp2); - if (tmp2 & (1 << 15)) { + if (tmp2 & HSFS_FLOCKDN) { msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); ichspi_lock = 1; } - tmp2 = mmio_readw(ich_spibar + 6); + tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFC); msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); prettyprint_ich9_reg_hsfc(tmp2); - tmp = mmio_readl(ich_spibar + 0x50); + tmp = mmio_readl(ich_spibar + ICH9_REG_FRAP); msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp); msg_pdbg("BMWAG 0x%02x, ", ICH_BMWAG(tmp)); msg_pdbg("BMRAG 0x%02x, ", ICH_BMRAG(tmp)); @@ -1272,39 +1285,37 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, do_ich9_spi_frap(tmp, i); msg_pdbg("0x74: 0x%08x (PR0)\n", - mmio_readl(ich_spibar + 0x74)); + mmio_readl(ich_spibar + ICH9_REG_PR0)); msg_pdbg("0x78: 0x%08x (PR1)\n", - mmio_readl(ich_spibar + 0x78)); + mmio_readl(ich_spibar + ICH9_REG_PR1)); msg_pdbg("0x7C: 0x%08x (PR2)\n", - mmio_readl(ich_spibar + 0x7C)); + mmio_readl(ich_spibar + ICH9_REG_PR2)); msg_pdbg("0x80: 0x%08x (PR3)\n", - mmio_readl(ich_spibar + 0x80)); + mmio_readl(ich_spibar + ICH9_REG_PR3)); msg_pdbg("0x84: 0x%08x (PR4)\n", - mmio_readl(ich_spibar + 0x84)); + mmio_readl(ich_spibar + ICH9_REG_PR4)); - tmp = mmio_readl(ich_spibar + 0x90); + tmp = mmio_readl(ich_spibar + ICH9_REG_SSFS); msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); prettyprint_ich9_reg_ssfs(tmp); - if (tmp & (1 << 3)) { + if (tmp & SSFS_FCERR) { msg_pdbg("Clearing SSFS.FCERR\n"); - mmio_writeb(1 << 3, ich_spibar + 0x90); + mmio_writeb(SSFS_FCERR, ich_spibar + ICH9_REG_SSFS); } msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp >> 8); prettyprint_ich9_reg_ssfc(tmp); msg_pdbg("0x94: 0x%04x (PREOP)\n", - mmio_readw(ich_spibar + 0x94)); + mmio_readw(ich_spibar + ICH9_REG_PREOP)); msg_pdbg("0x96: 0x%04x (OPTYPE)\n", - mmio_readw(ich_spibar + 0x96)); + mmio_readw(ich_spibar + ICH9_REG_OPTYPE)); msg_pdbg("0x98: 0x%08x (OPMENU)\n", - mmio_readl(ich_spibar + 0x98)); + mmio_readl(ich_spibar + ICH9_REG_OPMENU)); msg_pdbg("0x9C: 0x%08x (OPMENU+4)\n", - mmio_readl(ich_spibar + 0x9C)); - ichspi_bbar = mmio_readl(ich_spibar + 0xA0); + mmio_readl(ich_spibar + ICH9_REG_OPMENU + 4)); + ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR); msg_pdbg("0xA0: 0x%08x (BBAR)\n", ichspi_bbar); - msg_pdbg("0xB0: 0x%08x (FDOC)\n", - mmio_readl(ich_spibar + 0xB0)); ich_init_opcodes(); break; default: -- 1.7.1

1 0

[PATCH 05/12] warn if SMM BIOS Write Protection is detected in BIOS_CNTL
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index b5385dc..5f1a6fd 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -264,8 +264,17 @@ static int enable_flash_ich(struct pci_dev *dev, const char *name, (old & (1 << 0)) ? "en" : "dis"); msg_pdbg("BIOS_CNTL is 0x%x\n", old); - new = old | 1; + /* + * Quote from the 6 Series datasheet: + * "5: SMM BIOS Write Protect Disable (SMM_BWP) + * 1 = BIOS region SMM protection is enabled. + * The BIOS Region is not writable unless all processors are in SMM." + * In earlier chipsets this bit is reserved. */ + if (old & (1 << 5)) { + msg_pinfo("WARNING: BIOS region SMM protection is enabled!\n"); + } + new = old | 1; if (new == old) return 0; -- 1.7.1

1 0

[PATCH 04/12] use the max_data_read field of the new spi_programmer struct to simplify run_opcode.
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 41 +++++++++++++++++------------------------ 1 files changed, 17 insertions(+), 24 deletions(-) diff --git a/ichspi.c b/ichspi.c index 12727d1..dff6f32 100644 --- a/ichspi.c +++ b/ichspi.c @@ -913,37 +913,30 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, static int run_opcode(OPCODE op, uint32_t offset, uint8_t datalength, uint8_t * data) { + uint8_t maxlength = spi_programmer->max_data_read; + + if (spi_programmer->type == SPI_CONTROLLER_NONE) { + msg_perr("%s: unsupported chipset\n", __func__); + return -1; + } + + if (datalength > maxlength) { + msg_perr("%s: Internal command size error for " + "opcode 0x%02x, got datalength=%i, want <=%i\n", + __func__, op.opcode, datalength, maxlength); + return SPI_INVALID_LENGTH; + } + switch (spi_programmer->type) { case SPI_CONTROLLER_VIA: - if (datalength > 16) { - msg_perr("%s: Internal command size error for " - "opcode 0x%02x, got datalength=%i, want <=16\n", - __func__, op.opcode, datalength); - return SPI_INVALID_LENGTH; - } - return ich7_run_opcode(op, offset, datalength, data, 16); case SPI_CONTROLLER_ICH7: - if (datalength > 64) { - msg_perr("%s: Internal command size error for " - "opcode 0x%02x, got datalength=%i, want <=16\n", - __func__, op.opcode, datalength); - return SPI_INVALID_LENGTH; - } - return ich7_run_opcode(op, offset, datalength, data, 64); + return ich7_run_opcode(op, offset, datalength, data, maxlength); case SPI_CONTROLLER_ICH9: - if (datalength > 64) { - msg_perr("%s: Internal command size error for " - "opcode 0x%02x, got datalength=%i, want <=16\n", - __func__, op.opcode, datalength); - return SPI_INVALID_LENGTH; - } return ich9_run_opcode(op, offset, datalength, data); default: - msg_perr("%s: unsupported chipset\n", __func__); + /* If we ever get here, something really weird happened */ + return -1; } - - /* If we ever get here, something really weird happened */ - return -1; } static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, -- 1.7.1

1 0

[PATCH 03/12] add macros and pretty printing for HSFS and HSFC
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++---------- 1 files changed, 62 insertions(+), 12 deletions(-) diff --git a/ichspi.c b/ichspi.c index 7e4a363..12727d1 100644 --- a/ichspi.c +++ b/ichspi.c @@ -43,6 +43,37 @@ #include "spi.h" /* ICH9 controller register definition */ +#define ICH9_REG_HSFS 0x04 /* 16 Bits Hardware Sequencing Flash Status */ +#define HSFS_FDONE_OFF 0 /* 0: Flash Cycle Done */ +#define HSFS_FDONE (0x1 << HSFS_FDONE_OFF) +#define HSFS_FCERR_OFF 1 /* 1: Flash Cycle Error */ +#define HSFS_FCERR (0x1 << HSFS_FCERR_OFF) +#define HSFS_AEL_OFF 2 /* 2: Access Error Log */ +#define HSFS_AEL (0x1 << HSFS_AEL_OFF) +#define HSFS_BERASE_OFF 3 /* 3-4: Block/Sector Erase Size */ +#define HSFS_BERASE (0x1 << HSFS_BERASE_OFF) +#define HSFS_SCIP_OFF 5 /* 5: SPI Cycle In Progress */ +#define HSFS_SCIP (0x1 << HSFS_SCIP_OFF) + /* 6-12: reserved */ +#define HSFS_FDOPSS_OFF 13 /* 13: Flash Descriptor Override Pin-Strap Status */ +#define HSFS_FDOPSS (0x1 << HSFS_FDOPSS_OFF) +#define HSFS_FDV_OFF 14 /* 14: Flash Descriptor Valid */ +#define HSFS_FDV (0x1 << HSFS_FDV_OFF) +#define HSFS_FLOCKDN_OFF 15 /* 15: Flash Configuration Lock-Down */ +#define HSFS_FLOCKDN (0x1 << HSFS_FLOCKDN_OFF) + +#define ICH9_REG_HSFC 0x06 /* 16 Bits Hardware Sequencing Flash Control */ +#define HSFC_FGO_OFF 0 /* 0: Flash Cycle Go */ +#define HSFC_FGO (0x1 << HSFC_FGO_OFF) +#define HSFC_FCYCLE_OFF 1 /* 1-2: FLASH Cycle */ +#define HSFC_FCYCLE (0x3 << HSFC_FCYCLE_OFF) + /* 3-7: reserved */ +#define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ +#define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) + /* 14: reserved */ +#define HSFC_SME_OFF 15 /* 15: SPI SMI# Enable */ +#define HSFC_SME (0x1 << HSFC_SME_OFF) + #define ICH9_REG_FADDR 0x08 /* 32 Bits */ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ @@ -260,6 +291,28 @@ static void pretty_print_opcodes(OPCODES *ops) } #define pprint_reg(reg, bit, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) +static void prettyprint_ich9_reg_hsfs(uint16_t reg_val) +{ + msg_pdbg("HSFS: "); + pprint_reg(HSFS, FDONE, reg_val, ", "); + pprint_reg(HSFS, FCERR, reg_val, ", "); + pprint_reg(HSFS, AEL, reg_val, ", "); + pprint_reg(HSFS, BERASE, reg_val, ", "); + pprint_reg(HSFS, SCIP, reg_val, ", "); + pprint_reg(HSFS, FDOPSS, reg_val, ", "); + pprint_reg(HSFS, FDV, reg_val, ", "); + pprint_reg(HSFS, FLOCKDN, reg_val, "\n"); +} + +static void prettyprint_ich9_reg_hsfc(uint16_t reg_val) +{ + msg_pdbg("HSFC: "); + pprint_reg(HSFC, FGO, reg_val, ", "); + pprint_reg(HSFC, FCYCLE, reg_val, ", "); + pprint_reg(HSFC, FDBC, reg_val, ", "); + pprint_reg(HSFC, SME, reg_val, "\n"); +} + static void prettyprint_ich9_reg_ssfs(uint32_t reg_val) { msg_pdbg("SSFS: "); @@ -1204,14 +1257,15 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, case SPI_CONTROLLER_ICH9: tmp2 = mmio_readw(ich_spibar + 4); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); - msg_pdbg("FLOCKDN %i, ", (tmp2 >> 15 & 1)); - msg_pdbg("FDV %i, ", (tmp2 >> 14) & 1); - msg_pdbg("FDOPSS %i, ", (tmp2 >> 13) & 1); - msg_pdbg("SCIP %i, ", (tmp2 >> 5) & 1); - msg_pdbg("BERASE %i, ", (tmp2 >> 3) & 3); - msg_pdbg("AEL %i, ", (tmp2 >> 2) & 1); - msg_pdbg("FCERR %i, ", (tmp2 >> 1) & 1); - msg_pdbg("FDONE %i\n", (tmp2 >> 0) & 1); + prettyprint_ich9_reg_hsfs(tmp2); + if (tmp2 & (1 << 15)) { + msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); + ichspi_lock = 1; + } + + tmp2 = mmio_readw(ich_spibar + 6); + msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2); + prettyprint_ich9_reg_hsfc(tmp2); tmp = mmio_readl(ich_spibar + 0x50); msg_pdbg("0x50: 0x%08x (FRAP)\n", tmp); @@ -1258,10 +1312,6 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, ichspi_bbar); msg_pdbg("0xB0: 0x%08x (FDOC)\n", mmio_readl(ich_spibar + 0xB0)); - if (tmp2 & (1 << 15)) { - msg_pinfo("WARNING: SPI Configuration Lockdown activated.\n"); - ichspi_lock = 1; - } ich_init_opcodes(); break; default: -- 1.7.1

1 0

[PATCH 02/12] add pretty printing functions for SSFS+SSFC and the OPCODE struct and use them
by Stefan Tauner 08 Jun '11

08 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 51 +++++++++++++++++++++++++++++++++++++++++++++------ 1 files changed, 45 insertions(+), 6 deletions(-) diff --git a/ichspi.c b/ichspi.c index 676b93a..7e4a363 100644 --- a/ichspi.c +++ b/ichspi.c @@ -243,6 +243,44 @@ static OPCODE POSSIBLE_OPCODES[] = { static OPCODES O_EXISTING = {}; +/* pretty printing functions */ +static void pretty_print_opcodes(OPCODES *ops) +{ + if(ops == NULL) + return; + + msg_pdbg("preop0=0x%02x, preop1=0x%02x\n", ops->preop[0], ops->preop[1]); + + OPCODE oc; + uint8_t i; + for (i = 0; i < 8; i++) { + oc = ops->opcode[i]; + msg_pdbg("op[%d]=0x%02x, %d, %d\n", i, oc.opcode, oc.spi_type, oc.atomic); + } +} + +#define pprint_reg(reg, bit, val, sep) msg_pdbg("%s=%d" sep, #bit, (val & reg##_##bit)>>reg##_##bit##_OFF) +static void prettyprint_ich9_reg_ssfs(uint32_t reg_val) +{ + msg_pdbg("SSFS: "); + pprint_reg(SSFS, SCIP, reg_val, ", "); + pprint_reg(SSFS, FDONE, reg_val, ", "); + pprint_reg(SSFS, FCERR, reg_val, ", "); + pprint_reg(SSFS, AEL, reg_val, "\n"); +} + +static void prettyprint_ich9_reg_ssfc(uint32_t reg_val) +{ + msg_pdbg("SSFC: "); + pprint_reg(SSFC, SCGO, reg_val, ", "); + pprint_reg(SSFC, ACS, reg_val, ", "); + pprint_reg(SSFC, SPOP, reg_val, ", "); + pprint_reg(SSFC, COP, reg_val, ", "); + pprint_reg(SSFC, DBC, reg_val, ", "); + pprint_reg(SSFC, SME, reg_val, ", "); + pprint_reg(SSFC, SCF, reg_val, "\n"); +} + static uint8_t lookup_spi_type(uint8_t opcode) { int a; @@ -519,6 +557,8 @@ static int ich_init_opcodes(void) } else { curopcodes = curopcodes_done; msg_pdbg("done\n"); + pretty_print_opcodes(curopcodes); + msg_pdbg("\n"); return 0; } } @@ -793,6 +833,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, temp32 = REGREAD32(ICH9_REG_SSFS); if (temp32 & SSFS_FCERR) { msg_perr("Transaction error!\n"); + prettyprint_ich9_reg_ssfs(temp32); + prettyprint_ich9_reg_ssfc(temp32); /* keep reserved bits */ temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; /* Clear the transaction error. */ @@ -1195,16 +1237,13 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, tmp = mmio_readl(ich_spibar + 0x90); msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); - msg_pdbg("AEL %i, ", (tmp >> 4) & 1); - msg_pdbg("FCERR %i, ", (tmp >> 3) & 1); - msg_pdbg("FDONE %i, ", (tmp >> 2) & 1); - msg_pdbg("SCIP %i\n", (tmp >> 0) & 1); + prettyprint_ich9_reg_ssfs(tmp); if (tmp & (1 << 3)) { msg_pdbg("Clearing SSFS.FCERR\n"); mmio_writeb(1 << 3, ich_spibar + 0x90); } - tmp >>= 8; - msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp); + msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp >> 8); + prettyprint_ich9_reg_ssfc(tmp); msg_pdbg("0x94: 0x%04x (PREOP)\n", mmio_readw(ich_spibar + 0x94)); -- 1.7.1

1 0

[PATCH 01/12] improve macros for SSFS and SSFC bits
by Stefan Tauner 08 Jun '11

08 Jun '11

- introduce offset macros and use them to (re)define the existing mask macros - add comments - rename SSFS_CDS to SSFS_FDONE (abbr. used in datasheet not in SSFS but HSFS) - use those for refactoring and magic number elemination. - following patch uses them for pretty printing Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- ichspi.c | 48 ++++++++++++++++++++++++++++++------------------ 1 files changed, 30 insertions(+), 18 deletions(-) diff --git a/ichspi.c b/ichspi.c index 299cbf3..676b93a 100644 --- a/ichspi.c +++ b/ichspi.c @@ -47,24 +47,36 @@ #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ #define ICH9_REG_SSFS 0x90 /* 08 Bits */ -#define SSFS_SCIP 0x00000001 -#define SSFS_CDS 0x00000004 -#define SSFS_FCERR 0x00000008 -#define SSFS_AEL 0x00000010 +#define SSFS_SCIP_OFF 0 /* SPI Cycle In Progress */ +#define SSFS_SCIP (0x1 << SSFS_SCIP_OFF) +#define SSFS_FDONE_OFF 2 /* Cycle Done Status */ +#define SSFS_FDONE (0x1 << SSFS_FDONE_OFF) +#define SSFS_FCERR_OFF 3 /* Flash Cycle Error */ +#define SSFS_FCERR (0x1 << SSFS_FCERR_OFF) +#define SSFS_AEL_OFF 4 /* Access Error Log */ +#define SSFS_AEL (0x1 << SSFS_AEL_OFF) /* The following bits are reserved in SSFS: 1,5-7. */ #define SSFS_RESERVED_MASK 0x000000e2 #define ICH9_REG_SSFC 0x91 /* 24 Bits */ -#define SSFC_SCGO 0x00000200 -#define SSFC_ACS 0x00000400 -#define SSFC_SPOP 0x00000800 -#define SSFC_COP 0x00001000 -#define SSFC_DBC 0x00010000 -#define SSFC_DS 0x00400000 -#define SSFC_SME 0x00800000 -#define SSFC_SCF 0x01000000 -#define SSFC_SCF_20MHZ 0x00000000 -#define SSFC_SCF_33MHZ 0x01000000 +#define SSFC_SCGO_OFF (1 + 8) /* 1: SPI Cycle Go */ +#define SSFC_SCGO (0x1 << SSFC_SCGO_OFF) +#define SSFC_ACS_OFF (2 + 8) /* 2: Atomic Cycle Sequence */ +#define SSFC_ACS (0x1 << SSFC_ACS_OFF) +#define SSFC_SPOP_OFF (3 + 8) /* 3: Sequence Prefix Opcode Pointer */ +#define SSFC_SPOP (0x1 << SSFC_SPOP_OFF) +#define SSFC_COP_OFF (4 + 8) /* 4-6: Cycle Opcode Pointer */ +#define SSFC_COP (0x7 << SSFC_COP_OFF) +#define SSFC_DBC_OFF (8 + 8) /* 8-13: Data Byte Count */ +#define SSFC_DBC (0x3f << SSFC_DBC_OFF) +#define SSFC_DS_OFF (14 + 8) /* 14: Data Cycle */ +#define SSFC_DS (0x1 << SSFC_DS_OFF) +#define SSFC_SME_OFF (15 + 8) /* 15: SPI SMI# Enable */ +#define SSFC_SME (0x1 << SSFC_SME_OFF) +#define SSFC_SCF_OFF (16 + 8) /* 16-18: SPI Cycle Frequency */ +#define SSFC_SCF (0x7 << SSFC_SCF_OFF) +#define SSFC_SCF_20MHZ 0x00000000 +#define SSFC_SCF_33MHZ 0x01000000 /* We combine SSFS and SSFC to one 32-bit word, * therefore SSFC bits are off by 8. * The following bits are reserved in SSFC: 23-19,7,0. */ @@ -709,8 +721,8 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, temp32 = REGREAD32(ICH9_REG_SSFS); /* Keep reserved bits only */ temp32 &= SSFS_RESERVED_MASK | SSFC_RESERVED_MASK; - /* clear error status registers */ - temp32 |= (SSFS_CDS + SSFS_FCERR); + /* Clear cycle done and cycle error status registers */ + temp32 |= (SSFS_FDONE + SSFS_FCERR); REGWRITE32(ICH9_REG_SSFS, temp32); /* Use 20 MHz */ @@ -720,7 +732,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, if (datalength != 0) { uint32_t datatemp; temp32 |= SSFC_DS; - datatemp = ((uint32_t) ((datalength - 1) & 0x3f)) << (8 + 8); + datatemp = (uint32_t) (((datalength - 1) << SSFC_DBC_OFF) & SSFC_DBC); temp32 |= datatemp; } @@ -767,7 +779,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, REGWRITE32(ICH9_REG_SSFS, temp32); /* Wait for Cycle Done Status or Flash Cycle Error. */ - while (((REGREAD32(ICH9_REG_SSFS) & (SSFS_CDS | SSFS_FCERR)) == 0) && + while (((REGREAD32(ICH9_REG_SSFS) & (SSFS_FDONE | SSFS_FCERR)) == 0) && --timeout) { programmer_delay(10); } -- 1.7.1

1 0

[PATCH 00/12] ichspi patches 4.1
by Stefan Tauner 08 Jun '11

08 Jun '11

since the squash thingy does not apply cleanly (rebases etc in between), i am posting the current state of my ichspi branch (without the mei stuff). Stefan Tauner (12): improve macros for SSFS and SSFC bits add pretty printing functions for SSFS+SSFC and the OPCODE struct and use them add macros and pretty printing for HSFS and HSFC use the max_data_read field of the new spi_programmer struct to simplify run_opcode. warn if SMM BIOS Write Protection is detected in BIOS_CNTL add missing ICH9 register macros and use them to eliminate magic numbers add ICH/PCH flash descriptor decoding simplify ich_set_bbar add macros and pretty printing for "Host Lower Vendor Specific Component Capabilities" registers add FPB (Flash Partition Boundary) macros and init printing add support for Intel Hardware Sequencing add intel 6 series pci ids to chipset_enables Makefile | 2 +- chipdrivers.h | 6 + chipset_enable.c | 25 +- flashchips.c | 23 +- flashchips.h | 2 + flashrom.c | 6 +- ich_descriptors.c | 453 ++++++++++++++ ich_descriptors.h | 408 +++++++++++++ ichspi.c | 706 ++++++++++++++++++---- programmer.h | 1 + util/ich_descriptors_tool/Makefile | 42 ++ util/ich_descriptors_tool/TODO | 5 + util/ich_descriptors_tool/ich_descriptors_tool.c | 226 +++++++ 13 files changed, 1782 insertions(+), 123 deletions(-) create mode 100644 ich_descriptors.c create mode 100644 ich_descriptors.h create mode 100644 util/ich_descriptors_tool/Makefile create mode 100644 util/ich_descriptors_tool/TODO create mode 100644 util/ich_descriptors_tool/ich_descriptors_tool.c

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[PATCH 1/1] Mark another MS-7529 m/b (G31TM-P21) as supported
by Peter Lemenkov 06 Jun '11

06 Jun '11

Original report: http://www.flashrom.org/pipermail/flashrom/2011-May/006594.html Manufacturer's page: http://msi.com/product/mb/G31TM-P21.html Tested-by: Peter Lemenkov <lemenkov(a)gmail.com> Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- print.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/print.c b/print.c index efe0ba5..cec6810 100644 --- a/print.c +++ b/print.c @@ -588,6 +588,7 @@ const struct board_info boards_known[] = { B("MSI", "MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1241", NULL), B("MSI", "MS-7376 (K9A2 Platinum)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1332", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), + B("MSI", "MS-7529 (G31TM-P21)", 1, "http://msi.com/product/mb/G31TM-P21.html", NULL), B("MSI", "MS-7596 (785GM-E51)", 1, "http://eu.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1866", NULL), B("MSI", "MS-7599 (870-C45)", 1, "http://www.msi.com/product/mb/870-C45.html", NULL), B("MSI", "MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", "Reported by \"Linux User #330250\" http://flashrom.org/pipermail/flashrom/2011-March/006072.html"), -- 1.7.5.2

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[commit] r1325 - trunk
by repository service 06 Jun '11

06 Jun '11

Author: uwe Date: Mon Jun 6 19:50:20 2011 New Revision: 1325 URL: http://flashrom.org/trac/flashrom/changeset/1325 Log: Mark the MSI MS-7529 (G31TM-P21) as supported. Original report: http://www.flashrom.org/pipermail/flashrom/2011-May/006594.html Manufacturer's page: http://msi.com/product/mb/G31TM-P21.html Tested-by: Peter Lemenkov <lemenkov(a)gmail.com> Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/print.c Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Jun 4 15:13:34 2011 (r1324) +++ trunk/print.c Mon Jun 6 19:50:20 2011 (r1325) @@ -588,6 +588,7 @@ B("MSI", "MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1241", NULL), B("MSI", "MS-7376 (K9A2 Platinum)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1332", NULL), B("MSI", "MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), + B("MSI", "MS-7529 (G31TM-P21)", 1, "http://msi.com/product/mb/G31TM-P21.html", NULL), B("MSI", "MS-7596 (785GM-E51)", 1, "http://eu.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1866", NULL), B("MSI", "MS-7599 (870-C45)", 1, "http://www.msi.com/product/mb/870-C45.html", NULL), B("MSI", "MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", "Reported by \"Linux User #330250\" http://flashrom.org/pipermail/flashrom/2011-March/006072.html"),

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Re: [flashrom] [coreboot] Flashrom -V output from E350M1/USB3
by Stefan Tauner 06 Jun '11

06 Jun '11

On Sun, 05 Jun 2011 22:44:36 -0500 Marshall Buschman <mbuschman(a)lucidmachines.com> wrote: > Here's the output. I have also successfully used flashrom on the E350M1 > vanilla (without usb3). > > fastboot ~ # flashrom -V > flashrom v0.9.3-r1205 on Linux 2.6.39-delevi (x86_64), built with libpci > 3.1.7, GCC 4.4.5, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OS timer resolution is 1 usecs, 797M loops per > second, 10 myus = 10 us, 100 myus = 103 us,. > Initializing internal programmer > Found candidate at: 00000500-00000510 > Found coreboot table at 0x00000500. > Found candidate at: 00000000-000001f8 > Found coreboot table at 0x00000000. > coreboot table found at 0xc7ffe000. > coreboot header(24) checksum: 3dea table(504) checksum: 2e62 entries: 14 > Vendor ID: ASROCK, part ID: E350M1 > DMI string system-manufacturer: "" > DMI string system-product-name: "" > DMI string system-version: "" > DMI string baseboard-manufacturer: "" > DMI string baseboard-product-name: "" > DMI string baseboard-version: "" > DMI string chassis-type: "" > Found chipset "AMD SB700/SB710/SB750", enabling flash write... chipset > PCI ID is 1002:439d, SPI base address is at 00 > AltSpiCSEnable=0, SpiRomEnable=1, AbortEnable=0 > PrefetchEnSPIFromIMC=0, PrefetchEnSPIFromHost=1, SpiOpEnInLpcMode=1 > SpiArbEnable=0, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, > ArbWaitCount=4, SpiBridgeDisable=1, DropOneClkOnRd=0 > NormSpeed is 16.5 MHz > GPIO11 used for SPI_DO > GPIO12 used for SPI_DI > GPIO31 used for SPI_HOLD > GPIO32 used for SPI_CS > GPIO47 used for SPI_CLK > SB700 IMC is not active. > ROM strap override is not active > OK. > This chipset supports the following protocols: LPC,FWH,SPI. > […] so... amd kept the same pci id for their lpc device for the last years. the e350m1 uses the A50m chipset, see http://en.wikipedia.org/wiki/Comparison_of_AMD_chipsets#Comparison_of_FCH_.… i think it is fairly save to change the chipset enable device_name to something like "SB7x0/SB8x0/SB9x0/Axx(M/E)" or maybe "SB[789]x0/A[57]x(M/E)"... but thats kinda unreadable. naming all variants explicitly is not an option either. calling them "predecessors of sb700" is not wise either (they probably WILL change the id sometime in the future...). what do you think? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 11b/11] add support for Intel Hardware Sequencing
by Stefan Tauner 05 Jun '11

05 Jun '11

yay, i have found a way around the const flashchips array. the common/general probing function that loops around the chips array actually does not use the chips form that array directly but copies each to a local non-const(!) buffer and calls the probing function with it as a non-const parameter. so we are free to modify the flashchip struct in the probing function. and this is exactly what i do. i set the total_size and the first eraser in ich_hwseq_probe accordingly to the values found in the registers (derived from the descriptors). this way we can even support dual-chip configurations easily (which i have also added). i think this is almost mergeable. it's probably easier to review this one squashed/combined with the original 11 version, especially if you did not look at that one before. we still need someone test this on real (recoverable) hardware though. :( -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1324 - trunk
by repository service 04 Jun '11

04 Jun '11

Author: stefanct Date: Sat Jun 4 15:13:34 2011 New Revision: 1324 URL: http://flashrom.org/trac/flashrom/changeset/1324 Log: add a bunch of new/tested motherboards, board/chipset enables and flash chips 2 - mark chipset enable for QS57 as OK (my thinkpad) - mark MSI G31M3-L(S) V2 (MS-7529) as OK http://www.flashrom.org/pipermail/flashrom/2011-June/006634.html - mark AT49BV512 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006609.html - mark MX25L4005 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006634.html - mark SST49LF020 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-May/006570.html - mark SST25VF064C as fully tested http://www.flashrom.org/pipermail/flashrom/2011-May/006586.html - mark W25x16 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006605.html Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipset_enable.c trunk/flashchips.c trunk/print.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Fri Jun 3 09:26:31 2011 (r1323) +++ trunk/chipset_enable.c Sat Jun 4 15:13:34 2011 (r1324) @@ -1028,7 +1028,7 @@ {0x8086, 0x3b0b, NT, "Intel", "HM57", enable_flash_ich10}, {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, {0x8086, 0x3b0e, NT, "Intel", "B55", enable_flash_ich10}, - {0x8086, 0x3b0f, NT, "Intel", "QS57", enable_flash_ich10}, + {0x8086, 0x3b0f, OK, "Intel", "QS57", enable_flash_ich10}, {0x8086, 0x3b12, NT, "Intel", "3400", enable_flash_ich10}, {0x8086, 0x3b14, NT, "Intel", "3420", enable_flash_ich10}, {0x8086, 0x3b16, NT, "Intel", "3450", enable_flash_ich10}, Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Jun 3 09:26:31 2011 (r1323) +++ trunk/flashchips.c Sat Jun 4 15:13:34 2011 (r1324) @@ -2190,7 +2190,7 @@ .total_size = 64, .page_size = 64, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* Datasheet has no timing info specified */ .block_erasers = @@ -3885,7 +3885,7 @@ .total_size = 512, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -5418,7 +5418,7 @@ .model_id = SST_SST25VF064C, .total_size = 8192, .page_size = 256, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6220,7 +6220,7 @@ .total_size = 256, .page_size = 16 * 1024, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers = @@ -7907,7 +7907,7 @@ .total_size = 2048, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = Modified: trunk/print.c ============================================================================== --- trunk/print.c Fri Jun 3 09:26:31 2011 (r1323) +++ trunk/print.c Sat Jun 4 15:13:34 2011 (r1324) @@ -582,11 +582,12 @@ B("MSI", "MS-7236 (945PL Neo3)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1173", NULL), B("MSI", "MS-7253 (K9VGM-V)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=260", NULL), B("MSI", "MS-7255 (P4M890M)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1082", NULL), - B("MSI", "MS-7260, (K9N Neo)", 0, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=255", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), + B("MSI", "MS-7260 (K9N Neo)", 0, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=255", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot. Owned by Uwe Hermann <uwe(a)hermann-uwe.de>."), B("MSI", "MS-7312 (K9MM-V)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1104", NULL), B("MSI", "MS-7345 (P35 Neo2-FIR)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1261", NULL), B("MSI", "MS-7368 (K9AG Neo2-Digital)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1241", NULL), B("MSI", "MS-7376 (K9A2 Platinum)", 1, "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1332", NULL), + B("MSI", "MS-7529 (G31M3-L(S) V2)", 1, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL), B("MSI", "MS-7596 (785GM-E51)", 1, "http://eu.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=1866", NULL), B("MSI", "MS-7599 (870-C45)", 1, "http://www.msi.com/product/mb/870-C45.html", NULL), B("MSI", "MS-7640 (890FXA-GD70)",1, "http://www.msi.com/product/mb/890FXA-GD70.html", "Reported by \"Linux User #330250\" http://flashrom.org/pipermail/flashrom/2011-March/006072.html"),

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[PATCH] print out flash chip found after probing loop in verbose mode
by Stefan Tauner 04 Jun '11

04 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- cli_classic.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/cli_classic.c b/cli_classic.c index d1b4686..78d32b2 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -397,6 +397,14 @@ int cli_classic(int argc, char *argv[]) // FIXME: flash writes stay enabled! programmer_shutdown(); exit(1); + } else if (!chip_to_probe) { + /* repeat for convenience when looking at foreign logs */ + tempstr = flashbuses_to_text(flashes[0].bustype); + msg_gdbg("%s chip \"%s %s\" (%d kB, %s).\n", + force ? "Assuming" : "Found", + flashes[0].vendor, flashes[0].name, + flashes[0].total_size, tempstr); + free(tempstr); } fill_flash = &flashes[0]; -- 1.7.1

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MSI "G31M3-L V2(MS-7529)" successful bios update.
by Dave Plater 04 Jun '11

04 Jun '11

The output of the read is followed by write output. # flashrom -Vr A7529IMS.250old flashrom v0.9.3-r1322 on Linux 2.6.38.5-25-desktop (x86_64), built with libpci 3.1.7, GCC 4.5.1 20101208 [gcc-4_5-branch revision 167585], little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1996M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1013 us, 10000 myus = 9996 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MICRO-STAR INTERNATIONAL CO.,LTD" DMI string system-product-name: "MS-7529" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "MICRO-STAR INTERNATIONAL CO.,LTD" DMI string baseboard-product-name: "G31M3-L V2(MS-7529)" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found chipset "Intel ICH7/ICH7R", enabling flash write... chipset PCI ID is 8086:27b8, 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode disabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x80000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x465: BIOS Interface Lock-Down: enabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x0004 (SPIS) 0x02: 0x7f10 (SPIC) 0x04: 0x0007ffc0 (SPIA) 0x08: 0x00000000 (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x4d494924 (SPID2+4) 0x20: 0x000dfe68 (SPID3) 0x24: 0x53544224 (SPID3+4) 0x28: 0x32353741 (SPID4) 0x2c: 0x30303239 (SPID4+4) 0x30: 0x02060920 (SPID5) 0x34: 0x00324211 (SPID5+4) 0x38: 0x00ffaaea (SPID6) 0x3c: 0x2f3630f0 (SPID6+4) 0x40: 0x302f3230 (SPID7) 0x44: 0x00fc0039 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x5006 (PREOP) 0x56: 0x462b (OPTYPE) 0x58: 0x05ab0302 (OPMENU) 0x5c: 0xc79f0190 (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: SPI. Probing for AMD Am29F010A/B, 128 kB: skipped. Probing for AMD Am29F002(N)BB, 256 kB: skipped. Probing for AMD Am29F002(N)BT, 256 kB: skipped. Probing for AMD Am29F016D, 2048 kB: skipped. Probing for AMD Am29F040B, 512 kB: skipped. Probing for AMD Am29F080B, 1024 kB: skipped. Probing for AMD Am29LV001BB, 128 kB: skipped. Probing for AMD Am29LV001BT, 128 kB: skipped. Probing for AMD Am29LV002BB, 256 kB: skipped. Probing for AMD Am29LV002BT, 256 kB: skipped. Probing for AMD Am29LV004BB, 512 kB: skipped. Probing for AMD Am29LV004BT, 512 kB: skipped. Probing for AMD Am29LV008BB, 1024 kB: skipped. Probing for AMD Am29LV008BT, 1024 kB: skipped. Probing for AMD Am29LV040B, 512 kB: skipped. Probing for AMD Am29LV081B, 1024 kB: skipped. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A29002B, 256 kB: skipped. Probing for AMIC A29002T, 256 kB: skipped. Probing for AMIC A29040B, 512 kB: skipped. Probing for AMIC A49LF040A, 512 kB: skipped. Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT29C512, 64 kB: skipped. Probing for Atmel AT29C010A, 128 kB: skipped. Probing for Atmel AT29C020, 256 kB: skipped. Probing for Atmel AT29C040A, 512 kB: skipped. Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT49BV512, 64 kB: skipped. Probing for Atmel AT49F020, 256 kB: skipped. Probing for Atmel AT49F002(N), 256 kB: skipped. Probing for Atmel AT49F002(N)T, 256 kB: skipped. Probing for Bright BM29F040, 512 kB: skipped. Probing for EMST F49B002UA, 256 kB: skipped. Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN29F010, 128 kB: skipped. Probing for Eon EN29F002(A)(N)B, 256 kB: skipped. Probing for Eon EN29F002(A)(N)T, 256 kB: skipped. Probing for Fujitsu MBM29F004BC, 512 kB: skipped. Probing for Fujitsu MBM29F004TC, 512 kB: skipped. Probing for Fujitsu MBM29F400BC, 512 kB: skipped. Probing for Fujitsu MBM29F400TC, 512 kB: skipped. Probing for Hyundai HY29F002T, 256 kB: skipped. Probing for Hyundai HY29F002B, 256 kB: skipped. Probing for Hyundai HY29F040A, 512 kB: skipped. Probing for Intel 28F001BN/BX-B, 128 kB: skipped. Probing for Intel 28F001BN/BX-T, 128 kB: skipped. Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: skipped. Probing for Intel 28F008S3/S5/SC, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: skipped. Probing for Intel 82802AB, 512 kB: skipped. Probing for Intel 82802AC, 1024 kB: skipped. Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L4005" (512 kB, SPI) at physical address 0xfff80000. Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX29F001B, 128 kB: skipped. Probing for Macronix MX29F001T, 128 kB: skipped. Probing for Macronix MX29F002B, 256 kB: skipped. Probing for Macronix MX29F002T, 256 kB: skipped. Probing for Macronix MX29F040, 512 kB: skipped. Probing for Macronix MX29LV040, 512 kB: skipped. Probing for MoselVitelic V29C51000B, 64 kB: skipped. Probing for MoselVitelic V29C51000T, 64 kB: skipped. Probing for MoselVitelic V29C51400B, 512 kB: skipped. Probing for MoselVitelic V29C51400T, 512 kB: skipped. Probing for MoselVitelic V29LC51000, 64 kB: skipped. Probing for MoselVitelic V29LC51001, 128 kB: skipped. Probing for MoselVitelic V29LC51002, 256 kB: skipped. Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm29F002T, 256 kB: skipped. Probing for PMC Pm29F002B, 256 kB: skipped. Probing for PMC Pm39LV010, 128 kB: skipped. Probing for PMC Pm39LV020, 256 kB: skipped. Probing for PMC Pm39LV040, 512 kB: skipped. Probing for PMC Pm49FL002, 256 kB: skipped. Probing for PMC Pm49FL004, 512 kB: skipped. Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Sharp LHF00L04, 1024 kB: skipped. Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25LF040A.RES, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0x12, id2 0x12 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST28SF040A, 512 kB: skipped. Probing for SST SST29EE010, 128 kB: skipped. Probing for SST SST29LE010, 128 kB: skipped. Probing for SST SST29EE020A, 256 kB: skipped. Probing for SST SST29LE020, 256 kB: skipped. Probing for SST SST39SF512, 64 kB: skipped. Probing for SST SST39SF010A, 128 kB: skipped. Probing for SST SST39SF020A, 256 kB: skipped. Probing for SST SST39SF040, 512 kB: skipped. Probing for SST SST39VF512, 64 kB: skipped. Probing for SST SST39VF010, 128 kB: skipped. Probing for SST SST39VF020, 256 kB: skipped. Probing for SST SST39VF040, 512 kB: skipped. Probing for SST SST39VF080, 1024 kB: skipped. Probing for SST SST49LF002A/B, 256 kB: skipped. Probing for SST SST49LF003A/B, 384 kB: skipped. Probing for SST SST49LF004A/B, 512 kB: skipped. Probing for SST SST49LF004C, 512 kB: skipped. Probing for SST SST49LF008A, 1024 kB: skipped. Probing for SST SST49LF008C, 1024 kB: skipped. Probing for SST SST49LF016C, 2048 kB: skipped. Probing for SST SST49LF020, 256 kB: skipped. Probing for SST SST49LF020A, 256 kB: skipped. Probing for SST SST49LF040, 512 kB: skipped. Probing for SST SST49LF040B, 512 kB: skipped. Probing for SST SST49LF080A, 1024 kB: skipped. Probing for SST SST49LF160C, 2048 kB: skipped. Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M29F002B, 256 kB: skipped. Probing for ST M29F002T/NT, 256 kB: skipped. Probing for ST M29F040B, 512 kB: skipped. Probing for ST M29F400BB, 512 kB: skipped. Probing for ST M29F400BT, 512 kB: skipped. Probing for ST M29W010B, 128 kB: skipped. Probing for ST M29W040B, 512 kB: skipped. Probing for ST M29W512B, 64 kB: skipped. Probing for ST M50FLW040A, 512 kB: skipped. Probing for ST M50FLW040B, 512 kB: skipped. Probing for ST M50FLW080A, 1024 kB: skipped. Probing for ST M50FLW080B, 1024 kB: skipped. Probing for ST M50FW002, 256 kB: skipped. Probing for ST M50FW016, 2048 kB: skipped. Probing for ST M50FW040, 512 kB: skipped. Probing for ST M50FW080, 1024 kB: skipped. Probing for ST M50LPW116, 2048 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: skipped. Probing for TI TMS29F002RB, 256 kB: skipped. Probing for TI TMS29F002RT, 256 kB: skipped. Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W29C020(C)/W29C022, 256 kB: skipped. Probing for Winbond W29C040/P, 512 kB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W39L040, 512 kB: skipped. Probing for Winbond W39V040A, 512 kB: skipped. Probing for Winbond W39V040B, 512 kB: skipped. Probing for Winbond W39V040C, 512 kB: skipped. Probing for Winbond W39V040FA, 512 kB: skipped. Probing for Winbond W39V040FB, 512 kB: skipped. Probing for Winbond W39V040FC, 512 kB: skipped. Probing for Winbond W39V080A, 1024 kB: skipped. Probing for Winbond W49F002U/N, 256 kB: skipped. Probing for Winbond W49F020, 256 kB: skipped. Probing for Winbond W49V002A, 256 kB: skipped. Probing for Winbond W49V002FA, 256 kB: skipped. Probing for Winbond W39V080FA, 1024 kB: skipped. Probing for Winbond W39V080FA (dual mode), 512 kB: skipped. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x12 === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading flash... done. Restoring MMIO space at 0x7f009c89c070 Restoring MMIO space at 0x7f009c89c07c Restoring MMIO space at 0x7f009c89c078 Restoring MMIO space at 0x7f009c89c076 Restoring MMIO space at 0x7f009c89c074 Restoring PCI config space for 00:1f:0 reg 0xdc Now the write opperation : # flashrom -Vw A7529IMS.280 flashrom v0.9.3-r1322 on Linux 2.6.38.5-25-desktop (x86_64), built with libpci 3.1.7, GCC 4.5.1 20101208 [gcc-4_5-branch revision 167585], little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1994M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1011 us, 10000 myus = 9973 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "MICRO-STAR INTERNATIONAL CO.,LTD" DMI string system-product-name: "MS-7529" DMI string system-version: "1.0" DMI string baseboard-manufacturer: "MICRO-STAR INTERNATIONAL CO.,LTD" DMI string baseboard-product-name: "G31M3-L V2(MS-7529)" DMI string baseboard-version: "1.0" DMI string chassis-type: "Desktop" Found chipset "Intel ICH7/ICH7R", enabling flash write... chipset PCI ID is 8086:27b8, 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode disabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x80000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x465: BIOS Interface Lock-Down: enabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3020 0x00: 0x0004 (SPIS) 0x02: 0x7f10 (SPIC) 0x04: 0x0007ffc0 (SPIA) 0x08: 0x00000000 (SPID0) 0x0c: 0x00000000 (SPID0+4) 0x10: 0x00000000 (SPID1) 0x14: 0x00000000 (SPID1+4) 0x18: 0x00000000 (SPID2) 0x1c: 0x4d494924 (SPID2+4) 0x20: 0x000dfe68 (SPID3) 0x24: 0x53544224 (SPID3+4) 0x28: 0x32353741 (SPID4) 0x2c: 0x30303239 (SPID4+4) 0x30: 0x02060920 (SPID5) 0x34: 0x00324211 (SPID5+4) 0x38: 0x00ffaaea (SPID6) 0x3c: 0x2f3630f0 (SPID6+4) 0x40: 0x302f3230 (SPID7) 0x44: 0x00fc0039 (SPID7+4) 0x50: 0x00000000 (BBAR) 0x54: 0x5006 (PREOP) 0x56: 0x462b (OPTYPE) 0x58: 0x05ab0302 (OPMENU) 0x5c: 0xc79f0190 (OPMENU+4) 0x60: 0x00000000 (PBR0) 0x64: 0x00000000 (PBR1) 0x68: 0x00000000 (PBR2) 0x6c: 0x00000000 (PBR3) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: SPI. Probing for AMD Am29F010A/B, 128 kB: skipped. Probing for AMD Am29F002(N)BB, 256 kB: skipped. Probing for AMD Am29F002(N)BT, 256 kB: skipped. Probing for AMD Am29F016D, 2048 kB: skipped. Probing for AMD Am29F040B, 512 kB: skipped. Probing for AMD Am29F080B, 1024 kB: skipped. Probing for AMD Am29LV001BB, 128 kB: skipped. Probing for AMD Am29LV001BT, 128 kB: skipped. Probing for AMD Am29LV002BB, 256 kB: skipped. Probing for AMD Am29LV002BT, 256 kB: skipped. Probing for AMD Am29LV004BB, 512 kB: skipped. Probing for AMD Am29LV004BT, 512 kB: skipped. Probing for AMD Am29LV008BB, 1024 kB: skipped. Probing for AMD Am29LV008BT, 1024 kB: skipped. Probing for AMD Am29LV040B, 512 kB: skipped. Probing for AMD Am29LV081B, 1024 kB: skipped. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for AMIC A29002B, 256 kB: skipped. Probing for AMIC A29002T, 256 kB: skipped. Probing for AMIC A29040B, 512 kB: skipped. Probing for AMIC A49LF040A, 512 kB: skipped. Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT29C512, 64 kB: skipped. Probing for Atmel AT29C010A, 128 kB: skipped. Probing for Atmel AT29C020, 256 kB: skipped. Probing for Atmel AT29C040A, 512 kB: skipped. Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel AT49BV512, 64 kB: skipped. Probing for Atmel AT49F020, 256 kB: skipped. Probing for Atmel AT49F002(N), 256 kB: skipped. Probing for Atmel AT49F002(N)T, 256 kB: skipped. Probing for Bright BM29F040, 512 kB: skipped. Probing for EMST F49B002UA, 256 kB: skipped. Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon EN29F010, 128 kB: skipped. Probing for Eon EN29F002(A)(N)B, 256 kB: skipped. Probing for Eon EN29F002(A)(N)T, 256 kB: skipped. Probing for Fujitsu MBM29F004BC, 512 kB: skipped. Probing for Fujitsu MBM29F004TC, 512 kB: skipped. Probing for Fujitsu MBM29F400BC, 512 kB: skipped. Probing for Fujitsu MBM29F400TC, 512 kB: skipped. Probing for Hyundai HY29F002T, 256 kB: skipped. Probing for Hyundai HY29F002B, 256 kB: skipped. Probing for Hyundai HY29F040A, 512 kB: skipped. Probing for Intel 28F001BN/BX-B, 128 kB: skipped. Probing for Intel 28F001BN/BX-T, 128 kB: skipped. Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: skipped. Probing for Intel 28F008S3/S5/SC, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: skipped. Probing for Intel 82802AB, 512 kB: skipped. Probing for Intel 82802AC, 1024 kB: skipped. Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L4005" (512 kB, SPI) at physical address 0xfff80000. Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix MX29F001B, 128 kB: skipped. Probing for Macronix MX29F001T, 128 kB: skipped. Probing for Macronix MX29F002B, 256 kB: skipped. Probing for Macronix MX29F002T, 256 kB: skipped. Probing for Macronix MX29F040, 512 kB: skipped. Probing for Macronix MX29LV040, 512 kB: skipped. Probing for MoselVitelic V29C51000B, 64 kB: skipped. Probing for MoselVitelic V29C51000T, 64 kB: skipped. Probing for MoselVitelic V29C51400B, 512 kB: skipped. Probing for MoselVitelic V29C51400T, 512 kB: skipped. Probing for MoselVitelic V29LC51000, 64 kB: skipped. Probing for MoselVitelic V29LC51001, 128 kB: skipped. Probing for MoselVitelic V29LC51002, 256 kB: skipped. Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC Pm29F002T, 256 kB: skipped. Probing for PMC Pm29F002B, 256 kB: skipped. Probing for PMC Pm39LV010, 128 kB: skipped. Probing for PMC Pm39LV020, 256 kB: skipped. Probing for PMC Pm39LV040, 512 kB: skipped. Probing for PMC Pm49FL002, 256 kB: skipped. Probing for PMC Pm49FL004, 512 kB: skipped. Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Sharp LHF00L04, 1024 kB: skipped. Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST25LF040A.RES, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0x12, id2 0x12 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x12 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST SST28SF040A, 512 kB: skipped. Probing for SST SST29EE010, 128 kB: skipped. Probing for SST SST29LE010, 128 kB: skipped. Probing for SST SST29EE020A, 256 kB: skipped. Probing for SST SST29LE020, 256 kB: skipped. Probing for SST SST39SF512, 64 kB: skipped. Probing for SST SST39SF010A, 128 kB: skipped. Probing for SST SST39SF020A, 256 kB: skipped. Probing for SST SST39SF040, 512 kB: skipped. Probing for SST SST39VF512, 64 kB: skipped. Probing for SST SST39VF010, 128 kB: skipped. Probing for SST SST39VF020, 256 kB: skipped. Probing for SST SST39VF040, 512 kB: skipped. Probing for SST SST39VF080, 1024 kB: skipped. Probing for SST SST49LF002A/B, 256 kB: skipped. Probing for SST SST49LF003A/B, 384 kB: skipped. Probing for SST SST49LF004A/B, 512 kB: skipped. Probing for SST SST49LF004C, 512 kB: skipped. Probing for SST SST49LF008A, 1024 kB: skipped. Probing for SST SST49LF008C, 1024 kB: skipped. Probing for SST SST49LF016C, 2048 kB: skipped. Probing for SST SST49LF020, 256 kB: skipped. Probing for SST SST49LF020A, 256 kB: skipped. Probing for SST SST49LF040, 512 kB: skipped. Probing for SST SST49LF040B, 512 kB: skipped. Probing for SST SST49LF080A, 1024 kB: skipped. Probing for SST SST49LF160C, 2048 kB: skipped. Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST M29F002B, 256 kB: skipped. Probing for ST M29F002T/NT, 256 kB: skipped. Probing for ST M29F040B, 512 kB: skipped. Probing for ST M29F400BB, 512 kB: skipped. Probing for ST M29F400BT, 512 kB: skipped. Probing for ST M29W010B, 128 kB: skipped. Probing for ST M29W040B, 512 kB: skipped. Probing for ST M29W512B, 64 kB: skipped. Probing for ST M50FLW040A, 512 kB: skipped. Probing for ST M50FLW040B, 512 kB: skipped. Probing for ST M50FLW080A, 1024 kB: skipped. Probing for ST M50FLW080B, 1024 kB: skipped. Probing for ST M50FW002, 256 kB: skipped. Probing for ST M50FW016, 2048 kB: skipped. Probing for ST M50FW040, 512 kB: skipped. Probing for ST M50FW080, 1024 kB: skipped. Probing for ST M50LPW116, 2048 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: skipped. Probing for TI TMS29F002RB, 256 kB: skipped. Probing for TI TMS29F002RT, 256 kB: skipped. Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W25x64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W29C020(C)/W29C022, 256 kB: skipped. Probing for Winbond W29C040/P, 512 kB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W39L040, 512 kB: skipped. Probing for Winbond W39V040A, 512 kB: skipped. Probing for Winbond W39V040B, 512 kB: skipped. Probing for Winbond W39V040C, 512 kB: skipped. Probing for Winbond W39V040FA, 512 kB: skipped. Probing for Winbond W39V040FB, 512 kB: skipped. Probing for Winbond W39V040FC, 512 kB: skipped. Probing for Winbond W39V080A, 1024 kB: skipped. Probing for Winbond W49F002U/N, 256 kB: skipped. Probing for Winbond W49F020, 256 kB: skipped. Probing for Winbond W49V002A, 256 kB: skipped. Probing for Winbond W49V002FA, 256 kB: skipped. Probing for Winbond W39V080FA, 1024 kB: skipped. Probing for Winbond W39V080FA (dual mode), 512 kB: skipped. Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2013 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x12 === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... Erasing and writing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x000fff:E program_opcodes: preop=5006 optype=463b opmenu=05200302c79f0190 on-the-fly OPCODE (0x20) re-programmed, op-pos=2 W, 0x001000-0x001fff:EW, 0x002000-0x002fff:EW, 0x003000-0x003fff:EW, 0x004000-0x004fff:EW, 0x005000-0x005fff:EW, 0x006000-0x006fff:EW, 0x007000-0x007fff:EW, 0x008000-0x008fff:EW, 0x009000-0x009fff:EW, 0x00a000-0x00afff:EW, 0x00b000-0x00bfff:EW, 0x00c000-0x00cfff:EW, 0x00d000-0x00dfff:EW, 0x00e000-0x00efff:EW, 0x00f000-0x00ffff:EW, 0x010000-0x010fff:EW, 0x011000-0x011fff:EW, 0x012000-0x012fff:EW, 0x013000-0x013fff:EW, 0x014000-0x014fff:EW, 0x015000-0x015fff:EW, 0x016000-0x016fff:EW, 0x017000-0x017fff:EW, 0x018000-0x018fff:EW, 0x019000-0x019fff:EW, 0x01a000-0x01afff:EW, 0x01b000-0x01bfff:EW, 0x01c000-0x01cfff:EW, 0x01d000-0x01dfff:EW, 0x01e000-0x01efff:EW, 0x01f000-0x01ffff:EW, 0x020000-0x020fff:EW, 0x021000-0x021fff:EW, 0x022000-0x022fff:EW, 0x023000-0x023fff:EW, 0x024000-0x024fff:EW, 0x025000-0x025fff:EW, 0x026000-0x026fff:EW, 0x027000-0x027fff:EW, 0x028000-0x028fff:EW, 0x029000-0x029fff:EW, 0x02a000-0x02afff:EW, 0x02b000-0x02bfff:EW, 0x02c000-0x02cfff:EW, 0x02d000-0x02dfff:EW, 0x02e000-0x02efff:EW, 0x02f000-0x02ffff:EW, 0x030000-0x030fff:EW, 0x031000-0x031fff:EW, 0x032000-0x032fff:EW, 0x033000-0x033fff:EW, 0x034000-0x034fff:EW, 0x035000-0x035fff:EW, 0x036000-0x036fff:EW, 0x037000-0x037fff:EW, 0x038000-0x038fff:EW, 0x039000-0x039fff:EW, 0x03a000-0x03afff:EW, 0x03b000-0x03bfff:EW, 0x03c000-0x03cfff:EW, 0x03d000-0x03dfff:EW, 0x03e000-0x03efff:EW, 0x03f000-0x03ffff:EW, 0x040000-0x040fff:EW, 0x041000-0x041fff:EW, 0x042000-0x042fff:EW, 0x043000-0x043fff:EW, 0x044000-0x044fff:EW, 0x045000-0x045fff:EW, 0x046000-0x046fff:EW, 0x047000-0x047fff:EW, 0x048000-0x048fff:EW, 0x049000-0x049fff:EW, 0x04a000-0x04afff:W, 0x04b000-0x04bfff:W, 0x04c000-0x04cfff:W, 0x04d000-0x04dfff:W, 0x04e000-0x04efff:W, 0x04f000-0x04ffff:EW, 0x050000-0x050fff:S, 0x051000-0x051fff:S, 0x052000-0x052fff:S, 0x053000-0x053fff:S, 0x054000-0x054fff:S, 0x055000-0x055fff:S, 0x056000-0x056fff:S, 0x057000-0x057fff:S, 0x058000-0x058fff:S, 0x059000-0x059fff:S, 0x05a000-0x05afff:S, 0x05b000-0x05bfff:EW, 0x05c000-0x05cfff:EW, 0x05d000-0x05dfff:EW, 0x05e000-0x05efff:E, 0x05f000-0x05ffff:EW, 0x060000-0x060fff:S, 0x061000-0x061fff:S, 0x062000-0x062fff:E, 0x063000-0x063fff:S, 0x064000-0x064fff:S, 0x065000-0x065fff:S, 0x066000-0x066fff:S, 0x067000-0x067fff:S, 0x068000-0x068fff:S, 0x069000-0x069fff:S, 0x06a000-0x06afff:S, 0x06b000-0x06bfff:S, 0x06c000-0x06cfff:S, 0x06d000-0x06dfff:S, 0x06e000-0x06efff:S, 0x06f000-0x06ffff:S, 0x070000-0x070fff:EW, 0x071000-0x071fff:EW, 0x072000-0x072fff:EW, 0x073000-0x073fff:EW, 0x074000-0x074fff:EW, 0x075000-0x075fff:EW, 0x076000-0x076fff:EW, 0x077000-0x077fff:EW, 0x078000-0x078fff:EW, 0x079000-0x079fff:S, 0x07a000-0x07afff:S, 0x07b000-0x07bfff:S, 0x07c000-0x07cfff:S, 0x07d000-0x07dfff:S, 0x07e000-0x07efff:S, 0x07f000-0x07ffff:EW Done. Verifying flash... VERIFIED. Restoring MMIO space at 0x7fd97c556070 Restoring MMIO space at 0x7fd97c55607c Restoring MMIO space at 0x7fd97c556078 Restoring MMIO space at 0x7fd97c556076 Restoring MMIO space at 0x7fd97c556074 Restoring PCI config space for 00:1f:0 reg 0xdc Regards Dave Plater

2 1

[PATCH] be more refined regarding DMI chassis types
by Stefan Tauner 04 Jun '11

04 Jun '11

we had broken laptops in the past that were not detected as such because their DMI chassis-type was either undefined/out-of-spec, or set to 'other' or 'unknown'. this patch tries to mitigate this problem as follows: - if the DMI chassis-type clearly identifies the system as laptop/notebook/mobile platform then nothing changes: the user gets the laptop warning without a hint to the force switch. - if the DMI chassis-type is not specific enough, we warn the user similarly, but tell them the switch. to reduce the number of false positives i have added a few new chassis types that we have encountered in the last months to the list. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- dmi.c | 37 ++++++++++++++++++++++++++----------- internal.c | 21 +++++++++++++++------ 2 files changed, 41 insertions(+), 17 deletions(-) diff --git a/dmi.c b/dmi.c index cda6656..5d37b76 100644 --- a/dmi.c +++ b/dmi.c @@ -54,7 +54,13 @@ static const char *dmidecode_names[] = { "baseboard-version", }; -/* A full list of chassis types can be found in the System Management BIOS +/* This list is used to identify supposed laptops. The is_laptop field has the + * following meaning: + * - 0: in all likelihood not a laptop + * - 1: in all likelihood a laptop + * - 2: chassis-type is not specific enough (these do not need to be listed + * in the table, because it is the default anyway) + * A full list of chassis types can be found in the System Management BIOS * (SMBIOS) Reference Specification 2.7.0 section 7.4.1 "Chassis Types" at * http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_2.7.0.p… * The types below are the most common ones. @@ -64,14 +70,16 @@ static const struct { unsigned char is_laptop; const char *name; } dmi_chassis_types[] = { - {0x01, 0, "Other"}, - {0x02, 0, "Unknown"}, {0x03, 0, "Desktop",}, + {0x06, 0, "Mini Tower"}, + {0x07, 0, "Tower"}, {0x08, 1, "Portable"}, {0x09, 1, "Laptop"}, {0x0a, 1, "Notebook"}, {0x0b, 1, "Hand Held"}, {0x0e, 1, "Sub Notebook"}, + {0x11, 0, "Main Server Chassis"}, + {0x17, 0, "Rack Mount Chassis"}, }; #define DMI_COMMAND_LEN_MAX 260 @@ -152,16 +160,23 @@ void dmi_init(void) } chassis_type = get_dmi_string("chassis-type"); - if (chassis_type) { - for (i = 0; i < ARRAY_SIZE(dmi_chassis_types); i++) { - if (!strcasecmp(chassis_type, - dmi_chassis_types[i].name) && - dmi_chassis_types[i].is_laptop) { - msg_pdbg("Laptop detected via DMI\n"); - is_laptop = 1; - } + if (chassis_type == NULL) + return; + + for (i = 0; i < ARRAY_SIZE(dmi_chassis_types); i++) { + if (strcasecmp(chassis_type, dmi_chassis_types[i].name) == 0) { + is_laptop = dmi_chassis_types[i].is_laptop; + if (is_laptop == 1) { + msg_pdbg("Laptop detected via DMI.\n"); + free(chassis_type); + return; + } else + break; /* first match breaks loop */ } } + + msg_pdbg("DMI chassis-type is not specific enough.\n"); + is_laptop = 2; free(chassis_type); } diff --git a/internal.c b/internal.c index c9f62c1..bbcdc5b 100644 --- a/internal.c +++ b/internal.c @@ -124,7 +124,7 @@ int register_superio(struct superio s) #endif -int is_laptop = 0; +int is_laptop = -1; int laptop_ok = 0; int internal_init(void) @@ -222,11 +222,19 @@ int internal_init(void) /* Warn if a non-whitelisted laptop is detected. */ if (is_laptop && !laptop_ok) { - msg_perr("========================================================================\n" - "WARNING! You seem to be running flashrom on an unsupported laptop.\n" - "Laptops, notebooks and netbooks are difficult to support and we recommend\n" - "to use the vendor flashing utility. The embedded controller (EC) in these\n" - "machines often interacts badly with flashing.\n" + msg_perr("========================================================================\n"); + if (is_laptop == 1) { + msg_perr("WARNING! You seem to be running flashrom on an unsupported laptop.\n"); + } else { + msg_perr("WARNING! You may be running flashrom on an unsupported laptop. We could\n" + "not detect this for sure because your vendor has not setup the SMBIOS\n" + "tables correctly. You can enforce execution by adding\n" + "'-p internal:laptop=force_I_want_a_brick' to the command line, but\n" + "please read the following warning if you are not sure.\n\n"); + } + msg_perr("Laptops, notebooks and netbooks are difficult to support and we\n" + "recommend to use the vendor flashing utility. The embedded controller\n" + "(EC) in these machines often interacts badly with flashing.\n" "See http://www.flashrom.org/Laptops for details.\n\n" "If flash is shared with the EC, erase is guaranteed to brick your laptop\n" "and write may brick your laptop.\n" @@ -234,6 +242,7 @@ int internal_init(void) "failure and sudden poweroff.\n" "You have been warned.\n" "========================================================================\n"); + if (force_laptop) { msg_perr("Proceeding anyway because user specified " "laptop=force_I_want_a_brick\n"); -- 1.7.1

1 0

[PATCH] squash! add printing of chip voltage ranges to print.c
by Stefan Tauner 04 Jun '11

04 Jun '11

- additional vendor tokens below the values - debug output removed Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 19 ++++++++++--------- 1 files changed, 10 insertions(+), 9 deletions(-) diff --git a/print.c b/print.c index 35af208..840ccae 100644 --- a/print.c +++ b/print.c @@ -78,12 +78,8 @@ static void print_supported_chips(void) chipcount++; tmp_ven_str = (char *)f->vendor; do { - - msg_gspew("tmp_ven_str=%s, ", tmp_ven_str); tmp_ven_len = strcspn(tmp_ven_str, delim); - msg_gspew("tmp_ven_len=%d, ", tmp_ven_len); maxvendorlen = max(maxvendorlen, tmp_ven_len); - msg_gspew("new maxvendorlen=%d\n", maxvendorlen); tmp_ven_str += tmp_ven_len; } while (tmp_ven_len != 0); @@ -140,14 +136,14 @@ static void print_supported_chips(void) strcpy(tmp_ven_str, f->vendor); tmp_ven_str = strtok(tmp_ven_str, delim); - msg_ginfo("%s", tmp_ven_str); tmp_ven_len = strlen(tmp_ven_str); + msg_ginfo("%s", tmp_ven_str); tmp_ven_str = strtok(NULL, delim); - while (tmp_ven_str != NULL) { - msg_ginfo("%s\n%s", delim, tmp_ven_str); - tmp_ven_len = strlen(tmp_ven_str); - tmp_ven_str = strtok(NULL, delim); + if (tmp_ven_str != NULL) { + msg_ginfo("%s", delim); + tmp_ven_len++; } + for (i = tmp_ven_len; i < maxvendorlen; i++) msg_ginfo(" "); @@ -211,6 +207,11 @@ static void print_supported_chips(void) msg_gdbg("%0.02f;%0.02f", f->voltage.min/(double)1000, f->voltage.max/(double)1000); + + while (tmp_ven_str != NULL) { + msg_ginfo("\n%s", tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + } msg_ginfo("\n"); } } -- 1.7.1

1 0

Re: [flashrom] [PATCH 0/4] voltage printing 2.0
by Stefan Tauner 04 Jun '11

04 Jun '11

carldani made a suggestion for the -L output: instead of this: SyncMOS/ MoselVitelic {S,V}29C31004T 512 Parallel 3.00;3.60 it would be nice to have: SyncMOS/ {S,V}29C31004T 512 Parallel 3.00;3.60 MoselVitelic the patch does it as shown on the top, because it is easier to implement, but i am working on the second one. (just forgot about it before sending) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[PATCH 4/4] add printing of chip voltage ranges to print_wiki.c
by Stefan Tauner 04 Jun '11

04 Jun '11

- add voltage ranges - center some headers (test values OK, No, ? are centered via wiki templates) - fix style error in header (align:right -> text-align:right) Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print_wiki.c | 46 ++++++++++++++++++++++++++++++++-------------- 1 files changed, 32 insertions(+), 14 deletions(-) diff --git a/print_wiki.c b/print_wiki.c index 0fcc32a..6601bd7 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -29,7 +29,8 @@ static const char wiki_header[] = "= Supported devices =\n\n\ <div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \ -background-color:#eeeeee; align:right; border:1px solid #aabbcc;\"><small>\n\ +background-color:#eeeeee; text-align:right; border:1px solid #aabbcc;\">\ +<small>\n\ Please do '''not''' edit these tables in the wiki directly, they are \ generated by pasting '''flashrom -z''' output.<br />\ '''Last update:''' %s(generated by flashrom %s)\n</small></div>\n"; @@ -37,12 +38,13 @@ generated by pasting '''flashrom -z''' output.<br />\ #if CONFIG_INTERNAL == 1 static const char chipset_th[] = "{| border=\"0\" style=\"font-size: smaller\"\n\ |- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Southbridge\n! align=\"left\" | PCI IDs\n\ -! align=\"left\" | Status\n\n"; +! align=\"left\" | Southbridge\n! align=\"center\" | PCI IDs\n\ +! align=\"center\" | Status\n\n"; static const char board_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n! align=\"left\" | Status\n\n"; +! align=\"left\" | Mainboard\n! align=\"left\" | Required option\n\ +! align=\"center\" | Status\n\n"; static const char board_intro[] = "\ \n== Supported mainboards ==\n\n\ @@ -57,20 +59,26 @@ know, someone has to give it a try). Please report any further verified \ mainboards on the [[Mailinglist|mailing list]].\n"; #endif -static const char chip_th[] = "{| border=\"0\" style=\"font-size: smaller\" \ -valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Device\n! align=\"left\" | Size / kB\n\ -! align=\"left\" | Type\n! align=\"left\" colspan=\"4\" | Status\n\n\ +static const char chip_th[] = "{\ +| border=\"0\" style=\"font-size: smaller\"valign=\"top\"\n\ +|- bgcolor=\"#6699dd\"\n\ +! align=\"left\" | Vendor\n\ +! align=\"left\" | Device\n\ +! align=\"center\" | Size [kB]\n\ +! align=\"center\" | Type\n\ +! align=\"center\" colspan=\"4\" | Status\n\ +! align=\"center\" colspan=\"2\" | Voltage [V]\n\n\ |- bgcolor=\"#6699ff\"\n| colspan=\"4\" |  \n\ -| Probe\n| Read\n| Erase\n| Write\n\n"; +| Probe\n| Read\n| Erase\n| Write\n\ +| align=\"center\" | min \n| align=\"center\" | max\n\n"; static const char programmer_section[] = "\ \n== Supported programmers ==\n\nThis is a list \ of supported PCI devices flashrom can use as programmer:\n\n{| border=\"0\" \ valign=\"top\"\n| valign=\"top\"|\n\n{| border=\"0\" style=\"font-size: \ smaller\" valign=\"top\"\n|- bgcolor=\"#6699dd\"\n! align=\"left\" | Vendor\n\ -! align=\"left\" | Device\n! align=\"left\" | PCI IDs\n\ -! align=\"left\" | Status\n\n"; +! align=\"left\" | Device\n! align=\"center\" | PCI IDs\n\ +! align=\"center\" | Status\n\n"; #if CONFIG_INTERNAL == 1 static const char laptop_intro[] = "\n== Supported laptops/notebooks ==\n\n\ @@ -204,6 +212,9 @@ static void print_supported_chips_wiki(int cols) const struct flashchip *f, *old = NULL; uint32_t t; char *tmp_bus_str; + char tmp_max_str[6]; + char tmp_min_str[6]; + const char *na = "N/A"; for (f = flashchips; f->name != NULL; f++) chipcount++; @@ -223,8 +234,13 @@ static void print_supported_chips_wiki(int cols) t = f->tested; tmp_bus_str = flashbuses_to_text(f->bustype); - printf("|- bgcolor=\"#%s\"\n| %s || %s || %d " - "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}\n", + sprintf(tmp_min_str, "%0.03f", f->voltage.min/(double)1000); + sprintf(tmp_max_str, "%0.03f", f->voltage.max/(double)1000); + /* '{{%s}}' is used in combination with 'OK', 'No' and '?3' to + * select special formatting templates for the bg color. */ + printf("|- bgcolor=\"#%s\"\n| %s || %s || align=\"right\" | %d " + "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}" + "|| %s || %s \n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, f->total_size, tmp_bus_str, (t & TEST_OK_PROBE) ? "OK" : @@ -234,7 +250,9 @@ static void print_supported_chips_wiki(int cols) (t & TEST_OK_ERASE) ? "OK" : (t & TEST_BAD_ERASE) ? "No" : "?3", (t & TEST_OK_WRITE) ? "OK" : - (t & TEST_BAD_WRITE) ? "No" : "?3"); + (t & TEST_BAD_WRITE) ? "No" : "?3", + f->voltage.min ? tmp_min_str : na, + f->voltage.min ? tmp_max_str : na); free(tmp_bus_str); /* Split table into 'cols' columns. */ -- 1.7.1

1 0

[PATCH 3/4] add printing of chip voltage ranges to print.c
by Stefan Tauner 04 Jun '11

04 Jun '11

besides adding output for the voltage ranges, this patch also changes various aspects of the -L output: - sizes are right aligned now with a fixed length of 5 - test results are always shown in the same column ("PR" and " R" instead of "PR" and "R ") - get rid of POS_PRINT and digits - wideness reductions on the whole with a remarkable detail: vendor names are split on '/' and spread over mutliple lines Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 148 +++++++++++++++++++++++++++++++++++++++++++-------------------- 1 files changed, 101 insertions(+), 47 deletions(-) diff --git a/print.c b/print.c index 5d1b449..35af208 100644 --- a/print.c +++ b/print.c @@ -59,27 +59,16 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) - -static int digits(int n) -{ - int i; - - if (!n) - return 1; - - for (i = 0; n; ++i) - n /= 10; - - return i; -} - static void print_supported_chips(void) { - int okcol = 0, pos = 0, i, chipcount = 0; + int i, chipcount = 0; int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; + int maxtypelen = strlen("Type") + 1; const struct flashchip *f; + const char *delim ="/"; + char *tmp_ven_str; + int tmp_ven_len; char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) { @@ -87,12 +76,26 @@ static void print_supported_chips(void) if (!strncmp(f->name, "unknown", 7)) continue; chipcount++; - maxvendorlen = max(maxvendorlen, strlen(f->vendor)); + tmp_ven_str = (char *)f->vendor; + do { + + msg_gspew("tmp_ven_str=%s, ", tmp_ven_str); + tmp_ven_len = strcspn(tmp_ven_str, delim); + msg_gspew("tmp_ven_len=%d, ", tmp_ven_len); + maxvendorlen = max(maxvendorlen, tmp_ven_len); + msg_gspew("new maxvendorlen=%d\n", maxvendorlen); + tmp_ven_str += tmp_ven_len; + } while (tmp_ven_len != 0); + maxchiplen = max(maxchiplen, strlen(f->name)); + tmp_bus_str = flashbuses_to_text(f->bustype); + maxtypelen = max(maxtypelen, + strlen(flashbuses_to_text(f->bustype))); + free(tmp_bus_str); } - maxvendorlen++; - maxchiplen++; - okcol = maxvendorlen + maxchiplen; + maxvendorlen += 1; + maxchiplen += 1; + maxtypelen += 1; msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); msg_ginfo("Vendor"); @@ -102,10 +105,21 @@ static void print_supported_chips(void) for (i = strlen("Device"); i < maxchiplen; i++) msg_ginfo(" "); - msg_ginfo("Tested Known Size/kB: Type:\n"); - for (i = 0; i < okcol; i++) + msg_ginfo("Test Known Size "); + + msg_ginfo("Type"); + for (i = strlen("Type"); i < maxtypelen; i++) + msg_ginfo(" "); + msg_gdbg("Voltage"); + msg_ginfo("\n"); + + for (i = 0; i < maxvendorlen + maxchiplen; i++) msg_ginfo(" "); - msg_ginfo("OK Broken\n\n"); + msg_ginfo("OK Broken [kB]"); + for (i = 0; i < maxtypelen; i++) + msg_ginfo(" "); + msg_gdbg("range [V]"); + msg_ginfo("\n\n"); msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { @@ -113,50 +127,90 @@ static void print_supported_chips(void) if (!strncmp(f->name, "unknown", 7)) continue; - msg_ginfo("%s", f->vendor); - for (i = strlen(f->vendor); i < maxvendorlen; i++) + /* support for multiline vendor names: + * - make a copy of the original vendor name + * - use strok to put the next token in tmp_ven_str repeatedly + * - keep track of the last token's length for ' '-padding + */ + tmp_ven_str = malloc(strlen(f->vendor) + 1); + if (tmp_ven_str == NULL) { + msg_gerr("Out of memory!\n"); + exit(1); + } + strcpy(tmp_ven_str, f->vendor); + + tmp_ven_str = strtok(tmp_ven_str, delim); + msg_ginfo("%s", tmp_ven_str); + tmp_ven_len = strlen(tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + while (tmp_ven_str != NULL) { + msg_ginfo("%s\n%s", delim, tmp_ven_str); + tmp_ven_len = strlen(tmp_ven_str); + tmp_ven_str = strtok(NULL, delim); + } + for (i = tmp_ven_len; i < maxvendorlen; i++) msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) msg_ginfo(" "); - pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { if ((f->tested & TEST_OK_PROBE)) - POS_PRINT("P "); + msg_ginfo("P"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_READ)) - POS_PRINT("R "); + msg_ginfo("R"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_ERASE)) - POS_PRINT("E "); + msg_ginfo("E"); + else + msg_ginfo(" "); if ((f->tested & TEST_OK_WRITE)) - POS_PRINT("W "); - } - while (pos < okcol + 9) { - msg_ginfo(" "); - pos++; - } + msg_ginfo("W "); + else + msg_ginfo(" "); + } else + msg_ginfo(" "); + if ((f->tested & TEST_BAD_MASK)) { if ((f->tested & TEST_BAD_PROBE)) - POS_PRINT("P "); + msg_ginfo("P"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_READ)) - POS_PRINT("R "); + msg_ginfo("R"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_ERASE)) - POS_PRINT("E "); + msg_ginfo("E"); + else + msg_ginfo(" "); if ((f->tested & TEST_BAD_WRITE)) - POS_PRINT("W "); - } + msg_ginfo("W "); + else + msg_ginfo(" "); + } else + msg_ginfo(" "); - while (pos < okcol + 18) { - msg_ginfo(" "); - pos++; - } - msg_ginfo("%d", f->total_size); - for (i = 0; i < 10 - digits(f->total_size); i++) - msg_ginfo(" "); + msg_ginfo("%5d ", f->total_size); tmp_bus_str = flashbuses_to_text(f->bustype); msg_ginfo("%s", tmp_bus_str); + for (i = strlen(tmp_bus_str); + i < maxtypelen; + i++) + msg_ginfo(" "); free(tmp_bus_str); + + if (f->voltage.min == 0 && f->voltage.max == 0) + msg_gdbg("no info"); + else + msg_gdbg("%0.02f;%0.02f", + f->voltage.min/(double)1000, + f->voltage.max/(double)1000); msg_ginfo("\n"); } } -- 1.7.1

1 0

[PATCH 2/4] fix memleaks due to incorrect usage of flashbuses_to_text
by Stefan Tauner 04 Jun '11

04 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- chipset_enable.c | 5 ++++- flashrom.c | 18 ++++++++++-------- print.c | 9 +++++++-- print_wiki.c | 5 ++++- 4 files changed, 25 insertions(+), 12 deletions(-) diff --git a/chipset_enable.c b/chipset_enable.c index 83b49ad..595e926 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1177,6 +1177,7 @@ int chipset_flash_enable(void) struct pci_dev *dev = NULL; int ret = -2; /* Nothing! */ int i; + char *tmp_bus_str; /* Now let's try to find the chipset we have... */ for (i = 0; chipset_enables[i].vendor_name != NULL; i++) { @@ -1215,8 +1216,10 @@ int chipset_flash_enable(void) msg_pinfo("PROBLEMS, continuing anyway\n"); } + tmp_bus_str = flashbuses_to_text(buses_supported); msg_pinfo("This chipset supports the following protocols: %s.\n", - flashbuses_to_text(buses_supported)); + tmp_bus_str); + free(tmp_bus_str); return ret; } diff --git a/flashrom.c b/flashrom.c index e9e6a77..224524a 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1135,7 +1135,7 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force) char location[64]; uint32_t size; enum chipbustype buses_common; - char *tmp; + char *tmp_bus_str; for (flash = flashchips + startchip; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) @@ -1149,14 +1149,14 @@ int probe_flash(int startchip, struct flashchip *fill_flash, int force) } buses_common = buses_supported & flash->bustype; if (!buses_common) { - tmp = flashbuses_to_text(buses_supported); + tmp_bus_str = flashbuses_to_text(buses_supported); msg_gdbg("skipped."); - msg_gspew(" Host bus type %s ", tmp); - free(tmp); - tmp = flashbuses_to_text(flash->bustype); + msg_gspew(" Host bus type %s ", tmp_bus_str); + free(tmp_bus_str); + tmp_bus_str = flashbuses_to_text(flash->bustype); msg_gspew("and chip bus type %s are incompatible.", - tmp); - free(tmp); + tmp_bus_str); + free(tmp_bus_str); msg_gdbg("\n"); continue; } @@ -1201,10 +1201,12 @@ notfound: #endif snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name); + tmp_bus_str = flashbuses_to_text(flash->bustype); msg_cinfo("%s chip \"%s %s\" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", flash->vendor, flash->name, flash->total_size, - flashbuses_to_text(flash->bustype), location); + tmp_bus_str, location); + free(tmp_bus_str); /* Flash registers will not be mapped if the chip was forced. Lock info * may be stored in registers, so avoid lock info printing. diff --git a/print.c b/print.c index 830ee8a..5d1b449 100644 --- a/print.c +++ b/print.c @@ -28,7 +28,7 @@ /* * Return a string corresponding to the bustype parameter. - * Memory is obtained with malloc() and can be freed with free(). + * Memory is obtained with malloc() and must be freed with free() by the caller. */ char *flashbuses_to_text(enum chipbustype bustype) { @@ -80,6 +80,7 @@ static void print_supported_chips(void) int maxvendorlen = strlen("Vendor") + 1; int maxchiplen = strlen("Device") + 1; const struct flashchip *f; + char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) { /* Ignore "unknown XXXX SPI chip" entries. */ @@ -152,7 +153,11 @@ static void print_supported_chips(void) msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) msg_ginfo(" "); - msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); + + tmp_bus_str = flashbuses_to_text(f->bustype); + msg_ginfo("%s", tmp_bus_str); + free(tmp_bus_str); + msg_ginfo("\n"); } } diff --git a/print_wiki.c b/print_wiki.c index dadba49..0fcc32a 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -203,6 +203,7 @@ static void print_supported_chips_wiki(int cols) int i = 0, c = 1, chipcount = 0; const struct flashchip *f, *old = NULL; uint32_t t; + char *tmp_bus_str; for (f = flashchips; f->name != NULL; f++) chipcount++; @@ -221,10 +222,11 @@ static void print_supported_chips_wiki(int cols) c = !c; t = f->tested; + tmp_bus_str = flashbuses_to_text(f->bustype); printf("|- bgcolor=\"#%s\"\n| %s || %s || %d " "|| %s || {{%s}} || {{%s}} || {{%s}} || {{%s}}\n", (c == 1) ? "eeeeee" : "dddddd", f->vendor, f->name, - f->total_size, flashbuses_to_text(f->bustype), + f->total_size, tmp_bus_str, (t & TEST_OK_PROBE) ? "OK" : (t & TEST_BAD_PROBE) ? "No" : "?3", (t & TEST_OK_READ) ? "OK" : @@ -233,6 +235,7 @@ static void print_supported_chips_wiki(int cols) (t & TEST_BAD_ERASE) ? "No" : "?3", (t & TEST_OK_WRITE) ? "OK" : (t & TEST_BAD_WRITE) ? "No" : "?3"); + free(tmp_bus_str); /* Split table into 'cols' columns. */ if (i >= (chipcount / cols + 1)) { -- 1.7.1

1 0

[PATCH 1/4] change all occurrences of printf to msg_ginfo in print.c
by Stefan Tauner 04 Jun '11

04 Jun '11

Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- print.c | 140 +++++++++++++++++++++++++++++++------------------------------- 1 files changed, 70 insertions(+), 70 deletions(-) diff --git a/print.c b/print.c index ac49e03..830ee8a 100644 --- a/print.c +++ b/print.c @@ -59,7 +59,7 @@ char *flashbuses_to_text(enum chipbustype bustype) return ret; } -#define POS_PRINT(x) do { pos += strlen(x); printf(x); } while (0) +#define POS_PRINT(x) do { pos += strlen(x); msg_ginfo(x); } while (0) static int digits(int n) { @@ -93,31 +93,31 @@ static void print_supported_chips(void) maxchiplen++; okcol = maxvendorlen + maxchiplen; - printf("Supported flash chips (total: %d):\n\n", chipcount); - printf("Vendor"); + msg_ginfo("Supported flash chips (total: %d):\n\n", chipcount); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); - printf("Device"); + msg_ginfo(" "); + msg_ginfo("Device"); for (i = strlen("Device"); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); - printf("Tested Known Size/kB: Type:\n"); + msg_ginfo("Tested Known Size/kB: Type:\n"); for (i = 0; i < okcol; i++) - printf(" "); - printf("OK Broken\n\n"); - printf("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); + msg_ginfo(" "); + msg_ginfo("OK Broken\n\n"); + msg_ginfo("(P = PROBE, R = READ, E = ERASE, W = WRITE)\n\n"); for (f = flashchips; f->name != NULL; f++) { /* Don't print "unknown XXXX SPI chip" entries. */ if (!strncmp(f->name, "unknown", 7)) continue; - printf("%s", f->vendor); + msg_ginfo("%s", f->vendor); for (i = strlen(f->vendor); i < maxvendorlen; i++) - printf(" "); - printf("%s", f->name); + msg_ginfo(" "); + msg_ginfo("%s", f->name); for (i = strlen(f->name); i < maxchiplen; i++) - printf(" "); + msg_ginfo(" "); pos = maxvendorlen + maxchiplen; if ((f->tested & TEST_OK_MASK)) { @@ -131,7 +131,7 @@ static void print_supported_chips(void) POS_PRINT("W "); } while (pos < okcol + 9) { - printf(" "); + msg_ginfo(" "); pos++; } if ((f->tested & TEST_BAD_MASK)) { @@ -146,13 +146,13 @@ static void print_supported_chips(void) } while (pos < okcol + 18) { - printf(" "); + msg_ginfo(" "); pos++; } - printf("%d", f->total_size); + msg_ginfo("%d", f->total_size); for (i = 0; i < 10 - digits(f->total_size); i++) - printf(" "); - printf("%s\n", flashbuses_to_text(f->bustype)); + msg_ginfo(" "); + msg_ginfo("%s\n", flashbuses_to_text(f->bustype)); } } @@ -172,26 +172,26 @@ static void print_supported_chipsets(void) maxvendorlen++; maxchipsetlen++; - printf("Supported chipsets (total: %d):\n\n", chipsetcount); + msg_ginfo("Supported chipsets (total: %d):\n\n", chipsetcount); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Chipset"); + msg_ginfo("Chipset"); for (i = strlen("Chipset"); i < maxchipsetlen; i++) - printf(" "); + msg_ginfo(" "); - printf("PCI IDs State\n\n"); + msg_ginfo("PCI IDs State\n\n"); for (c = chipset_enables; c->vendor_name != NULL; c++) { - printf("%s", c->vendor_name); + msg_ginfo("%s", c->vendor_name); for (i = 0; i < maxvendorlen - strlen(c->vendor_name); i++) - printf(" "); - printf("%s", c->device_name); + msg_ginfo(" "); + msg_ginfo("%s", c->device_name); for (i = 0; i < maxchipsetlen - strlen(c->device_name); i++) - printf(" "); - printf("%04x:%04x%s\n", c->vendor_id, c->device_id, + msg_ginfo(" "); + msg_ginfo("%04x:%04x%s\n", c->vendor_id, c->device_id, (c->status == OK) ? "" : " (untested)"); } } @@ -216,39 +216,39 @@ static void print_supported_boards_helper(const struct board_info *boards, maxvendorlen++; maxboardlen++; - printf("Known %s (good: %d, bad: %d):\n\n", + msg_ginfo("Known %s (good: %d, bad: %d):\n\n", devicetype, boardcount_good, boardcount_bad); - printf("Vendor"); + msg_ginfo("Vendor"); for (i = strlen("Vendor"); i < maxvendorlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Board"); + msg_ginfo("Board"); for (i = strlen("Board"); i < maxboardlen; i++) - printf(" "); + msg_ginfo(" "); - printf("Status Required option\n\n"); + msg_ginfo("Status Required option\n\n"); for (b = boards; b->vendor != NULL; b++) { - printf("%s", b->vendor); + msg_ginfo("%s", b->vendor); for (i = 0; i < maxvendorlen - strlen(b->vendor); i++) - printf(" "); - printf("%s", b->name); + msg_ginfo(" "); + msg_ginfo("%s", b->name); for (i = 0; i < maxboardlen - strlen(b->name); i++) - printf(" "); - printf((b->working) ? "OK " : "BAD "); + msg_ginfo(" "); + msg_ginfo((b->working) ? "OK " : "BAD "); for (e = board_pciid_enables; e->vendor_name != NULL; e++) { if (strcmp(e->vendor_name, b->vendor) || strcmp(e->board_name, b->name)) continue; if (e->lb_vendor == NULL) - printf("(autodetected)"); + msg_ginfo("(autodetected)"); else - printf("-m %s:%s", e->lb_vendor, + msg_ginfo("-m %s:%s", e->lb_vendor, e->lb_part); } - printf("\n"); + msg_ginfo("\n"); } } #endif @@ -257,104 +257,104 @@ void print_supported(void) { print_supported_chips(); - printf("\nSupported programmers:\n"); + msg_ginfo("\nSupported programmers:\n"); list_programmers_linebreak(0, 80, 0); #if CONFIG_INTERNAL == 1 - printf("\nSupported devices for the %s programmer:\n\n", + msg_ginfo("\nSupported devices for the %s programmer:\n\n", programmer_table[PROGRAMMER_INTERNAL].name); print_supported_chipsets(); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(boards_known, "boards"); - printf("\n"); + msg_ginfo("\n"); print_supported_boards_helper(laptops_known, "laptops"); #endif #if CONFIG_DUMMY == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DUMMY].name); /* FIXME */ - printf("Dummy device, does nothing and logs all accesses\n"); + msg_ginfo("Dummy device, does nothing and logs all accesses\n"); #endif #if CONFIG_NIC3COM == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NIC3COM].name); print_supported_pcidevs(nics_3com); #endif #if CONFIG_NICREALTEK == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICREALTEK].name); print_supported_pcidevs(nics_realtek); #endif #if CONFIG_NICNATSEMI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICNATSEMI].name); print_supported_pcidevs(nics_natsemi); #endif #if CONFIG_GFXNVIDIA == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_GFXNVIDIA].name); print_supported_pcidevs(gfx_nvidia); #endif #if CONFIG_DRKAISER == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DRKAISER].name); print_supported_pcidevs(drkaiser_pcidev); #endif #if CONFIG_SATASII == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATASII].name); print_supported_pcidevs(satas_sii); #endif #if CONFIG_ATAHPT == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif #if CONFIG_FT2232_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); print_supported_usbdevs(devs_ft2232spi); #endif #if CONFIG_SERPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SERPROG].name); /* FIXME */ - printf("All programmer devices speaking the serprog protocol\n"); + msg_ginfo("All programmer devices speaking the serprog protocol\n"); #endif #if CONFIG_BUSPIRATE_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_BUSPIRATE_SPI].name); /* FIXME */ - printf("Dangerous Prototypes Bus Pirate\n"); + msg_ginfo("Dangerous Prototypes Bus Pirate\n"); #endif #if CONFIG_DEDIPROG == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_DEDIPROG].name); /* FIXME */ - printf("Dediprog SF100\n"); + msg_ginfo("Dediprog SF100\n"); #endif #if CONFIG_RAYER_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_RAYER_SPI].name); /* FIXME */ - printf("RayeR parallel port programmer\n"); + msg_ginfo("RayeR parallel port programmer\n"); #endif #if CONFIG_NICINTEL == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL].name); print_supported_pcidevs(nics_intel); #endif #if CONFIG_NICINTEL_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_NICINTEL_SPI].name); print_supported_pcidevs(nics_intel_spi); #endif #if CONFIG_OGP_SPI == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_OGP_SPI].name); print_supported_pcidevs(ogp_spi); #endif #if CONFIG_SATAMV == 1 - printf("\nSupported devices for the %s programmer:\n", + msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_SATAMV].name); print_supported_pcidevs(satas_mv); #endif -- 1.7.1

1 0

Voltage & form-factor spreadsheet
by Steven Zakulec 04 Jun '11

04 Jun '11

Hello, some weeks ago I asked carldani what I could do to help the flashrom project, and he mentioned that they could really use someone to go thru all the chips in flashchips.c and get the voltage range and form factor(s) for each chip listed there. This is the result of that project: a spreadsheet with the chip name, voltage range, form factors, connector type (pins, leads, etc). This covers all the chips as of v1143. If anyone else is interested, I also have a short text file with all of the form factor acronyms I came across and what they mean (I grabbed the definition from the datasheet). There's a few missing chips, and some values that I wasn't quite sure about. Comments would be greatly appreciated.

4 19

Flashrom and ASUS M4N68T-M-LE-V2
by Sven Günther 04 Jun '11

04 Jun '11

sudo flashrom -V flashrom v0.9.2-r1028 on Linux 2.6.38-candela (i686), built with libpci 3.0.0, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1440M loops per second, 10 myus = 9 us, 100 myus = 95 us, 1000 myus = 962 us, 10000 myus = 9622 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "System manufacturer" DMI string system-product-name: "System Product Name" DMI string system-version: "System Version" DMI string baseboard-manufacturer: "ASUSTeK Computer INC." DMI string baseboard-product-name: "M4N68T-M-LE-V2" DMI string baseboard-version: "Rev X.0x" DMI string chassis-type: "Desktop" Found ITE Super I/O, id 8721 Found chipset "NVIDIA MCP61", enabling flash write... chipset PCI ID is 10de:03e1, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x40, bit 6 is 1, bit 5 is 0 Guessed flash bus type is SPI Found SMBus device 10de:03eb at 00:01:1 SPI BAR is at 0xfec80000, after clearing low bits BAR is at 0xfec80000 Mapping MCP67 SPI at 0xfec80000, unaligned size 0x544. SPI control is 0x001a, enable=0, idle=0 Please send the output of "flashrom -V" to flashrom(a)flashrom.org to help us finish support for your chipset. Thanks. SPI on this chipset is not supported yet. OK. This chipset supports the following protocols: None. SuperI/O ID 8721 is not on the controller list. Probing for AMD Am29F010A/B, 128 KB: skipped. Probing for AMD Am29F002(N)BB, 256 KB: skipped. Probing for AMD Am29F002(N)BT, 256 KB: skipped. Probing for AMD Am29F016D, 2048 KB: skipped. Probing for AMD Am29F040B, 512 KB: skipped. Probing for AMD Am29F080B, 1024 KB: skipped. Probing for AMD Am29LV040B, 512 KB: skipped. Probing for AMD Am29LV081B, 1024 KB: skipped. Probing for ASD AE49F2008, 256 KB: skipped. Probing for Atmel AT25DF021, 256 KB: skipped. Probing for Atmel AT25DF041A, 512 KB: skipped. Probing for Atmel AT25DF081, 1024 KB: skipped. Probing for Atmel AT25DF161, 2048 KB: skipped. Probing for Atmel AT25DF321, 4096 KB: skipped. Probing for Atmel AT25DF321A, 4096 KB: skipped. Probing for Atmel AT25DF641, 8192 KB: skipped. Probing for Atmel AT25F512B, 64 KB: skipped. Probing for Atmel AT25FS010, 128 KB: skipped. Probing for Atmel AT25FS040, 512 KB: skipped. Probing for Atmel AT26DF041, 512 KB: skipped. Probing for Atmel AT26DF081A, 1024 KB: skipped. Probing for Atmel AT26DF161, 2048 KB: skipped. Probing for Atmel AT26DF161A, 2048 KB: skipped. Probing for Atmel AT26F004, 512 KB: skipped. Probing for Atmel AT29C512, 64 KB: skipped. Probing for Atmel AT29C010A, 128 KB: skipped. Probing for Atmel AT29C020, 256 KB: skipped. Probing for Atmel AT29C040A, 512 KB: skipped. Probing for Atmel AT45CS1282, 16896 KB: skipped. Probing for Atmel AT45DB011D, 128 KB: skipped. Probing for Atmel AT45DB021D, 256 KB: skipped. Probing for Atmel AT45DB041D, 512 KB: skipped. Probing for Atmel AT45DB081D, 1024 KB: skipped. Probing for Atmel AT45DB161D, 2048 KB: skipped. Probing for Atmel AT45DB321C, 4224 KB: skipped. Probing for Atmel AT45DB321D, 4096 KB: skipped. Probing for Atmel AT45DB642D, 8192 KB: skipped. Probing for Atmel AT49BV512, 64 KB: skipped. Probing for Atmel AT49F002(N), 256 KB: skipped. Probing for Atmel AT49F002(N)T, 256 KB: skipped. Probing for AMIC A25L40PT, 512 KB: skipped. Probing for AMIC A25L40PU, 512 KB: skipped. Probing for AMIC A29002B, 256 KB: skipped. Probing for AMIC A29002T, 256 KB: skipped. Probing for AMIC A29040B, 512 KB: skipped. Probing for AMIC A49LF040A, 512 KB: skipped. Probing for EMST F49B002UA, 256 KB: skipped. Probing for Eon EN25B05, 64 KB: skipped. Probing for Eon EN25B05T, 64 KB: skipped. Probing for Eon EN25B10, 128 KB: skipped. Probing for Eon EN25B10T, 128 KB: skipped. Probing for Eon EN25B20, 256 KB: skipped. Probing for Eon EN25B20T, 256 KB: skipped. Probing for Eon EN25B40, 512 KB: skipped. Probing for Eon EN25B40T, 512 KB: skipped. Probing for Eon EN25B80, 1024 KB: skipped. Probing for Eon EN25B80T, 1024 KB: skipped. Probing for Eon EN25B16, 2048 KB: skipped. Probing for Eon EN25B16T, 2048 KB: skipped. Probing for Eon EN25B32, 4096 KB: skipped. Probing for Eon EN25B32T, 4096 KB: skipped. Probing for Eon EN25B64, 8192 KB: skipped. Probing for Eon EN25B64T, 8192 KB: skipped. Probing for Eon EN25D16, 2048 KB: skipped. Probing for Eon EN25F05, 64 KB: skipped. Probing for Eon EN25F10, 128 KB: skipped. Probing for Eon EN25F20, 256 KB: skipped. Probing for Eon EN25F40, 512 KB: skipped. Probing for Eon EN25F80, 1024 KB: skipped. Probing for Eon EN25F16, 2048 KB: skipped. Probing for Eon EN25F32, 4096 KB: skipped. Probing for Eon EN29F010, 128 KB: skipped. Probing for EON EN29F002(A)(N)B, 256 KB: skipped. Probing for EON EN29F002(A)(N)T, 256 KB: skipped. Probing for Fujitsu MBM29F004BC, 512 KB: skipped. Probing for Fujitsu MBM29F004TC, 512 KB: skipped. Probing for Fujitsu MBM29F400BC, 512 KB: skipped. Probing for Fujitsu MBM29F400TC, 512 KB: skipped. Probing for Intel 28F001BX-B, 128 KB: skipped. Probing for Intel 28F001BX-T, 128 KB: skipped. Probing for Intel 28F004S5, 512 KB: skipped. Probing for Intel 28F004BV/BE-B, 512 KB: skipped. Probing for Intel 28F004BV/BE-T, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-B, 512 KB: skipped. Probing for Intel 28F400BV/CV/CE-T, 512 KB: skipped. Probing for Intel 82802AB, 512 KB: skipped. Probing for Intel 82802AC, 1024 KB: skipped. Probing for Macronix MX25L512, 64 KB: skipped. Probing for Macronix MX25L1005, 128 KB: skipped. Probing for Macronix MX25L2005, 256 KB: skipped. Probing for Macronix MX25L4005, 512 KB: skipped. Probing for Macronix MX25L8005, 1024 KB: skipped. Probing for Macronix MX25L1605, 2048 KB: skipped. Probing for Macronix MX25L1635D, 2048 KB: skipped. Probing for Macronix MX25L3205, 4096 KB: skipped. Probing for Macronix MX25L3235D, 4096 KB: skipped. Probing for Macronix MX25L6405, 8192 KB: skipped. Probing for Macronix MX25L12805, 16384 KB: skipped. Probing for Macronix MX29F001B, 128 KB: skipped. Probing for Macronix MX29F001T, 128 KB: skipped. Probing for Macronix MX29F002B, 256 KB: skipped. Probing for Macronix MX29F002T, 256 KB: skipped. Probing for Macronix MX29LV040, 512 KB: skipped. Probing for Numonyx M25PE10, 128 KB: skipped. Probing for Numonyx M25PE20, 256 KB: skipped. Probing for Numonyx M25PE40, 512 KB: skipped. Probing for Numonyx M25PE80, 1024 KB: skipped. Probing for Numonyx M25PE16, 2048 KB: skipped. Probing for PMC Pm25LV010, 128 KB: skipped. Probing for PMC Pm25LV016B, 2048 KB: skipped. Probing for PMC Pm25LV020, 256 KB: skipped. Probing for PMC Pm25LV040, 512 KB: skipped. Probing for PMC Pm25LV080B, 1024 KB: skipped. Probing for PMC Pm25LV512, 64 KB: skipped. Probing for PMC Pm29F002T, 256 KB: skipped. Probing for PMC Pm29F002B, 256 KB: skipped. Probing for PMC Pm39LV010, 128 KB: skipped. Probing for PMC Pm39LV020, 256 KB: skipped. Probing for PMC Pm39LV040, 512 KB: skipped. Probing for PMC Pm49FL002, 256 KB: skipped. Probing for PMC Pm49FL004, 512 KB: skipped. Probing for Sanyo LF25FW203A, 2048 KB: skipped. Probing for Sharp LHF00L04, 1024 KB: skipped. Probing for Spansion S25FL008A, 1024 KB: skipped. Probing for Spansion S25FL016A, 2048 KB: skipped. Probing for SST SST25VF016B, 2048 KB: skipped. Probing for SST SST25VF032B, 4096 KB: skipped. Probing for SST SST25VF040.REMS, 512 KB: skipped. Probing for SST SST25VF040B, 512 KB: skipped. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Probing for SST SST25VF080B, 1024 KB: skipped. Probing for SST SST28SF040A, 512 KB: skipped. Probing for SST SST29EE010, 128 KB: skipped. Probing for SST SST29LE010, 128 KB: skipped. Probing for SST SST29EE020A, 256 KB: skipped. Probing for SST SST29LE020, 256 KB: skipped. Probing for SST SST39SF512, 64 KB: skipped. Probing for SST SST39SF010A, 128 KB: skipped. Probing for SST SST39SF020A, 256 KB: skipped. Probing for SST SST39SF040, 512 KB: skipped. Probing for SST SST39VF512, 64 KB: skipped. Probing for SST SST39VF010, 128 KB: skipped. Probing for SST SST39VF020, 256 KB: skipped. Probing for SST SST39VF040, 512 KB: skipped. Probing for SST SST39VF080, 1024 KB: skipped. Probing for SST SST49LF002A/B, 256 KB: skipped. Probing for SST SST49LF003A/B, 384 KB: skipped. Probing for SST SST49LF004A/B, 512 KB: skipped. Probing for SST SST49LF004C, 512 KB: skipped. Probing for SST SST49LF008A, 1024 KB: skipped. Probing for SST SST49LF008C, 1024 KB: skipped. Probing for SST SST49LF016C, 2048 KB: skipped. Probing for SST SST49LF020, 256 KB: skipped. Probing for SST SST49LF020A, 256 KB: skipped. Probing for SST SST49LF040, 512 KB: skipped. Probing for SST SST49LF040B, 512 KB: skipped. Probing for SST SST49LF080A, 1024 KB: skipped. Probing for SST SST49LF160C, 2048 KB: skipped. Probing for ST M25P05-A, 64 KB: skipped. Probing for ST M25P05.RES, 64 KB: skipped. Probing for ST M25P10-A, 128 KB: skipped. Probing for ST M25P10.RES, 128 KB: skipped. Probing for ST M25P20, 256 KB: skipped. Probing for ST M25P40, 512 KB: skipped. Probing for ST M25P40-old, 512 KB: skipped. Probing for ST M25P80, 1024 KB: skipped. Probing for ST M25P16, 2048 KB: skipped. Probing for ST M25P32, 4096 KB: skipped. Probing for ST M25P64, 8192 KB: skipped. Probing for ST M25P128, 16384 KB: skipped. Probing for ST M29F002B, 256 KB: skipped. Probing for ST M29F002T/NT, 256 KB: skipped. Probing for ST M29F040B, 512 KB: skipped. Probing for ST M29F400BT, 512 KB: skipped. Probing for ST M29W010B, 128 KB: skipped. Probing for ST M29W040B, 512 KB: skipped. Probing for ST M29W512B, 64 KB: skipped. Probing for ST M50FLW040A, 512 KB: skipped. Probing for ST M50FLW040B, 512 KB: skipped. Probing for ST M50FLW080A, 1024 KB: skipped. Probing for ST M50FLW080B, 1024 KB: skipped. Probing for ST M50FW002, 256 KB: skipped. Probing for ST M50FW016, 2048 KB: skipped. Probing for ST M50FW040, 512 KB: skipped. Probing for ST M50FW080, 1024 KB: skipped. Probing for ST M50LPW116, 2048 KB: skipped. Probing for SyncMOS S29C31004T, 512 KB: skipped. Probing for SyncMOS S29C51001T, 128 KB: skipped. Probing for SyncMOS S29C51002T, 256 KB: skipped. Probing for SyncMOS S29C51004T, 512 KB: skipped. Probing for TI TMS29F002RB, 256 KB: skipped. Probing for TI TMS29F002RT, 256 KB: skipped. Probing for Winbond W25Q80, 1024 KB: skipped. Probing for Winbond W25Q16, 2048 KB: skipped. Probing for Winbond W25Q32, 4096 KB: skipped. Probing for Winbond W25x10, 128 KB: skipped. Probing for Winbond W25x20, 256 KB: skipped. Probing for Winbond W25x40, 512 KB: skipped. Probing for Winbond W25x80, 1024 KB: skipped. Probing for Winbond W25x16, 2048 KB: skipped. Probing for Winbond W25x32, 4096 KB: skipped. Probing for Winbond W25x64, 8192 KB: skipped. Probing for Winbond W29C011, 128 KB: skipped. Probing for Winbond W29C020C, 256 KB: skipped. Probing for Winbond W29C040P, 512 KB: skipped. Probing for Winbond W29EE011, 128 KB: skipped. Probing for Winbond W39V040A, 512 KB: skipped. Probing for Winbond W39V040B, 512 KB: skipped. Probing for Winbond W39V040C, 512 KB: skipped. Probing for Winbond W39V040FA, 512 KB: skipped. Probing for Winbond W39V080A, 1024 KB: skipped. Probing for Winbond W49F002U, 256 KB: skipped. Probing for Winbond W49V002A, 256 KB: skipped. Probing for Winbond W49V002FA, 256 KB: skipped. Probing for Winbond W39V080FA, 1024 KB: skipped. Probing for Winbond W39V080FA (dual mode), 512 KB: skipped. Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Probing for EON unknown EON SPI chip, 0 KB: skipped. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Probing for SST unknown SST SPI chip, 0 KB: skipped. Probing for ST unknown ST SPI chip, 0 KB: skipped. Probing for Sanyo unknown Sanyo SPI chip, 0 KB: skipped. Probing for Generic unknown SPI chip (RDID), 0 KB: skipped. Probing for Generic unknown SPI chip (REMS), 0 KB: skipped. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically.

2 1

Re: [flashrom] [PATCH] Macronix MX25L6445E
by Wagner, Helge (GE Intelligent Platforms) 03 Jun '11

03 Jun '11

Hi, any comments for the MX25L6445E? Regards, Helge Wagner -----Original Message----- From: flashrom-bounces(a)flashrom.org [mailto:flashrom-bounces@flashrom.org] On Behalf Of Wagner, Helge (GE Intelligent Platforms) Sent: Montag, 30. Mai 2011 14:08 To: flashrom(a)flashrom.org Subject: [flashrom] [PATCH] Macronix MX25L6445E Hi, i have tried to reprogram a Macronix MX25L6445E flash chip. This worked, but gave me an error message: ERASE FAILED at 0x0001107f! Expected=0xff, Read=0x00, failed byte count from 0x00010000-0x0001ffff: 0x9c15 ERASE FAILED! Looking deeper into the datasheet, i saw that the MX25L6445E has the same ID as the MX25L6405, but with (at least) one difference: The MX25L6405 has a block size of 64KByte for erase function 20h, while the MX25L6445E is using 4KByte sector size for the same erase function 20h. As a result the spi_block_erase_20() will fail for the MX25L6445E (while the spi_block_erase_d8() which is used then will succeed). I have now re-ordered the erase functions for the MX25L6405/MX25L6445E: spi_block_erase_d8 - first spi_block_erase_60 - second spi_block_erase_c7 - third spi_block_erase_20 - last So if one of the d8/60/c7 erase functions are successfull, the spi_block_erase_20 will never be called. To be sure that the spi_block_erase_20 works for both the MX25L6405 and the MX25L6445E, we could change the block erase size from 64K to 4K. This should work even for the MX25L6405, but with the side effect of the erase taking longer than needed. Any comments? Please find my patches included. Signed-off-by: Helge Wagner <Helge.Wagner(a)ge.com> Regards, Helge Helge Wagner Software Engineer GE Intelligent Platforms

1 0

SST25VF010A-33-4C-SAE supported?
by David Kiers 03 Jun '11

03 Jun '11

Dear sir/madam, I am trying to communicate with a 1MB SST25VF010 flash chip using flashrom V0.9.2-r1141 on Ubuntu 11.04 through a Bus Pirate v3b. I am a novice user of all four. Flashrom reports: Found chip "Generic unknown SPI chip (RDID)" (0 KB, SPI) at physical address 0x0. Could it be that this chip (http://www.farnell.com/datasheets/82222.pdf) is not supported by flashrom? Could it be that flashrom is not using the required serial mode 0 or 3? With kind regards, David Kiers

2 11

[commit] r1323 - trunk
by repository service 03 Jun '11

03 Jun '11

Author: stefanct Date: Fri Jun 3 09:26:31 2011 New Revision: 1323 URL: http://flashrom.org/trac/flashrom/changeset/1323 Log: Add voltage ranges to the flashchips Signed-off-by: Steven Zakulec <spzakulec(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/flash.h trunk/flashchips.c Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun May 29 00:59:05 2011 (r1322) +++ trunk/flash.h Fri Jun 3 09:26:31 2011 (r1323) @@ -145,6 +145,10 @@ int (*unlock) (struct flashchip *flash); int (*write) (struct flashchip *flash, uint8_t *buf, int start, int len); int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len); + struct { + uint16_t min; + uint16_t max; + } voltage; /* Some flash devices have an additional register space. */ chipaddr virtual_memory; Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun May 29 00:59:05 2011 (r1322) +++ trunk/flashchips.c Fri Jun 3 09:26:31 2011 (r1323) @@ -54,6 +54,7 @@ * .unlock = Chip unlock function * .write = Chip write function * .read = Chip read function + * .voltage = Voltage range in millivolt */ { @@ -80,6 +81,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -111,6 +113,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4750, 5250}, /* -55 speed is +-5%, all others +-10% */ }, { @@ -168,6 +171,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -194,6 +198,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -220,6 +225,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -492,6 +498,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -518,6 +525,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -550,6 +558,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -615,6 +624,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -648,6 +658,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -681,6 +692,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -714,6 +726,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, /* The A25L40P{T,U} chips are distinguished by their @@ -752,6 +765,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -785,6 +799,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -818,6 +833,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -854,6 +870,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -890,6 +907,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -921,6 +939,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -952,6 +971,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -983,6 +1003,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1014,6 +1035,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1045,6 +1067,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1076,6 +1099,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1113,6 +1137,7 @@ .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */ .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1150,6 +1175,7 @@ .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */ .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1181,6 +1207,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -1212,6 +1239,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -1238,6 +1266,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -1265,6 +1294,7 @@ .unlock = unlock_49fl00x, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -1302,6 +1332,7 @@ .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2300, 3600}, /* Datasheet says 2.3-3.6V or 2.7-3.6V */ }, { @@ -1339,6 +1370,7 @@ .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2300, 3600}, /* Datasheet says 2.3-3.6V or 2.7-3.6V */ }, { @@ -1376,6 +1408,7 @@ .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {1600, 2000}, /* Datasheet says range is 1.65-1.95 V */ }, { @@ -1450,6 +1483,7 @@ .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1487,6 +1521,7 @@ .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1524,6 +1559,7 @@ .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1561,6 +1597,7 @@ .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1598,6 +1635,7 @@ .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1635,6 +1673,7 @@ .unlock = spi_disable_blockprotect_at25f, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1674,6 +1713,7 @@ .unlock = spi_disable_blockprotect_at25fs010, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1710,6 +1750,7 @@ .unlock = spi_disable_blockprotect_at25fs040, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1732,6 +1773,7 @@ }, .write = NULL /* Incompatible Page write */, .read = spi_chip_read, + .voltage = {2700, 3600}, /* Datasheet says 3.0-3.6 V or 2.7-3.6 V */ }, { @@ -1769,6 +1811,7 @@ .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1805,6 +1848,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1841,6 +1885,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, /*The AT26DF321 has the same ID as the AT25DF321. */ @@ -1893,6 +1938,7 @@ }, .write = NULL /* Incompatible Page write */, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -1916,7 +1962,7 @@ }, .write = write_jedec, .read = read_memmapped, - + .voltage = {4500, 5500}, }, { @@ -1940,6 +1986,7 @@ }, .write = write_jedec, /* FIXME */ .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -1963,6 +2010,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -1986,6 +2034,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -2001,6 +2050,7 @@ .probe_timing = TIMING_ZERO, .write = NULL /* Incompatible Page write */, .read = NULL /* Incompatible read */, + .voltage = {2700, 3600}, }, { @@ -2016,6 +2066,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2700, 3600}, }, { @@ -2031,6 +2082,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2700, 3600}, }, { @@ -2046,6 +2098,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2500, 3600}, /* Datasheet says 2.5-3.6 V or 2.7-3.6 V */ }, { @@ -2061,6 +2114,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2500, 3600}, /* Datasheet says 2.5-3.6 V or 2.7-3.6 V */ }, { @@ -2076,6 +2130,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2500, 3600}, /* Datasheet says 2.5-3.6 V or 2.7-3.6 V */ }, { @@ -2091,6 +2146,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL /* Incompatible read */, + .voltage = {2700, 3600}, }, { @@ -2106,6 +2162,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2700, 3600}, }, { @@ -2121,6 +2178,7 @@ .probe_timing = TIMING_ZERO, .write = NULL, .read = NULL, + .voltage = {2700, 3600}, }, { @@ -2144,6 +2202,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -2167,6 +2226,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -2198,6 +2258,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -2229,6 +2290,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -2286,6 +2348,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -2318,6 +2381,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2349,6 +2413,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2380,6 +2445,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2411,6 +2477,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2442,6 +2509,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2474,6 +2542,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2506,6 +2575,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2538,6 +2608,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2570,6 +2641,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2602,6 +2674,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2634,6 +2707,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2666,6 +2740,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2698,6 +2773,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2730,6 +2806,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2762,6 +2839,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2795,6 +2873,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2827,6 +2906,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2862,6 +2942,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2898,6 +2979,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2934,6 +3016,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -2970,6 +3053,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3003,6 +3087,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3036,6 +3121,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3069,6 +3155,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3102,6 +3189,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3129,6 +3217,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3160,6 +3249,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3191,6 +3281,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3222,6 +3313,7 @@ }, .write = NULL, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3253,6 +3345,7 @@ }, .write = NULL, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3285,6 +3378,7 @@ }, .write = write_m29f400bt, .read = read_memmapped, + .voltage = {4750, 5250}, /* 5.0V +-5% for -55 model, +-10% for rest */ }, { @@ -3316,6 +3410,7 @@ }, .write = write_m29f400bt, .read = read_memmapped, + .voltage = {4750, 5250}, /* 5.0V +-5% for -55 model, +-10% for rest */ }, { @@ -3347,6 +3442,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4750, 5250}, /* 5.0V +-5% for -45 model, +-10% for rest */ }, { @@ -3378,6 +3474,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4750, 5250}, /* 5.0V +-5% for -45 model, +-10% for rest */ }, { @@ -3430,6 +3527,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3456,6 +3554,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -3483,6 +3582,7 @@ }, .write = write_82802ab, .read = read_memmapped, + .voltage = {4500, 5500}, /* 5.0V +-10% read, 12V fast program & erase- +-5% standard, +-10% option */ }, { @@ -3640,6 +3740,7 @@ .unlock = unlock_82802ab, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -3664,6 +3765,7 @@ .unlock = unlock_82802ab, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -3700,6 +3802,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3733,6 +3836,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3769,6 +3873,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3805,6 +3910,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3841,6 +3947,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3877,6 +3984,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3910,6 +4018,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -3976,6 +4085,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4009,6 +4119,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4042,6 +4153,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4075,6 +4187,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4107,6 +4220,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4139,6 +4253,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4170,6 +4285,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4201,6 +4317,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4253,6 +4370,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -4279,6 +4397,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4305,6 +4424,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4331,6 +4451,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4357,6 +4478,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4383,6 +4505,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4409,6 +4532,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4435,6 +4559,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4464,6 +4589,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4493,6 +4619,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4522,6 +4649,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4551,6 +4679,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4580,6 +4709,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4609,6 +4739,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4673,6 +4804,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4702,6 +4834,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4737,6 +4870,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -4797,6 +4931,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4828,6 +4963,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -4857,6 +4993,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -4886,6 +5023,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -4915,6 +5053,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -4945,6 +5084,7 @@ .unlock = unlock_49fl00x, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -4975,6 +5115,7 @@ .unlock = unlock_49fl00x, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5033,6 +5174,7 @@ .unlock = unlock_82802ab, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5085,6 +5227,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5111,6 +5254,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5227,6 +5371,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5262,6 +5407,7 @@ .unlock = spi_disable_blockprotect, .write = spi_aai_write, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5297,6 +5443,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5361,6 +5508,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5460,6 +5608,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -5487,6 +5636,7 @@ .unlock = unprotect_28sf040, .write = write_28sf040, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5510,6 +5660,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5533,6 +5684,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5556,6 +5708,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5579,6 +5732,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5605,6 +5759,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5631,6 +5786,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5657,6 +5813,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5683,6 +5840,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -5709,6 +5867,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -5735,6 +5894,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -5761,6 +5921,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -5787,6 +5948,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -5816,6 +5978,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -5847,6 +6010,7 @@ .unlock = unlock_sst_fwhub, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5878,6 +6042,7 @@ .unlock = unlock_sst_fwhub, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5912,6 +6077,7 @@ .unlock = unlock_sst_fwhub, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5944,6 +6110,7 @@ .unlock = unlock_49lfxxxc, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -5975,6 +6142,7 @@ .unlock = unlock_sst_fwhub, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6007,6 +6175,7 @@ .unlock = unlock_49lfxxxc, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6039,6 +6208,7 @@ .unlock = unlock_49lfxxxc, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6068,6 +6238,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6097,6 +6268,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6126,6 +6298,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6156,6 +6329,7 @@ .unlock = unlock_82802ab, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6185,6 +6359,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6217,6 +6392,7 @@ .unlock = unlock_49lfxxxc, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -6243,6 +6419,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, /* The ST M25P05 is a bit of a problem. It has the same ID as the @@ -6274,6 +6451,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6300,6 +6478,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, /* The ST M25P10 has the same problem as the M25P05. */ @@ -6327,6 +6506,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_1, /* 128 */ .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6353,6 +6533,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6379,6 +6560,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6431,6 +6613,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6457,6 +6640,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6483,6 +6667,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6509,6 +6694,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6535,6 +6721,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -6653,6 +6840,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4750, 5250}, /* Datasheet says some are only 4.75-5.25 V */ }, { @@ -6684,6 +6872,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4750, 5250}, /* Datasheet says some are only 4.75-5.25 V */ }, { @@ -6710,6 +6899,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -6742,6 +6932,7 @@ }, .write = write_m29f400bt, .read = read_memmapped, + .voltage = {4500, 5500}, }, { /* FIXME: this has WORD/BYTE sequences; 2AA for word, 555 for byte */ @@ -6773,6 +6964,7 @@ }, .write = write_m29f400bt, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -6799,6 +6991,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -6825,6 +7018,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -6848,6 +7042,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {2700, 3600}, }, { @@ -6880,6 +7075,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -6912,6 +7108,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -6944,6 +7141,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -6976,6 +7174,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -7005,6 +7204,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -7029,6 +7229,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -7053,6 +7254,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -7077,6 +7279,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -7107,6 +7310,7 @@ .unlock = unlock_stm50flw0x0x, .write = write_82802ab, .read = read_memmapped, + .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, { @@ -7133,6 +7337,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7159,6 +7364,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7237,6 +7443,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7263,6 +7470,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7289,6 +7497,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -7315,6 +7524,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -7346,6 +7556,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7377,6 +7588,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7413,6 +7625,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7449,6 +7662,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7485,6 +7699,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7587,6 +7802,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7617,6 +7833,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7647,6 +7864,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7677,6 +7895,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7713,6 +7932,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7749,6 +7969,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7785,6 +8006,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { @@ -7831,6 +8053,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7854,6 +8077,7 @@ }, .write = write_jedec, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -7934,6 +8158,7 @@ .printlock = printlock_w39v040a, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -7961,6 +8186,7 @@ .printlock = printlock_w39v040b, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -7988,6 +8214,7 @@ .printlock = printlock_w39v040c, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -8019,6 +8246,7 @@ .unlock = unlock_sst_fwhub, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -8101,6 +8329,7 @@ .printlock = printlock_w39v080a, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -8132,6 +8361,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -8155,6 +8385,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {4500, 5500}, }, { @@ -8186,6 +8417,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -8217,6 +8449,7 @@ }, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, }, { @@ -8245,6 +8478,7 @@ .unlock = unlock_w39v080fa, .write = write_jedec_1, .read = read_memmapped, + .voltage = {3000, 3600}, /* 12 V fast program mode */ }, {

1 0

Atmel AT49BV512 - success for PROBE/READ/WRITE
by Pete Batard 03 Jun '11

03 Jun '11

Hi, Flashrom advised to send log reports for the above flash chip. I can confirm successful operation when flashing gPXE as well as flashing back to the original flashrom dumped firmware. Flashing was done using a 3COM 3C905C: EtherLink 10/100 PCI (TX) NIC. Logs attached. Regards, /Pete

2 1

Gigabyte GA-E7AUM-DS2H (NVIDIA MCP79): flashrom -V
by Pete Batard 02 Jun '11

02 Jun '11

Another report flashrom invited me to send. Regards, /Pete ------------------------------------------------------------------------ flashrom v0.9.3-r1322 on Linux 2.6.39 (x86_64), built with libpci 3.1.5, GCC 4.4.4, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 2497M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1000 us, 10000 myus = 10001 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Gigabyte Technology Co., Ltd." DMI string system-product-name: "GA-E7AUM-DS2H" DMI string system-version: " " DMI string baseboard-manufacturer: "Gigabyte Technology Co., Ltd." DMI string baseboard-product-name: "GA-E7AUM-DS2H" DMI string baseboard-version: "x.x" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8718 on port 0x2e Found chipset "NVIDIA MCP79", enabling flash write... chipset PCI ID is 10de:0aac, This chipset is not really supported yet. Guesswork... ISA/LPC bridge reg 0x8a contents: 0x00, bit 6 is 0, bit 5 is 0 Flash bus type is LPC Found SMBus device 10de:0aa2 at 00:03:2 MCP SPI BAR is at 0xeff00000 Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. This chipset supports the following protocols: LPC. Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled Serial flash pin 29 Serial flash port 0x0820 Probing for AMD Am29F010A/B, 128 kB: skipped. Probing for AMD Am29F002(N)BB, 256 kB: skipped. Probing for AMD Am29F002(N)BT, 256 kB: skipped. Probing for AMD Am29F016D, 2048 kB: skipped. Probing for AMD Am29F040B, 512 kB: skipped. Probing for AMD Am29F080B, 1024 kB: skipped. Probing for AMD Am29LV001BB, 128 kB: skipped. Probing for AMD Am29LV001BT, 128 kB: skipped. Probing for AMD Am29LV002BB, 256 kB: skipped. Probing for AMD Am29LV002BT, 256 kB: skipped. Probing for AMD Am29LV004BB, 512 kB: skipped. Probing for AMD Am29LV004BT, 512 kB: skipped. Probing for AMD Am29LV008BB, 1024 kB: skipped. Probing for AMD Am29LV008BT, 1024 kB: skipped. Probing for AMD Am29LV040B, 512 kB: skipped. Probing for AMD Am29LV081B, 1024 kB: skipped. Probing for AMIC A25L05PT, 64 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L05PU, 64 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L10PT, 128 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L10PU, 128 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L20PT, 256 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L20PU, 256 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L40PT, 512 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L40PU, 512 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L80P, 1024 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L16PT, 2048 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L16PU, 2048 kB: 4 byte RDID not supported on this SPI controller Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for AMIC A29002B, 256 kB: skipped. Probing for AMIC A29002T, 256 kB: skipped. Probing for AMIC A29040B, 512 kB: skipped. Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT29C512, 64 kB: skipped. Probing for Atmel AT29C010A, 128 kB: skipped. Probing for Atmel AT29C020, 256 kB: skipped. Probing for Atmel AT29C040A, 512 kB: skipped. Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Atmel AT49BV512, 64 kB: skipped. Probing for Atmel AT49F020, 256 kB: skipped. Probing for Atmel AT49F002(N), 256 kB: skipped. Probing for Atmel AT49F002(N)T, 256 kB: skipped. Probing for Bright BM29F040, 512 kB: skipped. Probing for EMST F49B002UA, 256 kB: skipped. Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon EN29F010, 128 kB: skipped. Probing for Eon EN29F002(A)(N)B, 256 kB: skipped. Probing for Eon EN29F002(A)(N)T, 256 kB: skipped. Probing for Fujitsu MBM29F004BC, 512 kB: skipped. Probing for Fujitsu MBM29F004TC, 512 kB: skipped. Probing for Fujitsu MBM29F400BC, 512 kB: skipped. Probing for Fujitsu MBM29F400TC, 512 kB: skipped. Probing for Hyundai HY29F002T, 256 kB: skipped. Probing for Hyundai HY29F002B, 256 kB: skipped. Probing for Hyundai HY29F040A, 512 kB: skipped. Probing for Intel 28F001BN/BX-B, 128 kB: skipped. Probing for Intel 28F001BN/BX-T, 128 kB: skipped. Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: skipped. Probing for Intel 28F008S3/S5/SC, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: skipped. Probing for Intel 82802AB, 512 kB: skipped. Probing for Intel 82802AC, 1024 kB: skipped. Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Chip status register is 00 Chip status register: Status Register Write Disable (SRWD) is not set Chip status register: Bit 6 is not set Chip status register: Bit 5 / Block Protect 3 (BP3) is not set Chip status register: Bit 4 / Block Protect 2 (BP2) is not set Chip status register: Bit 3 / Block Protect 1 (BP1) is not set Chip status register: Bit 2 / Block Protect 0 (BP0) is not set Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Found chip "Macronix MX25L8005" (1024 kB, SPI) at physical address 0xfff00000. Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix MX29F001B, 128 kB: skipped. Probing for Macronix MX29F001T, 128 kB: skipped. Probing for Macronix MX29F002B, 256 kB: skipped. Probing for Macronix MX29F002T, 256 kB: skipped. Probing for Macronix MX29F040, 512 kB: skipped. Probing for Macronix MX29LV040, 512 kB: skipped. Probing for MoselVitelic V29C51000B, 64 kB: skipped. Probing for MoselVitelic V29C51000T, 64 kB: skipped. Probing for MoselVitelic V29C51400B, 512 kB: skipped. Probing for MoselVitelic V29C51400T, 512 kB: skipped. Probing for MoselVitelic V29LC51000, 64 kB: skipped. Probing for MoselVitelic V29LC51001, 128 kB: skipped. Probing for MoselVitelic V29LC51002, 256 kB: skipped. Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC Pm29F002T, 256 kB: skipped. Probing for PMC Pm29F002B, 256 kB: skipped. Probing for PMC Pm39LV010, 128 kB: skipped. Probing for PMC Pm39LV020, 256 kB: skipped. Probing for PMC Pm39LV040, 512 kB: skipped. Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x00, id2 0x1c, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sharp LHF00L04, 1024 kB: skipped. Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x13, id2 0x13 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xc2, id2 0x13 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST SST28SF040A, 512 kB: skipped. Probing for SST SST29EE010, 128 kB: skipped. Probing for SST SST29LE010, 128 kB: skipped. Probing for SST SST29EE020A, 256 kB: skipped. Probing for SST SST29LE020, 256 kB: skipped. Probing for SST SST39SF512, 64 kB: skipped. Probing for SST SST39SF010A, 128 kB: skipped. Probing for SST SST39SF020A, 256 kB: skipped. Probing for SST SST39SF040, 512 kB: skipped. Probing for SST SST39VF512, 64 kB: skipped. Probing for SST SST39VF010, 128 kB: skipped. Probing for SST SST39VF020, 256 kB: skipped. Probing for SST SST39VF040, 512 kB: skipped. Probing for SST SST39VF080, 1024 kB: skipped. Probing for SST SST49LF002A/B, 256 kB: skipped. Probing for SST SST49LF003A/B, 384 kB: skipped. Probing for SST SST49LF004A/B, 512 kB: skipped. Probing for SST SST49LF004C, 512 kB: skipped. Probing for SST SST49LF008A, 1024 kB: skipped. Probing for SST SST49LF008C, 1024 kB: skipped. Probing for SST SST49LF016C, 2048 kB: skipped. Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0x00, id2 0x1c, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0x00, id2 0x1c, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0x7f38, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST M29F002B, 256 kB: skipped. Probing for ST M29F002T/NT, 256 kB: skipped. Probing for ST M29F040B, 512 kB: skipped. Probing for ST M29F400BB, 512 kB: skipped. Probing for ST M29F400BT, 512 kB: skipped. Probing for ST M29W010B, 128 kB: skipped. Probing for ST M29W040B, 512 kB: skipped. Probing for ST M29W512B, 64 kB: skipped. Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0x7f, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0x7f, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: skipped. Probing for ST M50FW016, 2048 kB: skipped. Probing for ST M50FW040, 512 kB: skipped. Probing for ST M50FW080, 1024 kB: skipped. Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: skipped. Probing for TI TMS29F002RB, 256 kB: skipped. Probing for TI TMS29F002RT, 256 kB: skipped. Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x10, 128 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x20, 256 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x40, 512 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x80, 1024 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x16, 2048 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x32, 4096 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W25x64, 8192 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W29C020(C)/W29C022, 256 kB: skipped. Probing for Winbond W29C040/P, 512 kB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W39L040, 512 kB: skipped. Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xb8, id2 0x5e, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: skipped. Probing for Winbond W39V040FB, 512 kB: skipped. Probing for Winbond W39V040FC, 512 kB: skipped. Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0x7f38, id2 0xfc, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49F002U/N, 256 kB: skipped. Probing for Winbond W49F020, 256 kB: skipped. Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0x00, id2 0x1c, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: skipped. Probing for Winbond W39V080FA, 1024 kB: skipped. Probing for Winbond W39V080FA (dual mode), 512 kB: skipped. Probing for AMIC unknown AMIC SPI chip, 0 kB: 4 byte RDID not supported on this SPI controller Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xc2, id2 0x2014 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xc2, id2 0x13 No operations were specified. Restoring PCI config space for 00:03:0 reg 0x6d Restoring PCI config space for 00:03:0 reg 0x90 Restoring PCI config space for 00:03:0 reg 0x8c Restoring PCI config space for 00:03:0 reg 0x88

1 0

WRITE on Winbond W25x16 with Dediprog SF100
by Noé Rubinstein 02 Jun '11

02 Jun '11

Hello, The chip (W25X16AVSSIG) has status UNTESTED for the operation WRITE. It looks like it works for me. I attached the output for the following command: sudo ./flashrom -p dediprog -Vw ~/coreboot-git/build/coreboot.rom Cheers, -- Noé Rubinstein Proformatique (groupe Avencall) - XiVO IPBX OpenHardware 10 bis, rue Lucien VOILIN - 92800 Puteaux

2 1

Supermicro X8DTN-+F
by Jimmie Tauriainen 01 Jun '11

01 Jun '11

Hi, heres a readout from X8DTN-+F which fails, it's a bit too brave to try flashing, so I don't know if this is helping anything? Has anyone looked into preserving or setting the serial number with flashrom? Best regards, Jimmie root@spts-10-10-10-83:~# dmidecode -t 2 # dmidecode 2.9 SMBIOS 2.6 present. Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: Supermicro Product Name: X8DTN+-F Version: 1234567890 Serial Number: NM11S32401 Asset Tag: 1234567890 Features: Board is a hosting board Board is replaceable Location In Chassis: 1234567890 Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 root@spts-10-10-10-83:~/flashrom# ./flashrom -Vr olde.bios flashrom v0.9.3-r1322 on Linux 2.6.38-8-generic (x86_64), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1400M loops per second, 10 myus = 10 us, 100 myus = 100 us, 1000 myus = 1012 us, 10000 myus = 10009 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Supermicro" DMI string system-product-name: "X8DTN+-F" DMI string system-version: "1234567890" DMI string baseboard-manufacturer: "Supermicro" DMI string baseboard-product-name: "X8DTN+-F" DMI string baseboard-version: "1234567890" DMI string chassis-type: "Main Server Chassis" Found chipset "Intel ICH10R", enabling flash write... chipset PCI ID is 8086:3a16, 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode enabled 0xffe00000/0xffa00000 FWH decode enabled 0xffd80000/0xff980000 FWH decode enabled 0xffd00000/0xff900000 FWH decode enabled 0xffc80000/0xff880000 FWH decode enabled 0xffc00000/0xff800000 FWH decode enabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled Maximum FWH chip size: 0x100000 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 Root Complex Register Block address = 0xfed1c000 GCS = 0x460: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0x6008 (HSFS) FLOCKDN 0, FDV 1, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0 0x50: 0x00001a1b (FRAP) BMWAG 0x00, BMRAG 0x00, BRWA 0x1a, BRRA 0x1b 0x54: 0x00010000 (FREG0: Flash Descriptor) 0x00000000-0x00001fff is read-only 0x58: 0x03ff0200 (FREG1: BIOS) 0x00200000-0x003fffff is read-write 0x5C: 0x01ff0002 (FREG2: Management Engine) 0x00002000-0x001fffff is locked 0x60: 0x00001fff (FREG3: Gigabit Ethernet) Gigabit Ethernet region is unused. 0x64: 0x00001fff (FREG4: Platform Data) Platform Data region is unused. 0x74: 0x00000000 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x04 (SSFS) AEL 0, FCERR 0, FDONE 1, SCIP 0 0x91: 0x000000 (SSFC) 0x94: 0x3906 (PREOP) 0x96: 0xd43b (OPTYPE) 0x98: 0x05200302 (OPMENU) 0x9C: 0x3906019f (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xB0: 0x00004000 (FDOC) Programming OPCODES... program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190 done SPI Read Configuration: prefetching disabled, caching enabled, OK. This chipset supports the following protocols: FWH, SPI. Probing for AMD Am29F010A/B, 128 kB: skipped. Probing for AMD Am29F002(N)BB, 256 kB: skipped. Probing for AMD Am29F002(N)BT, 256 kB: skipped. Probing for AMD Am29F016D, 2048 kB: skipped. Probing for AMD Am29F040B, 512 kB: skipped. Probing for AMD Am29F080B, 1024 kB: skipped. Probing for AMD Am29LV001BB, 128 kB: skipped. Probing for AMD Am29LV001BT, 128 kB: skipped. Probing for AMD Am29LV002BB, 256 kB: skipped. Probing for AMD Am29LV002BT, 256 kB: skipped. Probing for AMD Am29LV004BB, 512 kB: skipped. Probing for AMD Am29LV004BT, 512 kB: skipped. Probing for AMD Am29LV008BB, 1024 kB: skipped. Probing for AMD Am29LV008BT, 1024 kB: skipped. Probing for AMD Am29LV040B, 512 kB: skipped. Probing for AMD Am29LV081B, 1024 kB: skipped. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for AMIC A29002B, 256 kB: skipped. Probing for AMIC A29002T, 256 kB: skipped. Probing for AMIC A29040B, 512 kB: skipped. Probing for AMIC A49LF040A, 512 kB: skipped. Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Chip status register is 00 Found chip "Atmel AT25DF321" (4096 kB, SPI) at physical address 0xffc00000. Chip status register is 00 Chip status register: Sector Protection Register Lock (SRPL) is not set Chip status register: Bit 6 is not set Chip status register: Erase/Program Error (EPE) is not set Chip status register: WP# pin (WPP) is asserted Chip status register: Software Protection Status (SWP): no sectors are protected Chip status register: Write Enable Latch (WEL) is not set Chip status register: Write In Progress (WIP/BUSY) is not set Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT29C512, 64 kB: skipped. Probing for Atmel AT29C010A, 128 kB: skipped. Probing for Atmel AT29C020, 256 kB: skipped. Probing for Atmel AT29C040A, 512 kB: skipped. Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel AT49BV512, 64 kB: skipped. Probing for Atmel AT49F020, 256 kB: skipped. Probing for Atmel AT49F002(N), 256 kB: skipped. Probing for Atmel AT49F002(N)T, 256 kB: skipped. Probing for Bright BM29F040, 512 kB: skipped. Probing for EMST F49B002UA, 256 kB: skipped. Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25D16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon EN29F010, 128 kB: skipped. Probing for Eon EN29F002(A)(N)B, 256 kB: skipped. Probing for Eon EN29F002(A)(N)T, 256 kB: skipped. Probing for Fujitsu MBM29F004BC, 512 kB: skipped. Probing for Fujitsu MBM29F004TC, 512 kB: skipped. Probing for Fujitsu MBM29F400BC, 512 kB: skipped. Probing for Fujitsu MBM29F400TC, 512 kB: skipped. Probing for Hyundai HY29F002T, 256 kB: skipped. Probing for Hyundai HY29F002B, 256 kB: skipped. Probing for Hyundai HY29F040A, 512 kB: skipped. Probing for Intel 28F001BN/BX-B, 128 kB: skipped. Probing for Intel 28F001BN/BX-T, 128 kB: skipped. Probing for Intel 28F002BC/BL/BV/BX-T, 256 kB: skipped. Probing for Intel 28F008S3/S5/SC, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-B, 512 kB: skipped. Probing for Intel 28F004B5/BE/BV/BX-T, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-B, 512 kB: skipped. Probing for Intel 28F400BV/BX/CE/CV-T, 512 kB: skipped. Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix MX29F001B, 128 kB: skipped. Probing for Macronix MX29F001T, 128 kB: skipped. Probing for Macronix MX29F002B, 256 kB: skipped. Probing for Macronix MX29F002T, 256 kB: skipped. Probing for Macronix MX29F040, 512 kB: skipped. Probing for Macronix MX29LV040, 512 kB: skipped. Probing for MoselVitelic V29C51000B, 64 kB: skipped. Probing for MoselVitelic V29C51000T, 64 kB: skipped. Probing for MoselVitelic V29C51400B, 512 kB: skipped. Probing for MoselVitelic V29C51400T, 512 kB: skipped. Probing for MoselVitelic V29LC51000, 64 kB: skipped. Probing for MoselVitelic V29LC51001, 128 kB: skipped. Probing for MoselVitelic V29LC51002, 256 kB: skipped. Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC Pm29F002T, 256 kB: skipped. Probing for PMC Pm29F002B, 256 kB: skipped. Probing for PMC Pm39LV010, 128 kB: skipped. Probing for PMC Pm39LV020, 256 kB: skipped. Probing for PMC Pm39LV040, 512 kB: skipped. Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0x02, id2 0x75, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST SST25LF040A.RES, 512 kB: program_opcodes: preop=5006 optype=462b opmenu=05ab0302c79f0190 on-the-fly OPCODE (0xAB) re-programmed, op-pos=2 probe_spi_res2: id1 0xff, id2 0xff Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xff, id2 0xff Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST SST28SF040A, 512 kB: skipped. Probing for SST SST29EE010, 128 kB: skipped. Probing for SST SST29LE010, 128 kB: skipped. Probing for SST SST29EE020A, 256 kB: skipped. Probing for SST SST29LE020, 256 kB: skipped. Probing for SST SST39SF512, 64 kB: skipped. Probing for SST SST39SF010A, 128 kB: skipped. Probing for SST SST39SF020A, 256 kB: skipped. Probing for SST SST39SF040, 512 kB: skipped. Probing for SST SST39VF512, 64 kB: skipped. Probing for SST SST39VF010, 128 kB: skipped. Probing for SST SST39VF020, 256 kB: skipped. Probing for SST SST39VF040, 512 kB: skipped. Probing for SST SST39VF080, 1024 kB: skipped. Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0x02, id2 0x75, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xe0, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: skipped. Probing for SST SST49LF020A, 256 kB: skipped. Probing for SST SST49LF040, 512 kB: skipped. Probing for SST SST49LF040B, 512 kB: skipped. Probing for SST SST49LF080A, 1024 kB: skipped. Probing for SST SST49LF160C, 2048 kB: skipped. Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST M29F002B, 256 kB: skipped. Probing for ST M29F002T/NT, 256 kB: skipped. Probing for ST M29F040B, 512 kB: skipped. Probing for ST M29F400BB, 512 kB: skipped. Probing for ST M29F400BT, 512 kB: skipped. Probing for ST M29W010B, 128 kB: skipped. Probing for ST M29W040B, 512 kB: skipped. Probing for ST M29W512B, 64 kB: skipped. Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0x02, id2 0x75, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: Chip size 2048 kB is bigger than supported size 1024 kB of chipset/board/programmer for FWH interface, probe/read/erase/write may fail. probe_82802ab: id1 0xe0, id2 0x00, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001B, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51001T, 128 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002B, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51002T, 256 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {F,S,V}29C51004T, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004B, 512 kB: skipped. Probing for SyncMOS/MoselVitelic {S,V}29C31004T, 512 kB: skipped. Probing for TI TMS29F002RB, 256 kB: skipped. Probing for TI TMS29F002RT, 256 kB: skipped. Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x10, 128 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x20, 256 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x40, 512 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x80, 1024 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x16, 2048 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x32, 4096 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W25x64, 8192 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W29C020(C)/W29C022, 256 kB: skipped. Probing for Winbond W29C040/P, 512 kB: skipped. Probing for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012, 128 kB: skipped. Probing for Winbond W39L040, 512 kB: skipped. Probing for Winbond W39V040A, 512 kB: skipped. Probing for Winbond W39V040B, 512 kB: skipped. Probing for Winbond W39V040C, 512 kB: skipped. Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: skipped. Probing for Winbond W49F002U/N, 256 kB: skipped. Probing for Winbond W49F020, 256 kB: skipped. Probing for Winbond W49V002A, 256 kB: skipped. Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0x02, id2 0x75, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0x1f, id2 0x4700 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xff, id2 0xff === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading flash... Transaction error! Running OPCODE 0x03 failed at address 0x002000 (payload length was 64). Read operation failed! FAILED. Restoring MMIO space at 0x7f7c1bcfe8a0 Restoring MMIO space at 0x7f7c1bcfe89c Restoring MMIO space at 0x7f7c1bcfe898 Restoring MMIO space at 0x7f7c1bcfe896 Restoring MMIO space at 0x7f7c1bcfe894 Restoring PCI config space for 00:1f:0 reg 0xdc -- Jimmie Tauriainen South Pole AB Phone: +46 8 56237100 Anderstorpsvägen 16 Mobile: +46 707 777651 SE - 17154 Solna e-mail: jimmie(a)southpole.se www.southpole.se

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hi
by garrraaahyyy＠gmail.com 31 May '11

31 May '11

hey, you'll never see another opportunity like this http://g.msn.com.br/BR9/1369.0?http://cnbc7.com/news

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