[PATCH 12/12] add intel 6 series pci ids to chipset_enables

[Stefan Tauner]

as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update;
document number 324646-005, April 2011.

Signed-off-by: Stefan Tauner <[e-mail]>
---
 chipset_enable.c |   14 ++++++++++++++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 5f1a6fd..4333a16 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1025,6 +1025,20 @@ const struct penable chipset_enables[] = {
 	{0x1002, 0x4377, OK, "ATI", "SB400",		enable_flash_sb400},
 	{0x1166, 0x0200, OK, "Broadcom", "OSB4",	enable_flash_osb4},
 	{0x1166, 0x0205, OK, "Broadcom", "HT-1000",	enable_flash_ht1000},
+	{0x8086, 0x1C4E, NT, "Intel", "Q67",		enable_flash_ich10},
+	{0x8086, 0x1C4C, NT, "Intel", "Q65",		enable_flash_ich10},
+	{0x8086, 0x1C50, NT, "Intel", "B65",		enable_flash_ich10},
+	{0x8086, 0x1C4A, NT, "Intel", "H67",		enable_flash_ich10},
+	{0x8086, 0x1C46, NT, "Intel", "P67",		enable_flash_ich10},
+	{0x8086, 0x1C5C, NT, "Intel", "H61",		enable_flash_ich10},
+	{0x8086, 0x1C52, NT, "Intel", "C202",		enable_flash_ich10},
+	{0x8086, 0x1C54, NT, "Intel", "C204",		enable_flash_ich10},
+	{0x8086, 0x1C56, NT, "Intel", "C206",		enable_flash_ich10},
+	{0x8086, 0x1C4F, NT, "Intel", "QM67",		enable_flash_ich10},
+	{0x8086, 0x1C47, NT, "Intel", "UM67",		enable_flash_ich10},
+	{0x8086, 0x1C4B, NT, "Intel", "HM67",		enable_flash_ich10},
+	{0x8086, 0x1C49, NT, "Intel", "HM65",		enable_flash_ich10},
+	{0x8086, 0x1C4D, NT, "Intel", "QS67",		enable_flash_ich10},
 	{0x8086, 0x3b00, NT, "Intel", "3400 Desktop",	enable_flash_ich10},
 	{0x8086, 0x3b01, NT, "Intel", "3400 Mobile",	enable_flash_ich10},
 	{0x8086, 0x3b02, NT, "Intel", "P55",		enable_flash_ich10},
-- 
1.7.1