flashrom August 2014

flashrom@flashrom.org

34 participants
110 discussions

Re: [flashrom] Log from Intel Atom C2550
by Stefan Tauner 04 Aug '14

04 Aug '14

On Sun, 3 Aug 2014 00:57:55 -0400 TR Reardon <thomas_reardon(a)hotmail.com> wrote: > After last patch, working w log attached (but is flash chip detected > incorrectly?) Hi, that log looks perfectly reasonable including the detected flash chip. Why do you think it's a Macronix? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.
by Stefan Tauner 04 Aug '14

04 Aug '14

Thanks for the test, there are two issues here. One is that I swapped the erase block sizes of the P models. This is clearly shown in your logs. The ...0 model should have 64 kB erase blocks, but does not: > Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5 0x03ffff is 262143 in decimal... I have fixed that locally, but this is not the main problem here. The chip erase and the subsequent write should have worked, and your second try with the definition of the ...1 model too (because it contains the right block size). But both failed and I don't understand why yet. The first failed byte is equal in both cases but not all of them are (a different number of bytes fail in the two cases). This indicates that the behavior might be indeterministic. The contents of the "rog.bin" file were equal for both tries, right? What happens if you retry the second test again? /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c S25FL128P......1 -w rog.bin If you can not reproduce exactly the same output, i.e. Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb, failed byte count from 0x00000000-0x00ffffff: 0xaf66ea Then we are on the right track. In that case I would ask you how the chip is connected exactly, especially how WP# and HOLD# are driven. PS: You dont need to install flashrom after recompiling. You can execute the built binary in the source directory (make; ./flashrom ...). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add support for a bunch of 29GL parallel flash chips.
by Stefan Tauner 03 Aug '14

03 Aug '14

On Wed, 30 Jul 2014 01:06:20 +0200 Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > 29GL chips use a new 3-Byte device ID probing function at addresses > 0x01, 0x0E, 0x0F. > > Flash chip families supported by this method include... > - EON EN29GL > - Gigadevice GD29GL (if they really exist) > - ISSI (PMC) IS29GL > - Macronix MX29GL (+MX68GL1G0F) > - Spansion S29GL (+S70GL02G) > - Winbond W29GL > > This patch adds respective flash chip definitions for chips up to 16 MB from > Eon, ISSI, Macronix and Winbond. Bigger chips as well as those from > Gigadevice and Spansion are left out. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Self-acked and committed in r1835. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1835 - trunk
by repository service 03 Aug '14

03 Aug '14

Author: stefanct Date: Sun Aug 3 16:15:14 2014 New Revision: 1835 URL: http://flashrom.org/trac/flashrom/changeset/1835 Log: Add support for a bunch of 29GL parallel flash chips. 29GL chips use a new 3-Byte device ID probing function at addresses 0x01, 0x0E, 0x0F. Flash chip families supported by this method include... - EON EN29GL - Gigadevice GD29GL (if they really exist) - ISSI (PMC) IS29GL - Macronix MX29GL (+MX68GL1G0F) - Spansion S29GL (+S70GL02G) - Winbond W29GL This patch adds respective flash chip definitions for chips up to 16 MB from Eon, ISSI, Macronix and Winbond. Bigger chips as well as those from Gigadevice and Spansion are left out. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/chipdrivers.h trunk/flashchips.c trunk/flashchips.h trunk/jedec.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Sun Aug 3 15:05:45 2014 (r1834) +++ trunk/chipdrivers.h Sun Aug 3 16:15:14 2014 (r1835) @@ -139,6 +139,7 @@ void toggle_ready_jedec(const struct flashctx *flash, chipaddr dst); void data_polling_jedec(const struct flashctx *flash, chipaddr dst, uint8_t data); int probe_jedec(struct flashctx *flash); +int probe_jedec_29gl(struct flashctx *flash); int write_jedec(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int write_jedec_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int erase_sector_jedec(struct flashctx *flash, unsigned int page, unsigned int pagesize); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Aug 3 15:05:45 2014 (r1834) +++ trunk/flashchips.c Sun Aug 3 16:15:14 2014 (r1835) @@ -4892,6 +4892,120 @@ }, { + .vendor = "Eon", + .name = "EN29GL064(A)B", + .bustype = BUS_PARALLEL, + .manufacture_id = EON_ID, + .model_id = EON_EN29GL064B, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 127}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Eon", + .name = "EN29GL064(A)T", + .bustype = BUS_PARALLEL, + .manufacture_id = EON_ID, + .model_id = EON_EN29GL064T, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 127}, + {8 * 1024, 8}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Eon", + .name = "EN29GL064H/L", + .bustype = BUS_PARALLEL, + .manufacture_id = EON_ID, + .model_id = EON_EN29GL064HL, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Eon", + .name = "EN29GL128", + .bustype = BUS_PARALLEL, + .manufacture_id = EON_ID, + .model_id = EON_EN29GL128HL, + .total_size = 16384, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { .vendor = "Fujitsu", .name = "MBM29F004BC", .bustype = BUS_PARALLEL, @@ -6093,6 +6207,120 @@ }, { + .vendor = "ISSI", + .name = "IS29GL064B", + .bustype = BUS_PARALLEL, + .manufacture_id = ISSI_ID, + .model_id = ISSI_PMC_IS29GL064B, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 127}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "ISSI", + .name = "IS29GL064T", + .bustype = BUS_PARALLEL, + .manufacture_id = ISSI_ID, + .model_id = ISSI_PMC_IS29GL064T, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 127}, + {8 * 1024, 8}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "ISSI", + .name = "IS29GL064H/L", + .bustype = BUS_PARALLEL, + .manufacture_id = ISSI_ID, + .model_id = ISSI_PMC_IS29GL064HL, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "ISSI", + .name = "IS29GL128H/L", + .bustype = BUS_PARALLEL, + .manufacture_id = ISSI_ID, + .model_id = ISSI_PMC_IS29GL128HL, + .total_size = 16384, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { .vendor = "Macronix", .name = "MX23L3254", .bustype = BUS_SPI, @@ -7199,6 +7427,207 @@ { .vendor = "Macronix", + .name = "MX29GL320EB", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL320EB, + .total_size = 4096, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 63}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX29GL320ET", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL320ET, + .total_size = 4096, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 63}, + {8 * 1024, 8}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX29GL320EH/L", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL320EHL, + .total_size = 4096, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX29GL640EB", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL640EB, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 127}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX29GL640ET", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL640ET, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 127}, + {8 * 1024, 8}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX29GL640EH/L", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL640EHL, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", + .name = "MX29GL128F", + .bustype = BUS_PARALLEL, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX29GL128F, + .total_size = 16384, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX29LV040", .bustype = BUS_PARALLEL, .manufacture_id = MACRONIX_ID, @@ -13054,6 +13483,207 @@ }, { + .vendor = "Winbond", + .name = "W29GL032CB", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL032CB, + .total_size = 4096, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 63}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W29GL032CT", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL032CT, + .total_size = 4096, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 63}, + {8 * 1024, 8}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W29GL032CH/L", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL032CHL, + .total_size = 4096, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W29GL064CB", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL064CB, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 8}, + {64 * 1024, 127}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W29GL064CT", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL064CT, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 127}, + {8 * 1024, 8}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W29GL064CH/L", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL064CHL, + .total_size = 8192, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W29GL128C", + .bustype = BUS_PARALLEL, + .manufacture_id = AMD_ID, /* WTF: "Industry Standard compatible Manufacturer ID code of 01h" */ + .model_id = WINBOND_W29GL128CHL, + .total_size = 16384, + .page_size = 128 * 1024, /* actual page size is 16 */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec_29gl, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {128 * 1024, 128} }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + .voltage = {2700, 3600}, + }, + + { .vendor = "Winbond", .name = "W39F010", .bustype = BUS_PARALLEL, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Aug 3 15:05:45 2014 (r1834) +++ trunk/flashchips.h Sun Aug 3 16:15:14 2014 (r1835) @@ -29,9 +29,9 @@ * entry of each section should be the manufacturer ID, followed by the * list of devices from that manufacturer (sorted by device IDs). * - * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no + * Most LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no * continuation code. - * SPI parts have 16-bit device IDs if they support RDID. + * SPI parts have at least 16-bit device IDs if they support RDID. */ #define GENERIC_MANUF_ID 0xFFFF /* Check if there is a vendor ID */ @@ -290,6 +290,11 @@ #define EON_EN29LV640B 0xCB #define EON_EN29F002T 0x7F92 /* Same as EN29F002A */ #define EON_EN29F002B 0x7F97 /* Same as EN29F002AN */ +#define EON_EN29GL064HL 0x7E0C01 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define EON_EN29GL064T 0x7E1001 /* Same ID as EN29GL064AT */ +#define EON_EN29GL064B 0x7E1000 /* Same ID as EN29GL064AB */ +#define EON_EN29GL128HL 0x7F2101 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define EON_EN29GL256HL 0x7F2201 /* Uniform Sectors, WP protects Top OR Bottom sector */ #define EXCEL_ID 0x7F7F7F7F4A /* Excel Semiconductor Inc. (ESI) resides in bank 5 */ #define EXCEL_ID_NOPREFIX 0x4A /* ESI, missing 0x7F prefix */ @@ -356,6 +361,7 @@ #define GIGADEVICE_GD25LQ32 0x6016 #define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */ #define GIGADEVICE_GD25LQ128 0x6018 +#define GIGADEVICE_GD29GL064CAB 0x7E0601 #define HYUNDAI_ID 0xAD /* Hyundai */ #define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */ @@ -424,7 +430,14 @@ #define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ -#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */ +#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, see also PMC. */ +#define ISSI_PMC_IS29GL032B 0xF9 +#define ISSI_PMC_IS29GL032T 0xF6 +#define ISSI_PMC_IS29GL064B 0x7E1000 +#define ISSI_PMC_IS29GL064T 0x7E1001 +#define ISSI_PMC_IS29GL064HL 0x7E0C01 +#define ISSI_PMC_IS29GL128HL 0x7E2101 +#define ISSI_PMC_IS29GL256HL 0x7E2201 #define MACRONIX_ID 0xC2 /* Macronix (MX) */ /* Mask ROMs */ @@ -468,6 +481,16 @@ #define MACRONIX_MX29F400T 0x23 /* Same as MX29F400CT */ #define MACRONIX_MX29F800B 0x58 #define MACRONIX_MX29F800T 0xD6 +#define MACRONIX_MX29GL320EB 0x7E1A00 +#define MACRONIX_MX29GL320ET 0x7E1A01 +#define MACRONIX_MX29GL320EHL 0x7E1D00 +#define MACRONIX_MX29GL640EB 0x7E1000 +#define MACRONIX_MX29GL640ET 0x7E1001 +#define MACRONIX_MX29GL640EHL 0x7E0C01 +#define MACRONIX_MX29GL128F 0x7E2101 /* Same as MX29GL128E */ +#define MACRONIX_MX29GL256F 0x7E2201 /* Same as MX29GL256E */ +#define MACRONIX_MX29GL512F 0x7E2301 +#define MACRONIX_MX68GL1G0F 0x7E2801 #define MACRONIX_MX29LV002CB 0x5A #define MACRONIX_MX29LV002CT 0x59 #define MACRONIX_MX29LV004B 0xB6 /* Same as MX29LV004CB */ @@ -506,8 +529,9 @@ /* * Programmable Micro Corp is listed in JEP106W in bank 2, so it should * have a 0x7F continuation code prefix. - * Apparently this name is owned by "Chingis Technology Corporation" http://www.chingistek.com which is now a - * subsidiary of ISSI. They continue to use the PMC manufacturer ID nevertheless. + * Apparently PMC was renamed to "Chingis Technology Corporation" http://www.chingistek.com which is now a + * subsidiary of ISSI. They continue to use the PMC manufacturer ID (instead of ISSI's) nevertheless, even for + * new chips with IS* model numbers. */ #define PMC_ID 0x7F9D /* PMC */ #define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */ @@ -557,12 +581,10 @@ #define SHARP_LHF00L02 0xC9 /* Same as LHF00L06/LHF00L07 */ #define SHARP_LHF00L04 0xCF /* Same as LHF00L03/LHF00L05 */ -/* - * Spansion was previously a joint venture of AMD and Fujitsu. - * S25 chips are SPI. The first device ID byte is memory type and - * the second device ID byte is memory capacity. - */ +/* Spansion was previously a joint venture of AMD and Fujitsu. */ #define SPANSION_ID 0x01 /* Spansion, same ID as AMD */ +/* S25 chips are SPI. The first device ID byte is memory type and + * the second device ID byte is memory capacity. */ #define SPANSION_S25FL004A 0x0212 #define SPANSION_S25FL008A 0x0213 #define SPANSION_S25FL016A 0x0214 @@ -577,6 +599,40 @@ #define SPANSION_S25FL132K 0x4016 #define SPANSION_S25FL164K 0x4017 +/* Spansion 29GL families got a suffix indicating the process technology but share the same 3-Byte IDs. They can + * however be differentiated by CFI byte 45h. Some versions exist which have special top or bottom boot sectors + * and various WP configurations (not heeded in the table below). + * + * Suf. Process Sector Sz Rd Page Wr Page Data Width OTP Sz Min Size Max Size + * A 200 nm 64 kB 8 B 32 B x8/x16 256 B 16Mb/ 2MB 64Mb/ 8MB + * M 230 nm 64 kB 8 B 32 B x8/x16 256 B 32Mb/ 4MB 256Mb/ 32MB + * N* 110 nm 64 kB 16 B 32 B x8/x16 256 B 32Mb/ 4MB 64Mb/ 8MB + * N* 110 nm 128 kB 16 B 32 B x8/x16 256 B 128Mb/16MB 256Mb/ 64MB + * P 90 nm 128 kB 16 B 64 B x8/x16 256 B 128Mb/16MB 2Gb/256MB + * S 65 nm 128 kB 32 B 512 B x8 only 512 B 128Mb/16MB 2Gb/256MB + * + * For the N series there are two subgroups: the 4 and 8MB devices (S29GL032N, S29GL064N) have 64 kB erase + * sectors while the bigger chips got 128 kB sectors. + * Each series includes multiple models varying in speedgrade, boot block configurations etc. + */ +#define SPANSION_S29GL016_1 0xC4 /* Top Boot Sector, WP protects Top 2 sectors */ +#define SPANSION_S29GL016_2 0x49 /* Bottom Boot Sector, WP protects Bottom 2 sectors */ +/* Same IDs for S29GL032A, S29GL032M, S29GL032N (variations) */ +#define SPANSION_S29GL032_1289 0x7E1D00 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define SPANSION_S29GL032_3 0x7E1A01 /* Top Boot Sector, WP protects Top 2 sectors */ +#define SPANSION_S29GL032_4 0x7E1A00 /* Bottom Boot Sector, WP protects Bottom 2 sectors */ +/* Same IDs for S29GL064A, S29GL064M, S29GL064N, S29GL064S (variations) */ +#define SPANSION_S29GL064_1289 0x7E0C01 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define SPANSION_S29GL064_3 0x7E1001 /* Top Boot Sector, WP protects Top 2 sectors */ +#define SPANSION_S29GL064_4 0x7E1000 /* Bottom Boot Sector, WP protects Bottom 2 sectors */ +#define SPANSION_S29GL064_567 0x7E1301 /* x16 only, Uniform Sectors */ + +#define SPANSION_S29GL128 0x7E2101 /* Same ID for S29GL128M, S29GL128N, S29GL128P, S29GL128S */ +#define SPANSION_S29GL256 0x7E2201 /* Same ID for S29GL256M, S29GL256N, S29GL256P, S29GL256S */ +#define SPANSION_S29GL512 0x7E2301 /* Same ID for S29GL512P, S29GL512S */ +#define SPANSION_S29GL01G 0x7E2801 /* Same ID for S29GL01GP, S29GL01GS */ +#define SPANSION_S70GL02G 0x7E4801 /* Same ID for S70GL02GP, S70GL02GS; based on two S29GL01G dies respectively */ + /* * SST25 chips are SPI, first byte of device ID is memory type, second * byte of device ID is related to log(bitsize) at least for some chips. @@ -776,6 +832,14 @@ #define WINBOND_W29C020 0x45 /* Same as W29C020C, W29C022 and ASD AE29F2008 */ #define WINBOND_W29C040 0x46 /* Same as W29C040P */ #define WINBOND_W29C512A 0xC8 /* Same as W29EE512 */ +#define WINBOND_W29GL032CHL 0x7E1D01 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define WINBOND_W29GL032CB 0x7E1A00 /* Top Boot Sector, WP protects Top 2 sectors */ +#define WINBOND_W29GL032CT 0x7E1A01 /* Bottom Boot Sector, WP protects Bottom 2 sectors */ +#define WINBOND_W29GL064CHL 0x7E0C01 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define WINBOND_W29GL064CB 0x7E1000 /* Top Boot Sector, WP protects Top 2 sectors */ +#define WINBOND_W29GL064CT 0x7E1001 /* Bottom Boot Sector, WP protects Bottom 2 sectors */ +#define WINBOND_W29GL128CHL 0x7E2101 /* Uniform Sectors, WP protects Top OR Bottom sector */ +#define WINBOND_W29GL256HL 0x7E2201 /* Same ID for W29GL0256P and W29GL0256S; uniform Sectors, WP protects Top OR Bottom sector */ #define WINBOND_W39F010 0xA1 #define WINBOND_W39L010 0x31 #define WINBOND_W39L020 0xB5 Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Sun Aug 3 15:05:45 2014 (r1834) +++ trunk/jedec.c Sun Aug 3 16:15:14 2014 (r1835) @@ -121,6 +121,55 @@ chip_writeb(flash, 0xA0, bios + (0x5555 & mask)); } +int probe_jedec_29gl(struct flashctx *flash) +{ + unsigned int mask = getaddrmask(flash->chip); + chipaddr bios = flash->virtual_memory; + const struct flashchip *chip = flash->chip; + + /* Reset chip to a clean slate */ + chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); + + /* Issue JEDEC Product ID Entry command */ + chip_writeb(flash, 0xAA, bios + (0x5555 & mask)); + chip_writeb(flash, 0x55, bios + (0x2AAA & mask)); + chip_writeb(flash, 0x90, bios + (0x5555 & mask)); + + /* Read product ID */ + // FIXME: Continuation loop, second byte is at word 0x100/byte 0x200 + uint32_t man_id = chip_readb(flash, bios + 0x00); + uint32_t dev_id = (chip_readb(flash, bios + 0x01) << 16) | + (chip_readb(flash, bios + 0x0E) << 8) | + (chip_readb(flash, bios + 0x0F) << 0); + + /* Issue JEDEC Product ID Exit command */ + chip_writeb(flash, 0xF0, bios + (0x5555 & mask)); + + msg_cdbg("%s: man_id 0x%02x, dev_id 0x%06x", __func__, man_id, dev_id); + if (!oddparity(man_id)) + msg_cdbg(", man_id parity violation"); + + /* Read the product ID location again. We should now see normal flash contents. */ + uint32_t flashcontent1 = chip_readb(flash, bios + 0x00); // FIXME: Continuation loop + uint32_t flashcontent2 = (chip_readb(flash, bios + 0x01) << 16) | + (chip_readb(flash, bios + 0x0E) << 8) | + (chip_readb(flash, bios + 0x0F) << 0); + + if (man_id == flashcontent1) + msg_cdbg(", man_id seems to be normal flash content"); + if (dev_id == flashcontent2) + msg_cdbg(", dev_id seems to be normal flash content"); + + msg_cdbg("\n"); + if (man_id != chip->manufacture_id || dev_id != chip->model_id) + return 0; + + if (chip->feature_bits & FEATURE_REGISTERMAP) + map_flash_registers(flash); + + return 1; +} + static int probe_jedec_common(struct flashctx *flash, unsigned int mask) { chipaddr bios = flash->virtual_memory;

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Re: [flashrom] [PATCH 2/2] fixup! Add support for Atmel AT49LH004.
by Stefan Tauner 03 Aug '14

03 Aug '14

I have committed both patches in r1833 and r1834 because I don't expect a timely review or tests without this being in trunk. Also, I want to rebase the probing patch set on top of it and I don't want to let this bitrot forever (again). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

1 0

[commit] r1834 - trunk
by repository service 03 Aug '14

03 Aug '14

Author: stefanct Date: Sun Aug 3 15:05:45 2014 New Revision: 1834 URL: http://flashrom.org/trac/flashrom/changeset/1834 Log: Add support for Atmel AT49LH004 and AT49LH00B4. Also, slightly refine the definition of AT49LH002. Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sun Aug 3 15:05:34 2014 (r1833) +++ trunk/flashchips.c Sun Aug 3 15:05:45 2014 (r1834) @@ -3049,10 +3049,10 @@ .model_id = ATMEL_AT49LH002, .total_size = 256, .page_size = 0, /* unused */ - .feature_bits = FEATURE_REGISTERMAP, /* TODO: LPC OK too? */ + .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, - .probe = probe_82802ab, /* TODO: 0xff cmd not documented? */ - .probe_timing = TIMING_FIXME, + .probe = probe_82802ab, + .probe_timing = TIMING_ZERO, .block_erasers = { { @@ -3062,16 +3062,88 @@ {8 * 1024, 2}, {16 * 1024, 1}, }, - .block_erase = erase_block_82802ab, + .block_erase = NULL, /* TODO: Implement. */ }, { .eraseblocks = { {64 * 1024, 4}, }, + .block_erase = erase_block_82802ab, + }, + }, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, + .write = write_82802ab, + .read = read_memmapped, + .voltage = {3000, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT49LH00B4", + .bustype = BUS_LPC | BUS_FWH, /* A/A Mux */ + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49LH00B4, + .total_size = 512, + .page_size = 0, /* unused */ + .feature_bits = FEATURE_REGISTERMAP, + .tested = TEST_UNTESTED, + .probe = probe_82802ab, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 2}, + {16 * 1024, 1}, + {32 * 1024, 1}, + {64 * 1024, 7}, + }, + .block_erase = NULL, /* TODO: Implement. */ + }, { + .eraseblocks = { + {64 * 1024, 8}, + }, + .block_erase = erase_block_82802ab, + }, + }, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, + .write = write_82802ab, + .read = read_memmapped, + .voltage = {3000, 3600}, + }, + + { + .vendor = "Atmel", + .name = "AT49LH004", + .bustype = BUS_LPC | BUS_FWH, /* A/A Mux */ + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT49LH004, + .total_size = 512, + .page_size = 0, /* unused */ + .feature_bits = FEATURE_REGISTERMAP, + .tested = TEST_UNTESTED, + .probe = probe_82802ab, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { + {64 * 1024, 8}, + }, .block_erase = NULL, /* TODO: Implement. */ }, }, - .printlock = NULL, /* TODO */ - .unlock = NULL, /* unlock_82802ab() not correct(?) */ + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sun Aug 3 15:05:34 2014 (r1833) +++ trunk/flashchips.h Sun Aug 3 15:05:45 2014 (r1834) @@ -190,6 +190,8 @@ #define ATMEL_AT49BV512 0x03 #define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */ #define ATMEL_AT49LH002 0xE9 +#define ATMEL_AT49LH00B4 0xED +#define ATMEL_AT49LH004 0xEE #define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */ #define ATMEL_AT49F010 0x17 /* Same as AT49HF010 */ #define ATMEL_AT49F020 0x0B

1 0

[commit] r1833 - trunk
by repository service 03 Aug '14

03 Aug '14

Author: stefanct Date: Sun Aug 3 15:05:34 2014 New Revision: 1833 URL: http://flashrom.org/trac/flashrom/changeset/1833 Log: Refactor unlocking of many chips with locking at register space address +2. This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* families. The erase and write test status bits of all affected chips have been reset. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> Deleted: trunk/pm49fl00x.c Modified: trunk/82802ab.c trunk/Makefile trunk/chipdrivers.h trunk/flashchips.c trunk/jedec.c trunk/sst49lfxxxc.c trunk/stm50.c trunk/w39.c Modified: trunk/82802ab.c ============================================================================== --- trunk/82802ab.c Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/82802ab.c Sun Aug 3 15:05:34 2014 (r1833) @@ -108,17 +108,6 @@ return status; } -int unlock_82802ab(struct flashctx *flash) -{ - int i; - //chipaddr wrprotect = flash->virtual_registers + page + 2; - - for (i = 0; i < flash->chip->total_size * 1024; i+= flash->chip->page_size) - chip_writeb(flash, 0, flash->virtual_registers + i + 2); - - return 0; -} - int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize) { Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/Makefile Sun Aug 3 15:05:34 2014 (r1833) @@ -351,7 +351,7 @@ # Flash chip drivers and bus support infrastructure. CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ - sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \ + sst28sf040.o m29f400bt.o 82802ab.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ opaque.o sfdp.o en29lv640b.o at45db.o Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/chipdrivers.h Sun Aug 3 15:05:34 2014 (r1833) @@ -131,7 +131,6 @@ int erase_block_82802ab(struct flashctx *flash, unsigned int page, unsigned int pagesize); int write_82802ab(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void print_status_82802ab(uint8_t status); -int unlock_82802ab(struct flashctx *flash); int unlock_28f004s5(struct flashctx *flash); int unlock_lh28f008bjt(struct flashctx *flash); @@ -146,15 +145,20 @@ int erase_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize); int erase_chip_block_jedec(struct flashctx *flash, unsigned int page, unsigned int blocksize); +int unlock_regspace2_uniform_32k(struct flashctx *flash); +int unlock_regspace2_uniform_64k(struct flashctx *flash); +int unlock_regspace2_block_eraser_0(struct flashctx *flash); +int unlock_regspace2_block_eraser_1(struct flashctx *flash); +int unlock_regspace2_block(const struct flashctx *flash, chipaddr off); +int printlock_regspace2_uniform_64k(struct flashctx *flash); +int printlock_regspace2_block_eraser_0(struct flashctx *flash); +int printlock_regspace2_block_eraser_1(struct flashctx *flash); + /* m29f400bt.c */ int probe_m29f400bt(struct flashctx *flash); int write_m29f400bt(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); void protect_m29f400bt(struct flashctx *flash, chipaddr bios); -/* pm49fl00x.c */ -int unlock_49fl00x(struct flashctx *flash); -int lock_49fl00x(struct flashctx *flash); - /* sst28sf040.c */ int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size); @@ -164,7 +168,6 @@ /* sst49lfxxxc.c */ int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size); -int unlock_49lfxxxc(struct flashctx *flash); /* sst_fwhub.c */ int printlock_sst_fwhub(struct flashctx *flash); @@ -184,8 +187,6 @@ int printlock_w39v080a(struct flashctx *flash); int printlock_w39v080fa(struct flashctx *flash); int printlock_w39v080fa_dual(struct flashctx *flash); -int unlock_w39v040fb(struct flashctx *flash); -int unlock_w39v080fa(struct flashctx *flash); int printlock_at49f(struct flashctx *flash); /* w29ee011.c */ @@ -193,8 +194,6 @@ /* stm50.c */ int erase_sector_stm50(struct flashctx *flash, unsigned int block, unsigned int blocksize); -int unlock_stm50_uniform(struct flashctx *flash); -int unlock_stm50_nonuniform(struct flashctx *flash); /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/flashchips.c Sun Aug 3 15:05:34 2014 (r1833) @@ -1382,7 +1382,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .block_erasers = @@ -1395,7 +1395,7 @@ .block_erase = erase_chip_block_jedec, } }, - .unlock = unlock_49fl00x, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -5979,7 +5979,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */ .block_erasers = @@ -5989,7 +5989,7 @@ .block_erase = erase_block_82802ab, }, }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -6014,7 +6014,7 @@ .block_erase = erase_block_82802ab, }, }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -9202,7 +9202,7 @@ .total_size = 256, .page_size = 16 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .block_erasers = @@ -9218,7 +9218,7 @@ .block_erase = erase_chip_block_jedec, } }, - .unlock = unlock_49fl00x, + .unlock = unlock_regspace2_uniform_32k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -9233,7 +9233,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = TIMING_ZERO, /* routine is wrapper to probe_jedec (pm49fl00x.c) */ .block_erasers = @@ -9249,7 +9249,7 @@ .block_erase = erase_chip_block_jedec, } }, - .unlock = unlock_49fl00x, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -9562,7 +9562,7 @@ .block_erase = NULL, /* 30 D0, only in A/A mux mode */ }, }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11104,7 +11104,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11169,7 +11170,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11184,7 +11186,7 @@ .total_size = 2048, .page_size = 4 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = @@ -11202,7 +11204,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11307,7 +11310,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_EITHER_RESET | FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 1, /* 150ns */ .block_erasers = @@ -11323,7 +11326,7 @@ .block_erase = NULL, } }, - .unlock = unlock_82802ab, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11368,7 +11371,7 @@ .total_size = 2048, .page_size = 4 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = @@ -11386,7 +11389,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_49lfxxxc, + .printlock = printlock_regspace2_block_eraser_1, + .unlock = unlock_regspace2_block_eraser_1, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, @@ -11654,7 +11658,7 @@ } }, .write = write_82802ab, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -11687,7 +11691,7 @@ } }, .write = write_82802ab, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ }, @@ -11701,7 +11705,7 @@ .total_size = 1024, .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRE, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_FIXME, .block_erasers = @@ -11719,7 +11723,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11752,7 +11757,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11767,9 +11773,9 @@ .total_size = 256, .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -11780,9 +11786,13 @@ {16 * 1024, 1}, }, .block_erase = erase_block_82802ab, + }, { + .eraseblocks = { {256 * 1024, 1}, }, + .block_erase = NULL, /* Only in A/A mux mode */ } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11807,7 +11817,7 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11832,7 +11842,7 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11847,7 +11857,7 @@ .total_size = 1024, .page_size = 0, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = @@ -11857,7 +11867,7 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11882,7 +11892,7 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_uniform, + .unlock = unlock_regspace2_uniform_64k, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -11913,7 +11923,8 @@ .block_erase = erase_block_82802ab, } }, - .unlock = unlock_stm50_nonuniform, + .printlock = printlock_regspace2_block_eraser_0, + .unlock = unlock_regspace2_block_eraser_0, .write = write_82802ab, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program & erase */ @@ -13181,7 +13192,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -13198,7 +13209,7 @@ } }, .printlock = printlock_w39v040fa, - .unlock = unlock_sst_fwhub, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, @@ -13213,7 +13224,7 @@ .total_size = 512, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -13227,7 +13238,7 @@ } }, .printlock = printlock_w39v040fb, - .unlock = unlock_w39v040fb, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program */ @@ -13418,7 +13429,7 @@ .total_size = 1024, .page_size = 64 * 1024, .feature_bits = FEATURE_REGISTERMAP | FEATURE_EITHER_RESET, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PR, .probe = probe_jedec, .probe_timing = 10, .block_erasers = @@ -13432,7 +13443,7 @@ } }, .printlock = printlock_w39v080fa, - .unlock = unlock_w39v080fa, + .unlock = unlock_regspace2_uniform_64k, .write = write_jedec_1, .read = read_memmapped, .voltage = {3000, 3600}, /* Also has 12V fast program */ Modified: trunk/jedec.c ============================================================================== --- trunk/jedec.c Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/jedec.c Sun Aug 3 15:05:34 2014 (r1833) @@ -4,8 +4,9 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2006 Giampiero Giancipoli <gianci(a)email.it> * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> - * Copyright (C) 2007 Carl-Daniel Hailfinger + * Copyright (C) 2007, 2011 Carl-Daniel Hailfinger * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2014 Stefan Tauner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -510,3 +511,185 @@ mask = getaddrmask(flash->chip); return erase_chip_jedec_common(flash, mask); } + +struct unlockblock { + unsigned int size; + unsigned int count; +}; + +typedef int (*unlockblock_func)(const struct flashctx *flash, chipaddr offset); +static int regspace2_walk_unlockblocks(const struct flashctx *flash, const struct unlockblock *block, unlockblock_func func) +{ + chipaddr off = flash->virtual_registers + 2; + while (block->count != 0) { + unsigned int j; + for (j = 0; j < block->count; j++) { + if (func(flash, off)) + return -1; + off += block->size; + } + block++; + } + return 0; +} + +#define REG2_RWLOCK ((1 << 2) | (1 << 0)) +#define REG2_LOCKDOWN (1 << 1) +#define REG2_MASK (REG2_RWLOCK | REG2_LOCKDOWN) + +static int printlock_regspace2_block(const struct flashctx *flash, chipaddr offset) +{ + chipaddr wrprotect = flash->virtual_registers + offset + 2; + uint8_t state = chip_readb(flash, wrprotect); + msg_cdbg("Lock status of block at 0x%0*" PRIxPTR " is ", PRIxPTR_WIDTH, offset); + switch (state & REG2_MASK) { + case 0: + msg_cdbg("Full Access.\n"); + break; + case 1: + msg_cdbg("Write Lock (Default State).\n"); + break; + case 2: + msg_cdbg("Locked Open (Full Access, Locked Down).\n"); + break; + case 3: + msg_cdbg("Write Lock, Locked Down.\n"); + break; + case 4: + msg_cdbg("Read Lock.\n"); + break; + case 5: + msg_cdbg("Read/Write Lock.\n"); + break; + case 6: + msg_cdbg("Read Lock, Locked Down.\n"); + break; + case 7: + msg_cdbg("Read/Write Lock, Locked Down.\n"); + break; + } + return 0; +} + +int printlock_regspace2_blocks(const struct flashctx *flash, const struct unlockblock *blocks) +{ + return regspace2_walk_unlockblocks(flash, blocks, &printlock_regspace2_block); +} + +static int printlock_regspace2_uniform(struct flashctx *flash, unsigned long block_size) +{ + const unsigned int elems = flash->chip->total_size * 1024 / block_size; + struct unlockblock blocks[2] = {{.size = block_size, .count = elems}}; + return regspace2_walk_unlockblocks(flash, blocks, &printlock_regspace2_block); +} + +int printlock_regspace2_uniform_64k(struct flashctx *flash) +{ + return printlock_regspace2_uniform(flash, 64 * 1024); +} + +int printlock_regspace2_block_eraser_0(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[0].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &printlock_regspace2_block); +} + +int printlock_regspace2_block_eraser_1(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[1].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &printlock_regspace2_block); +} + +static int changelock_regspace2_block(const struct flashctx *flash, chipaddr offset, uint8_t new_bits) +{ + chipaddr wrprotect = flash->virtual_registers + offset + 2; + uint8_t old; + + if (new_bits & ~REG2_MASK) { + msg_cerr("Invalid locking change 0x%02x requested at 0x%0*" PRIxPTR "! " + "Please report a bug at flashrom(a)flashrom.org\n", + new_bits, PRIxPTR_WIDTH, offset); + return -1; + } + old = chip_readb(flash, wrprotect); + /* Early exist if no change (of read/write/lockdown) was requested. */ + if (((old ^ new_bits) & REG2_MASK) == 0) { + msg_cdbg2("Locking status at 0x%0*" PRIxPTR " not changed\n", PRIxPTR_WIDTH, offset); + return 0; + } + /* Normally lockdowns can not be cleared. Try nevertheless if requested. */ + if ((old & REG2_LOCKDOWN) && !(new_bits & REG2_LOCKDOWN)) { + chip_writeb(flash, old & ~REG2_LOCKDOWN, wrprotect); + if (chip_readb(flash, wrprotect) != (old & ~REG2_LOCKDOWN)) { + msg_cerr("Lockdown can't be removed at 0x%0*" PRIxPTR "!\n", PRIxPTR_WIDTH, offset); + return -1; + } + } + /* Change read or write lock? */ + if ((old ^ new_bits) & REG2_RWLOCK) { + /* Do not lockdown yet. */ + msg_cdbg("Changing locking status at 0x%0*" PRIxPTR " to 0x%02x\n", PRIxPTR_WIDTH, offset, new_bits & REG2_RWLOCK); + chip_writeb(flash, new_bits & REG2_RWLOCK, wrprotect); + if (chip_readb(flash, wrprotect) != (new_bits & REG2_RWLOCK)) { + msg_cerr("Locking status change FAILED at 0x%0*" PRIxPTR "!\n", PRIxPTR_WIDTH, offset); + return -1; + } + } + /* Enable lockdown if requested. */ + if (!(old & REG2_LOCKDOWN) && (new_bits & REG2_LOCKDOWN)) { + msg_cdbg("Enabling lockdown at 0x%0*" PRIxPTR "\n", PRIxPTR_WIDTH, offset); + chip_writeb(flash, new_bits, wrprotect); + if (chip_readb(flash, wrprotect) != new_bits) { + msg_cerr("Enabling lockdown FAILED at 0x%0*" PRIxPTR "!\n", PRIxPTR_WIDTH, offset); + return -1; + } + } + + return 0; +} + +int unlock_regspace2_block(const struct flashctx *flash, chipaddr off) +{ + chipaddr wrprotect = flash->virtual_registers + off + 2; + uint8_t old = chip_readb(flash, wrprotect); + /* We don't care for the lockdown bit as long as the RW locks are 0 after we're done */ + return changelock_regspace2_block(flash, off, old & ~REG2_RWLOCK); +} + +static int unlock_regspace2_uniform(struct flashctx *flash, unsigned long block_size) +{ + const unsigned int elems = flash->chip->total_size * 1024 / block_size; + struct unlockblock blocks[2] = {{.size = block_size, .count = elems}}; + return regspace2_walk_unlockblocks(flash, blocks, &unlock_regspace2_block); +} + +int unlock_regspace2_uniform_64k(struct flashctx *flash) +{ + return unlock_regspace2_uniform(flash, 64 * 1024); +} + +int unlock_regspace2_uniform_32k(struct flashctx *flash) +{ + return unlock_regspace2_uniform(flash, 32 * 1024); +} + +int unlock_regspace2_block_eraser_0(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[0].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &unlock_regspace2_block); +} + +int unlock_regspace2_block_eraser_1(struct flashctx *flash) +{ + // FIXME: this depends on the eraseblocks not to be filled up completely (i.e. to be null-terminated). + const struct unlockblock *unlockblocks = + (const struct unlockblock *)flash->chip->block_erasers[1].eraseblocks; + return regspace2_walk_unlockblocks(flash, unlockblocks, &unlock_regspace2_block); +} + Modified: trunk/sst49lfxxxc.c ============================================================================== --- trunk/sst49lfxxxc.c Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/sst49lfxxxc.c Sun Aug 3 15:05:34 2014 (r1833) @@ -23,45 +23,6 @@ #include "flash.h" #include "chipdrivers.h" -static int write_lockbits_block_49lfxxxc(struct flashctx *flash, - unsigned long address, - unsigned char bits) -{ - unsigned long lock = flash->virtual_registers + address + 2; - msg_cdbg("lockbits at address=0x%08lx is 0x%01x\n", lock, - chip_readb(flash, lock)); - chip_writeb(flash, bits, lock); - - return 0; -} - -static int write_lockbits_49lfxxxc(struct flashctx *flash, unsigned char bits) -{ - chipaddr registers = flash->virtual_registers; - unsigned int i, left = flash->chip->total_size * 1024; - unsigned long address; - - msg_cdbg("\nbios=0x%08" PRIxPTR "\n", registers); - for (i = 0; left > 65536; i++, left -= 65536) { - write_lockbits_block_49lfxxxc(flash, i * 65536, bits); - } - address = i * 65536; - write_lockbits_block_49lfxxxc(flash, address, bits); - address += 32768; - write_lockbits_block_49lfxxxc(flash, address, bits); - address += 8192; - write_lockbits_block_49lfxxxc(flash, address, bits); - address += 8192; - write_lockbits_block_49lfxxxc(flash, address, bits); - - return 0; -} - -int unlock_49lfxxxc(struct flashctx *flash) -{ - return write_lockbits_49lfxxxc(flash, 0); -} - int erase_sector_49lfxxxc(struct flashctx *flash, unsigned int address, unsigned int sector_size) { Modified: trunk/stm50.c ============================================================================== --- trunk/stm50.c Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/stm50.c Sun Aug 3 15:05:34 2014 (r1833) @@ -27,63 +27,8 @@ */ #include "flash.h" -#include "flashchips.h" #include "chipdrivers.h" -static int stm50_unlock_address(struct flashctx *flash, int offset) -{ - chipaddr wrprotect = flash->virtual_registers + 2; - static const uint8_t unlock_sector = 0x00; - msg_cdbg("unlocking at 0x%x\n", offset); - chip_writeb(flash, unlock_sector, wrprotect + offset); - if (chip_readb(flash, wrprotect + offset) != unlock_sector) { - msg_cerr("Cannot unlock address 0x%x\n", offset); - return -1; - } - return 0; -} - -/* Chips known to use a non-uniform block and sector layout for locking (as well as for erasing): - * Name Size Address range of lock registers - * M50FLW080A 1MB FFB00002 - FFBFF002 - * M50FLW080B 1MB FFB00002 - FFBFF002 - * M50FW002 256k FFBC0002 - FFBFC002 - * M50LPW116 2MB FFA00002 - FFBFC002 - */ -int unlock_stm50_nonuniform(struct flashctx *flash) -{ - int i; - struct eraseblock *eraseblocks = flash->chip->block_erasers[0].eraseblocks; - unsigned int done = 0; - for (i = 0; i < NUM_ERASEREGIONS && eraseblocks[i].count != 0; i++) { - unsigned int block_size = eraseblocks[i].size; - unsigned int block_count = eraseblocks[i].count; - - int j; - for (j = 0; j < block_count; j++) { - if (stm50_unlock_address(flash, done)) { - msg_cerr("UNLOCK FAILED!\n"); - return -1; - } - done += block_count * block_size; - } - } - return 0; -} - -/* Unlocking for uniform 64 kB blocks starting at offset 2 of the feature registers. */ -int unlock_stm50_uniform(struct flashctx *flash) -{ - int i; - for (i = 0; i < flash->chip->total_size * 1024; i+= 64 * 1024) { - if (stm50_unlock_address(flash, i)) { - msg_cerr("UNLOCK FAILED!\n"); - return -1; - } - } - return 0; -} - static int stm50_erase_sector(struct flashctx *flash, unsigned int addr) { chipaddr bios = flash->virtual_memory + addr; Modified: trunk/w39.c ============================================================================== --- trunk/w39.c Mon Jul 28 22:35:21 2014 (r1832) +++ trunk/w39.c Sun Aug 3 15:05:34 2014 (r1833) @@ -20,65 +20,7 @@ */ #include "flash.h" - -static int printlock_w39_fwh_block(struct flashctx *flash, unsigned int offset) -{ - chipaddr wrprotect = flash->virtual_registers + offset + 2; - uint8_t locking; - - locking = chip_readb(flash, wrprotect); - msg_cdbg("Lock status of block at 0x%08x is ", offset); - switch (locking & 0x7) { - case 0: - msg_cdbg("Full Access.\n"); - break; - case 1: - msg_cdbg("Write Lock (Default State).\n"); - break; - case 2: - msg_cdbg("Locked Open (Full Access, Lock Down).\n"); - break; - case 3: - msg_cerr("Error: Write Lock, Locked Down.\n"); - break; - case 4: - msg_cdbg("Read Lock.\n"); - break; - case 5: - msg_cdbg("Read/Write Lock.\n"); - break; - case 6: - msg_cerr("Error: Read Lock, Locked Down.\n"); - break; - case 7: - msg_cerr("Error: Read/Write Lock, Locked Down.\n"); - break; - } - - /* Read or write lock present? */ - return (locking & ((1 << 2) | (1 << 0))) ? -1 : 0; -} - -static int unlock_w39_fwh_block(struct flashctx *flash, unsigned int offset) -{ - chipaddr wrprotect = flash->virtual_registers + offset + 2; - uint8_t locking; - - locking = chip_readb(flash, wrprotect); - /* Read or write lock present? */ - if (locking & ((1 << 2) | (1 << 0))) { - /* Lockdown active? */ - if (locking & (1 << 1)) { - msg_cerr("Can't unlock block at 0x%08x!\n", offset); - return -1; - } else { - msg_cdbg("Unlocking block at 0x%08x\n", offset); - chip_writeb(flash, 0, wrprotect); - } - } - - return 0; -} +#include "chipdrivers.h" static uint8_t w39_idmode_readb(struct flashctx *flash, unsigned int offset) { @@ -145,30 +87,6 @@ return printlock_w39_tblwp(lock); } -static int printlock_w39_fwh(struct flashctx *flash) -{ - unsigned int i, total_size = flash->chip->total_size * 1024; - int ret = 0; - - /* Print lock status of the complete chip */ - for (i = 0; i < total_size; i += flash->chip->page_size) - ret |= printlock_w39_fwh_block(flash, i); - - return ret; -} - -static int unlock_w39_fwh(struct flashctx *flash) -{ - unsigned int i, total_size = flash->chip->total_size * 1024; - - /* Unlock the complete chip */ - for (i = 0; i < total_size; i += flash->chip->page_size) - if (unlock_w39_fwh_block(flash, i)) - return -1; - - return 0; -} - int printlock_w39f010(struct flashctx *flash) { uint8_t lock; @@ -267,7 +185,7 @@ int ret = 0; ret = printlock_w39v040a(flash); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -277,7 +195,7 @@ int ret = 0; ret = printlock_w39v040b(flash); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -288,7 +206,7 @@ /* W39V040C and W39V040FC use different WP/TBL offsets. */ ret = printlock_w39_common(flash, 0x7fff2); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -303,7 +221,7 @@ int ret = 0; ret = printlock_w39v080a(flash); - ret |= printlock_w39_fwh(flash); + ret |= printlock_regspace2_uniform_64k(flash); return ret; } @@ -316,26 +234,6 @@ return -1; } -int unlock_w39v040fb(struct flashctx *flash) -{ - if (unlock_w39_fwh(flash)) - return -1; - if (printlock_w39_common(flash, 0x7fff2)) - return -1; - - return 0; -} - -int unlock_w39v080fa(struct flashctx *flash) -{ - if (unlock_w39_fwh(flash)) - return -1; - if (printlock_w39_common(flash, 0xffff2)) - return -1; - - return 0; -} - int printlock_at49f(struct flashctx *flash) { uint8_t lock = w39_idmode_readb(flash, 0x00002);

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Re: [flashrom] Log from Intel Atom C2550
by Stefan Tauner 03 Aug '14

03 Aug '14

On Sat, 2 Aug 2014 21:06:16 -0400 TR Reardon <thomas_reardon(a)hotmail.com> wrote: > Updated with patchset from 2-Aug-2014 Thanks... stupid error: != instead of == :) Attached is a new version of the second patch (also pushed to github). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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ichspi: fix missing set_addr and crossing of 256 boundary
by Vladimir 'φ-coder/phcoder' Serbinenko 03 Aug '14

03 Aug '14

Accoring to PCH documentation crossing 256-byte boundary is invalid and causes wraparound. Please apply attached patch

2 1

Re: [flashrom] Log from Intel Atom C2550
by TR Reardon 03 Aug '14

03 Aug '14

Updated with patchset from 2-Aug-2014 +Reardon On Sat, Aug 2, 2014 at 8:46 PM, Stefan Tauner <stefan.tauner(a)alumni.tuwien.ac.at> wrote: > On Sat, 2 Aug 2014 20:21:44 -0400 > TR Reardon <thomas_reardon(a)hotmail.com> wrote: > >> For what it's worth, the unrecognized flash chip on this ASUS >> motherboard is Macronix MX25L25735EMI > > Thanks! I could not figure it out immediately... I think it might be > more obvious if I could see the output of the current patch set. > Clearly the chipset enable function does not register an SPI master in > your version of the patch... but it may work correctly in the current > version (at least up to that point). Sorry for the inconvenience :) > > -- > Kind regards/Mit freundlichen Grüßen, Stefan Tauner >

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flashrom August 2014