Re: [flashrom] [PATCH] Add support for S25FL128P and S25FL128P......0 chips.

[Stefan Tauner]

Thanks for the test, there are two issues here. One is that I swapped
the erase block sizes of the P models. This is clearly shown in your
logs.
The ...0 model should have 64 kB erase blocks, but does not:
> Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5

0x03ffff is 262143 in decimal... I have fixed that locally, but this is
not the main problem here.

The chip erase and the subsequent write should have worked, and your
second try with the definition of the ...1 model too (because it
contains the right block size). But both failed and I don't understand
why yet. The first failed byte is equal in both cases but not all of
them are (a different number of bytes fail in the two cases). This
indicates that the behavior might be indeterministic. The contents of
the "rog.bin" file were equal for both tries, right?
What happens if you retry the second test again?
/usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c S25FL128P......1 -w rog.bin
If you can not reproduce exactly the same output, i.e.
Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb, failed byte count from 0x00000000-0x00ffffff: 0xaf66ea
Then we are on the right track. In that case I would ask you how the
chip is connected exactly, especially how WP# and HOLD# are driven.

PS: You dont need to install flashrom after recompiling. You can
execute the built binary in the source directory (make; ./flashrom ...).

[PATCH] Add support for S25FL128P and S25FL128P......0 chips.

[Liviu Toma]

Hi Stefan,

Thanks, I will test again tonight when I get home. The content of the
rog.bin was the same for both attempts.

Liviu

On Fri, Jun 13, 2014 at 4:41 AM, Stefan Tauner <
[e-mail]> wrote:
> Thanks for the test, there are two issues here. One is that I swapped
> the erase block sizes of the P models. This is clearly shown in your
> logs.
> The ...0 model should have 64 kB erase blocks, but does not:
> > Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000!
>
> Expected=0xff, Found=0xe5
> 0x03ffff is 262143 in decimal... I have fixed that locally, but this is
> not the main problem here.
>
> The chip erase and the subsequent write should have worked, and your
> second try with the definition of the ...1 model too (because it
> contains the right block size). But both failed and I don't understand
> why yet. The first failed byte is equal in both cases but not all of
> them are (a different number of bytes fail in the two cases). This
> indicates that the behavior might be indeterministic. The contents of
> the "rog.bin" file were equal for both tries, right?
> What happens if you retry the second test again?
> /usr/src/flashrompatch/flashrom -p usbblaster_spi -o write2.log -c
> S25FL128P......1 -w rog.bin
> If you can not reproduce exactly the same output, i.e.
> Verifying flash... FAILED at 0x0000005b! Expected=0xd3, Found=0xfb, failed
> byte count from 0x00000000-0x00ffffff: 0xaf66ea
> Then we are on the right track. In that case I would ask you how the
> chip is connected exactly, especially how WP# and HOLD# are driven.
>
> PS: You dont need to install flashrom after recompiling. You can
> execute the built binary in the source directory (make; ./flashrom ...).

[PATCH] Add support for S25FL128P and S25FL128P......0 chips.

[Antonio Ospite]

On Fri, 13 Jun 2014 10:41:39 +0200
Stefan Tauner  wrote:
> Thanks for the test, there are two issues here. One is that I swapped
> the erase block sizes of the P models. This is clearly shown in your
> logs.
> The ...0 model should have 64 kB erase blocks, but does not:
> > Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5
>
> 0x03ffff is 262143 in decimal... I have fixed that locally, but this is
> not the main problem here.

Hi Stefan, can please you send the fixed up patch for that?
I can test it with a S25FL129P1.

Thanks,
   Antonio

[PATCH] Add support for S25FL128P and S25FL128P......0 chips.

[Antonio Ospite]

On Sun, 29 Jun 2014 13:29:00 +0200
Antonio Ospite  wrote:
> On Fri, 13 Jun 2014 10:41:39 +0200
> Stefan Tauner  wrote:
> > Thanks for the test, there are two issues here. One is that I swapped
> > the erase block sizes of the P models. This is clearly shown in your
> > logs.
> > The ...0 model should have 64 kB erase blocks, but does not:
> > > Trying erase function 0... 0x000000-0x03ffff:EFAILED at 0x00010000! Expected=0xff, Found=0xe5
> >
> > 0x03ffff is 262143 in decimal... I have fixed that locally, but this is
> > not the main problem here.
>
> Hi Stefan, can please you send the fixed up patch for that?
> I can test it with a S25FL129P1.

OK, I fixed up the sizes myself, here are the write tests attached.

Before each run I create data.bin with:
dd if=/dev/urandom count=$((16 * 1024 * 1024)) iflag=count_bytes of=data.bin

Note that I have a S25FL129P......0, not S25FL128P......0, for me
spi_block_erase_20 does not work at 64kB, but spi_block_erase_d8 does.

This is because on S25FL129P......0 spi_block_erase_20 is used for the 4kB
access.

If you send an updated version of the patch I can do more tests.

Thanks,
   Antonio

[PATCH] Add support for S25FL128P, S25FL129P and refine it for S25FL128S chips.

[Stefan Tauner]

Additionally to the existing S25FL128S......0 definition this patch
adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as
S25FL129P......0 and S25FL129P......1 definitions.
S25FL12xP seem to be the predecessor families of S25FL128S. All
associated chips can not be distinguished with RDID alone.

Besides the new chips, this patch also fixes the name of the  previously
supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version (0) as well.

Due to the shared IDs the user has to select the right chip manually
with the -c parameter. To make this even possible, this patch enlarges
the respective array for results to 6.

Signed-off-by: Stefan Tauner 
---
 cli_classic.c |   2 +-
 flashchips.c  | 182 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 flashchips.h  |   2 +-
 3 files changed, 181 insertions(+), 5 deletions(-)

diff --git a/cli_classic.c b/cli_classic.c
index ee988a3..60b8b88 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -94,7 +94,7 @@ int main(int argc, char *argv[])
    unsigned long size;
    /* Probe for up to three flash chips. */
    const struct flashchip *chip = NULL;
-	struct flashctx flashes[3] = {{0}};
+	struct flashctx flashes[6] = {{0}};
    struct flashctx *fill_flash;
    const char *name;
    int namelen, opt, i, j;
diff --git a/flashchips.c b/flashchips.c
index a1166e0..e587b28 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10389,7 +10389,69 @@ const struct flashchip flashchips[] = {

{
    	.vendor		= "Spansion",
-		.name		= "S25FL128S......0", /* uniform 256kB sectors */
+		.name		= "S25FL128P......0", /* uniform 64 kB sectors */
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SPANSION_ID,
+		.model_id	= SPANSION_S25FL128,
+		.total_size	= 16384,
+		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+				.eraseblocks = { {64 * 1024, 256} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {64 * 1024, 256} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp3_srwd,
+		.unlock		= spi_disable_blockprotect_bp3_srwd,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read, /* Fast read (0x0B) supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Spansion",
+		.name		= "S25FL128P......1", /* uniform 256kB sectors */
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SPANSION_ID,
+		.model_id	= SPANSION_S25FL128,
+		.total_size	= 16384,
+		.page_size	= 256,
+		.feature_bits	= FEATURE_WRSR_WREN,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+				.eraseblocks = { {256 * 1024, 64} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp2_srwd,
+		.unlock		= spi_disable_blockprotect_bp2_srwd,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read, /* Fast read (0x0B) supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Spansion",
+		.name		= "S25FL128S......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
    	.bustype	= BUS_SPI,
    	.manufacture_id	= SPANSION_ID,
    	.model_id	= SPANSION_S25FL128,
@@ -10403,9 +10465,46 @@ const struct flashchip flashchips[] = {
    	.probe_timing	= TIMING_ZERO,
    	.block_erasers	= {
    		{
-				.eraseblocks = { {4 * 1024, 4096} },
-				.block_erase = spi_block_erase_20,
+			/* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+				.eraseblocks = {
+					{4 * 1024, 32},
+					{64 * 1024, 254}, // NOP
+				},
+				.block_erase = NULL,
+			}, { */
+				.eraseblocks = { { 64 * 1024, 256} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
    		}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: SR2 and many others */
+		.unlock		= spi_disable_blockprotect_bp2_srwd, /* TODO: various other locks */
+		.write		= spi_chip_write_256, /* Multi I/O supported */
+		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Spansion",
+		.name		= "S25FL128S......1", /* uniform 256 kB sectors */
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SPANSION_ID,
+		.model_id	= SPANSION_S25FL128,
+		.total_size	= 16384,
+		.page_size	= 512,
+		/* supports 4B addressing */
+		/* OTP: 1024B total, 32B reserved; read 0x4B; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
    			.eraseblocks = { {256 * 1024, 64} },
    			.block_erase = spi_block_erase_d8,
    		}, {
@@ -10422,6 +10521,83 @@ const struct flashchip flashchips[] = {
    	.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
    	.voltage	= {2700, 3600},
    },
+	{
+		.vendor		= "Spansion",
+		.name		= "S25FL129P......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SPANSION_ID,
+		.model_id	= SPANSION_S25FL128,
+		.total_size	= 16384,
+		.page_size	= 256,
+		/* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+			/* FIXME: erase opcodes 20h for (top or bottom) 4 kB parameter sectors only
+				.eraseblocks = {
+					{4 * 1024, 32},
+					{64 * 1024, 254}, // NOP
+				},
+				.block_erase = NULL,
+			}, { */
+			/* FIXME: erase opcodes 40h for (top or bottom) 2*4 kB parameter sectors only
+				.eraseblocks = {
+					{8 * 1024, 16},
+					{64 * 1024, 254}, // NOP
+				},
+				.block_erase = NULL,
+			}, { */
+				.eraseblocks = { { 64 * 1024, 256} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+		.unlock		= spi_disable_blockprotect_bp2_srwd,
+		.write		= spi_chip_write_256, /* Multi I/O supported */
+		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},
+
+	{
+		.vendor		= "Spansion",
+		.name		= "S25FL128P......1", /* uniform 256 kB sectors */
+		.bustype	= BUS_SPI,
+		.manufacture_id	= SPANSION_ID,
+		.model_id	= SPANSION_S25FL128,
+		.total_size	= 16384,
+		.page_size	= 512,
+		/* OTP: 506B total, 16B reserved; read 0x4B; write 0x42 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	= {
+			{
+				.eraseblocks = { {256 * 1024, 64} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { { 16384 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		.printlock	= spi_prettyprint_status_register_bp2_ep_srwd, /* TODO: Configuration register */
+		.unlock		= spi_disable_blockprotect_bp2_srwd,
+		.write		= spi_chip_write_256, /* Multi I/O supported */
+		.read		= spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {2700, 3600},
+	},

{
    	.vendor		= "SST",
diff --git a/flashchips.h b/flashchips.h
index 029bae8..b2c1d4d 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -590,7 +590,7 @@
 #define SPANSION_S25FL016A	0x0214
 #define SPANSION_S25FL032A	0x0215	/* Same as S25FL032P, but the latter supports EDI and CFI */
 #define SPANSION_S25FL064A	0x0216	/* Same as S25FL064P, but the latter supports EDI and CFI */
-#define SPANSION_S25FL128	0x2018
+#define SPANSION_S25FL128	0x2018	/* Same ID for various S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */
 #define SPANSION_S25FL256	0x0219
 #define SPANSION_S25FL512	0x0220
 #define SPANSION_S25FL204	0x4013