August 2013 - flashrom - mail.coreboot.org

[PATCH 1/4] sbxxx: Add detection for the remaining AMD chipset families.
by Stefan Tauner Aug. 9, 2013

Aug. 9, 2013

Also, correct prettyprinting of the registers of the various families, and abort if SpiAccessMacRomEn or SpiHostAccessRomEn prohibit full access. Tested reading/writing on ASRock IMB-A180, and chipset detection on one of each affected generation by Chris Goodrich from Sage. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- sb600spi.c | 125 +++++++++++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 97 insertions(+), 28 deletions(-) diff --git a/sb600spi.c b/sb600spi.c index cb7c4ac..754148b 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -57,7 +57,28 @@ static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; static void determine_generation(struct pci_dev *dev) { amd_gen = CHIPSET_AMD_UNKNOWN; - if (dev->device_id == 0x780e) { + msg_pdbg2("Trying to determine the generation of the SPI interface... "); + if (dev->device_id == 0x438d) { + amd_gen = CHIPSET_SB6XX; + msg_pdbg("SB6xx detected.\n"); + } else if (dev->device_id == 0x439d) { + struct pci_dev *smbus_dev = pci_dev_find(0x1002, 0x4385); + if (smbus_dev == NULL) + return; + uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); + if (rev >= 0x39 && rev <= 0x3D) { + amd_gen = CHIPSET_SB7XX; + msg_pdbg("SB7xx/SP5100 detected.\n"); + } else if (rev >= 0x40 && rev <= 0x42) { + amd_gen = CHIPSET_SB89XX; + msg_pdbg("SB8xx/SB9xx/Hudson-1 detected.\n"); + } else { + msg_pwarn("SB device found but SMBus revision 0x%02x does not match known values.\n" + "Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom(a)flashrom.org\n", + rev); + amd_gen = CHIPSET_SB89XX; + } + } else if (dev->device_id == 0x780e) { /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) * although they use different SPI interfaces. */ #ifdef USE_YANGTZE_HEURISTICS @@ -94,7 +115,11 @@ static void determine_generation(struct pci_dev *dev) "the output of lspci -nnvx, thanks!.\n", rev); } #endif - } + } else + msg_pwarn("%s: Unknown LPC device %" PRIx16 ":%" PRIx16 ".\n" + "Please report this to flashrom(a)flashrom.org and include this log and\n" + "the output of lspci -nnvx, thanks!\n", + __func__, dev->vendor_id, dev->device_id); } static void reset_internal_fifo_pointer(void) @@ -334,6 +359,12 @@ int sb600_probe_spi(struct pci_dev *dev) sb600_spibar += tmp & 0xfff; determine_generation(dev); + if (amd_gen == CHIPSET_AMD_UNKNOWN) { + /* FIXME: Eventually this should be a fatal error, but until we are certain to have covered all + * IDs actually found in the wild, try to mimmick the previous behavior. */ + msg_pwarn("Could not determine chipset generation. Assuming SB6xx."); + amd_gen = CHIPSET_SB6XX; + } if (amd_gen == CHIPSET_YANGTZE) { msg_perr("SPI on Kabini/Temash and newer chipsets are not yet supported.\n" @@ -341,32 +372,70 @@ int sb600_probe_spi(struct pci_dev *dev) return ERROR_NONFATAL; } - tmp = pci_read_long(dev, 0xa0); - msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, " - "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, - (tmp & 0x4) >> 2); - tmp = (pci_read_byte(dev, 0xba) & 0x4) >> 2; - msg_pdbg("PrefetchEnSPIFromIMC=%i, ", tmp); - - tmp = pci_read_byte(dev, 0xbb); - /* FIXME: Set bit 3,6,7 if not already set. - * Set bit 5, otherwise SPI accesses are pointless in LPC mode. - * See doc 42413 AMD SB700/710/750 RPR. - */ - msg_pdbg("PrefetchEnSPIFromHost=%i, SpiOpEnInLpcMode=%i\n", - tmp & 0x1, (tmp & 0x20) >> 5); - tmp = mmio_readl(sb600_spibar); - /* FIXME: If SpiAccessMacRomEn or SpiHostAccessRomEn are zero on - * SB700 or later, reads and writes will be corrupted. Abort in this - * case. Make sure to avoid this check on SB600. - */ - msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " - "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " - "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", - tmp, (tmp >> 18) & 0x1, - (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, - (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, - (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); +/* Chipset support matrix for SPI Base_Addr (LPC PCI reg 0xa0) + * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson234 yangtze + * 3 rsvd <- <- ? <- ? RouteTpm2Spi + * 2 rsvd AbortEnable rsvd ? <- ? <- + * 1 rsvd SpiRomEnable <- ? <- ? <- + * 0 rsvd AltSpiCSEnable rsvd ? <- ? <- + */ + if (amd_gen >= CHIPSET_SB7XX) { + tmp = pci_read_long(dev, 0xa0); + msg_pdbg("SpiRomEnable=%i", (tmp >> 1) & 0x1); + if (amd_gen == CHIPSET_SB7XX) + msg_pdbg(", AltSpiCSEnable=%i, AbortEnable=%i", tmp & 0x1, (tmp >> 2) & 0x1); + + tmp = pci_read_byte(dev, 0xba); + msg_pdbg(", PrefetchEnSPIFromIMC=%i", (tmp & 0x4) >> 2); + + tmp = pci_read_byte(dev, 0xbb); + /* FIXME: Set bit 3,6,7 if not already set. + * Set bit 5, otherwise SPI accesses are pointless in LPC mode. + * See doc 42413 AMD SB700/710/750 RPR. + */ + if (amd_gen == CHIPSET_SB7XX) + msg_pdbg(", SpiOpEnInLpcMode=%i", (tmp >> 5) & 0x1); + msg_pdbg(", PrefetchEnSPIFromHost=%i\n", tmp & 0x1); + } + +/* Chipset support matrix for SPI_Cntrl0 (spibar + 0x0) + * bit 6xx 7xx/SP5100 8xx 9xx hudson1 hudson234 yangtze + * 17 rsvd <- <- ? <- ? <- + * 18 rsvd <- fastReadEnable<1> ? <- ? SpiReadMode[0]<1> + * 19 SpiArbEnable <- <- ? <- ? <- + * 20 (FifoPtrClr) <- <- ? <- ? <- + * 21 (FifoPtrInc) <- <- ? <- ? IllegalAccess + * 22 SpiAccessMacRomEn <- <- ? <- ? <- + * 23 SpiHostAccessRomEn <- <- ? <- ? <- + * 24:26 ArbWaitCount <- <- ? <- ? <- + * 27 SpiBridgeDisable <- <- ? <- ? rsvd + * 28 rsvd DropOneClkOnRd = SPIClkGate ? <- ? <- + * 29:30 rsvd <- <- ? <- ? SpiReadMode[2:1]<1> + * 31 rsvd <- SpiBusy ? <- ? <- + * + * <1> see handle_speed + */ + tmp = mmio_readl(sb600_spibar + 0x00); + msg_pdbg("(0x%08" PRIx32 ") SpiArbEnable=%i", tmp, (tmp >> 19) & 0x1); + + msg_pdbg(", SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i", + (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7); + + switch (amd_gen) { + case CHIPSET_SB7XX: + msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1); + case CHIPSET_SB89XX: + case CHIPSET_HUDSON234: + msg_pdbg(", SpiBusy=%i", (tmp >> 31) & 0x1); + default: break; + } + msg_pdbg("\n"); + + if (((tmp >> 22) & 0x1) == 0 || ((tmp >> 23) & 0x1) == 0) { + msg_perr("ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.\n"); + return ERROR_NONFATAL; + } + tmp = (mmio_readb(sb600_spibar + 0xd) >> 4) & 0x3; msg_pdbg("NormSpeed is %s MHz\n", speed_names[tmp]); -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH] Detect AMD Yangtze (found in Kabini and Tamesh).
by Stefan Tauner Aug. 9, 2013

Aug. 9, 2013

On Sun, 4 Aug 2013 16:03:27 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and > Yangtze (Kabini/Temash) but the SPI interface does. Bail out in case we > detect Yangtze and add infrastructure to distinguish other families too for > further refactorings. > > Also, add ASRock IMB-A180 to the laptop whitelist. > > Tested on ASRock IMB-A180 with and w/o USE_YANGTZE_HEURISTICS. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Thanks a lot to Sage for testing! Self-acked and committed in r1706. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Broken OPMENUs (was: #flashrom talk (atomix vs. stefanct))
by Stefan Tauner Aug. 8, 2013

Aug. 8, 2013

We could get this to work eventually today: http://paste.flashrom.org/view.php?id=1747 But coincidentally this was the second occurrence of a very broken OPMENU in a just a few days and I like to evaluate our options here. There are two problems with board above. The first one is the configuration of the OPMENU register which specifies the RDID probe command to be opcode + address bytes although RDID does not require an address (and flashrom naturally does not send dummy bytes by default): OP Type Pre-OP op[0]: 0x9f, read w/ addr, none I could fix this with an ugly hack that is not mergeable as is and is not easy to refine to something beautiful either I think: I have enlarged the write buffer of the RDID command to 4 Bytes and use its content as dummy bytes for the address the chipset wanted. Together with my check_trans patch we may be able to design something generic that is somewhat sane and mergeable. Alternatively we could handle some of the problems inside ichspi.c by rewriting the read and write arrays: if we want to write 1, 2 or 3 bytes we just need to create a new buffer and copy the contents over. We "just" need to make sure the flash chip happily ignores the (well chosen) dummy bytes and the read back values get repeated in the right rhythm... the more I think about it the less probable a mergeable solution seems possible, it rather worked for RDID just by accident and not many other opcodes would work. :/ The second problem with the board is related to the above. AAI on ichspi does not work as can be seen here: http://paste.flashrom.org/view.php?id=1746 After fixing the probing we ran into the problem that AAI transactions are not compatible with the current state of flashrom. I need to look into this (and AAI) in more detail, but my guess is that a similar approach as outlined above could solve this too... -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1706 - trunk
by repository service Aug. 8, 2013

Aug. 8, 2013

Author: stefanct Date: Thu Aug 8 14:00:19 2013 New Revision: 1706 URL: http://flashrom.org/trac/flashrom/changeset/1706 Log: Detect AMD Yangtze (found in Kabini and Tamesh). The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) but the SPI interface does. Bail out in case we detect Yangtze and add infrastructure to distinguish other families too for further refactorings. Also, add ASRock IMB-A180 to the laptop whitelist and refine the IMC warning a bit. Tested on ASRock IMB-A180 with and w/o USE_YANGTZE_HEURISTICS, and by Chris Goodrich from Sage on - SB600 - SB700 - SB800 - Hudson 3 (A70M) - Kabini Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/sb600spi.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Tue Jul 30 11:34:44 2013 (r1705) +++ trunk/board_enable.c Thu Aug 8 14:00:19 2013 (r1706) @@ -2234,6 +2234,7 @@ /* * Suited for all boards with ambiguous DMI chassis information, which should be * whitelisted because they are known to work: + * - ASRock IMB-A180(-H) * - MSC Q7 Tunnel Creek Module (Q7-TCTC) */ static int p2_not_a_laptop(void) @@ -2321,6 +2322,7 @@ {0x8086, 0x27b9, 0xa0a0, 0x0632, 0x8086, 0x27da, 0xa0a0, 0x0632, NULL, NULL, NULL, P3, "AOpen", "i945GMx-VFX", 0, OK, intel_ich_gpio38_raise}, {0x8086, 0x277c, 0xa0a0, 0x060b, 0x8086, 0x27da, 0xa0a0, 0x060b, NULL, NULL, NULL, P3, "AOpen", "i975Xa-YDG", 0, OK, board_aopen_i975xa_ydg}, {0x8086, 0x27b8, 0x1849, 0x27b8, 0x8086, 0x27da, 0x1849, 0x27da, "^ConRoeXFire-eSATA2", NULL, NULL, P3, "ASRock", "ConRoeXFire-eSATA2", 0, OK, intel_ich_gpio16_raise}, + {0x1022, 0x1536, 0x1849, 0x1536, 0x1022, 0x780e, 0x1849, 0x780e, "^Kabini CRB$", NULL, NULL, P2, "ASRock", "IMB-A180(-H)", 0, OK, p2_not_a_laptop}, {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41 $", NULL, NULL, P3, "ASRock", "K7S41", 0, OK, w836xx_memw_enable_2e}, {0x1039, 0x0741, 0x1849, 0x0741, 0x1039, 0x5513, 0x1849, 0x5513, "^K7S41GX$", NULL, NULL, P3, "ASRock", "K7S41GX", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, P3, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise}, Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Tue Jul 30 11:34:44 2013 (r1705) +++ trunk/chipset_enable.c Thu Aug 8 14:00:19 2013 (r1706) @@ -1304,7 +1304,7 @@ {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, - {0x1022, 0x780e, OK, "AMD", "Hudson", enable_flash_sb600}, + {0x1022, 0x780e, OK, "AMD", "FCH", enable_flash_sb600}, {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, {0x1039, 0x0530, OK, "SiS", "530", enable_flash_sis530}, Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Tue Jul 30 11:34:44 2013 (r1705) +++ trunk/sb600spi.c Thu Aug 8 14:00:19 2013 (r1706) @@ -44,6 +44,58 @@ */ static uint8_t *sb600_spibar = NULL; +enum amd_chipset { + CHIPSET_AMD_UNKNOWN, + CHIPSET_SB6XX, + CHIPSET_SB7XX, /* SP5100 too */ + CHIPSET_SB89XX, /* Hudson-1 too */ + CHIPSET_HUDSON234, + CHIPSET_YANGTZE, +}; +static enum amd_chipset amd_gen = CHIPSET_AMD_UNKNOWN; + +static void determine_generation(struct pci_dev *dev) +{ + amd_gen = CHIPSET_AMD_UNKNOWN; + if (dev->device_id == 0x780e) { + /* The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) + * although they use different SPI interfaces. */ +#ifdef USE_YANGTZE_HEURISTICS + /* This heuristic accesses the SPI interface MMIO BAR at locations beyond those supported by + * Hudson in the hope of getting 0xff readback on older chipsets and non-0xff readback on + * Yangtze (and newer, compatible chipsets). */ + int i; + msg_pdbg("Checking for AMD Yangtze (Kabini/Temash) or later... "); + for (i = 0x20; i <= 0x4f; i++) { + if (mmio_readb(sb600_spibar + i) != 0xff) { + amd_gen = CHIPSET_YANGTZE; + msg_pdbg("found.\n"); + return; + } + } + msg_pdbg("not found. Assuming Hudson.\n"); + amd_gen = CHIPSET_HUDSON234; +#else + struct pci_dev *smbus_dev = pci_dev_find(0x1022, 0x780B); + if (smbus_dev == NULL) { + msg_pdbg("No SMBus device with ID 1022:780B found.\n"); + return; + } + uint8_t rev = pci_read_byte(smbus_dev, PCI_REVISION_ID); + if (rev >= 0x11 && rev <= 0x15) { + amd_gen = CHIPSET_HUDSON234; + msg_pdbg("Hudson-2/3/4 detected.\n"); + } else if (rev >= 0x39 && rev <= 0x3A) { + amd_gen = CHIPSET_YANGTZE; + msg_pdbg("Yangtze detected.\n"); + } else { + msg_pwarn("FCH device found but SMBus revision 0x%02x does not match known values.\n" + "Please report this to flashrom(a)flashrom.org and include this log and\n" + "the output of lspci -nnvx, thanks!.\n", rev); + } +#endif + } +} static void reset_internal_fifo_pointer(void) { @@ -212,9 +264,9 @@ if (!amd_imc_force) programmer_may_write = 0; - msg_pinfo("Writes have been disabled for safety reasons because the IMC is active\n" - "and it could interfere with accessing flash memory. Flashrom will try\n" - "to disable it temporarily but even then this might not be safe:\n" + msg_pinfo("Writes have been disabled for safety reasons because the presence of the IMC\n" + "was detected and it could interfere with accessing flash memory. Flashrom will\n" + "try to disable it temporarily but even then this might not be safe:\n" "when it is reenabled and after a reboot it expects to find working code\n" "in the flash and it is unpredictable what happens if there is none.\n" "\n" @@ -281,6 +333,14 @@ */ sb600_spibar += tmp & 0xfff; + determine_generation(dev); + + if (amd_gen == CHIPSET_YANGTZE) { + msg_perr("SPI on Kabini/Temash and newer chipsets are not yet supported.\n" + "Please try a newer version of flashrom.\n"); + return ERROR_NONFATAL; + } + tmp = pci_read_long(dev, 0xa0); msg_pdbg("AltSpiCSEnable=%i, SpiRomEnable=%i, " "AbortEnable=%i\n", tmp & 0x1, (tmp & 0x2) >> 1, @@ -312,9 +372,8 @@ /* Look for the SMBus device. */ smbus_dev = pci_dev_find(0x1002, 0x4385); - if (!smbus_dev) { - smbus_dev = pci_dev_find(0x1022, 0x780b); /* AMD Hudson */ + smbus_dev = pci_dev_find(0x1022, 0x780b); /* AMD FCH */ if (!smbus_dev) { msg_perr("ERROR: SMBus device not found. Not enabling SPI.\n"); return ERROR_NONFATAL;

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Re: [flashrom] Invalid OPCODE 0x9f
by Carl-Daniel Hailfinger Aug. 8, 2013

Aug. 8, 2013

Hello Vasiliy, can you try something? In ichspi.c line 1083, change result = run_opcode(flash, *opcode, addr, count, data); to result = run_opcode(flash, *opcode, addr | 0x800000, count, data); It might help, it might fail completely, but it's at least something you can try. Good luck! Regards, Carl-Daniel Am 07.08.2013 19:51 schrieb Vasiliy Vylegzhanin: > Oh, I see now, FLOCKDN is set. The only write command that effects > protected regions is chip erase. Damn. > I wonder, how vendor tool flash this. > > > On Wed, Aug 7, 2013 at 6:48 PM, Stefan Tauner < > stefan.tauner(a)student.tuwien.ac.at> wrote: > >> On Wed, 7 Aug 2013 14:42:40 +0400 >> Vasiliy Vylegzhanin <6vasia(a)gmail.com> wrote: >> >>> And I failed. There are some (modified?) phoenix flash tools, but they >>> refuse to flash the same BIOS version. >>> I've added W25x64 REMS ID and tried to flash it. Somehow flashrom managed >>> to erase whole chip and yes, it failed to write @0x00580000. >>> Is there any way to write write-protected regions on W25X64? I really >>> don't want to desolder it, and I can't reboot cause BB is erased. >>> Write log attached. >> Hello Vasiliy, >> >> there are no write-protected regions that are specific to the flash >> chip, it all depends on the Intel chipset configuration only (i.e. the >> same would have happened with another flash chip). >> >> TBH I dont totally grasp your log. Your overall analysis seems to be >> correct though: the erase opcode might have got through. I wonder what >> your changes are exactly. Can you please post your patch? I also wonder >> how your images look like. If you can please upload them to >> http://paste.flashrom.org (they will be password protected there >> because we are not allowed to redistribute vendor images of course...) >> >> -- http://www.hailfinger.org/

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Re: [flashrom] Invalid OPCODE 0x9f
by Stefan Tauner Aug. 7, 2013

Aug. 7, 2013

On Wed, 7 Aug 2013 14:42:40 +0400 Vasiliy Vylegzhanin <6vasia(a)gmail.com> wrote: > And I failed. There are some (modified?) phoenix flash tools, but they > refuse to flash the same BIOS version. > I've added W25x64 REMS ID and tried to flash it. Somehow flashrom managed > to erase whole chip and yes, it failed to write @0x00580000. > Is there any way to write write-protected regions on W25X64? I really don't > want to desolder it, and I can't reboot cause BB is erased. > Write log attached. Hello Vasiliy, there are no write-protected regions that are specific to the flash chip, it all depends on the Intel chipset configuration only (i.e. the same would have happened with another flash chip). TBH I dont totally grasp your log. Your overall analysis seems to be correct though: the erase opcode might have got through. I wonder what your changes are exactly. Can you please post your patch? I also wonder how your images look like. If you can please upload them to http://paste.flashrom.org (they will be password protected there because we are not allowed to redistribute vendor images of course...) -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] Refine messages related to erase/write recovery.
by Stefan Tauner Aug. 7, 2013

Aug. 7, 2013

We are more verbose inside erase_and_write_flash() although it does not matter as much as here - at the end of the process. New output for the non-fatal (i.e. read-protected + successful read) case: Reading old flash chip contents... done. Erasing and writing flash chip... spi_block_erase_d8 failed during command execution at address 0x8000 Reading current flash chip contents... done. spi_chip_erase_c7 failed during command execution FAILED! Uh oh. Erase/write failed. Checking if anything has changed. Reading current flash chip contents... done. Good. Writing to the flash chip apparently didn't do anything. Please check the connections (especially those to write protection pins) between the programmer and the flash chip. If you think the error is caused by flashrom please report this on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org, thanks! Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- flashrom.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/flashrom.c b/flashrom.c index db5b1c7..694d01e 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1979,16 +1979,19 @@ int doit(struct flashctx *flash, int force, const char *filename, int read_it, if (write_it) { if (erase_and_write_flash(flash, oldcontents, newcontents)) { - msg_cerr("Uh oh. Erase/write failed. Checking if " - "anything changed.\n"); + msg_cerr("Uh oh. Erase/write failed. Checking if anything has changed.\n"); + msg_cinfo("Reading current flash chip contents... "); if (!flash->chip->read(flash, newcontents, 0, size)) { + msg_cinfo("done.\n"); if (!memcmp(oldcontents, newcontents, size)) { - msg_cinfo("Good. It seems nothing was changed.\n"); + msg_cinfo("Good. "); nonfatal_help_message(); ret = 1; goto out; } - } + msg_cinfo("Apparently at least some data has changed.\n"); + } else + msg_cerr("Can't even read anymore!\n"); emergency_help_message(); ret = 1; goto out; -- Kind regards, Stefan Tauner

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#flashrom talk (atomix vs. stefanct)
by verperlung＠gmx.net Aug. 7, 2013

Aug. 7, 2013

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Re: [flashrom] Invalid OPCODE 0x9f
by Stefan Tauner Aug. 7, 2013

Aug. 7, 2013

The restricted opcode is not so unusual. We have encountered the same with some thinkpads. Vendors don't need proper RDID because they usually know which chip is installed so they don't have to support 300+ chips like flashrom does. On Mon, 29 Apr 2013 14:47:35 +0400 Vasiliy Vylegzhanin <6vasia(a)gmail.com> wrote: > 0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write. > 0x58: 0x07ff0580 FREG1: BIOS region (0x00580000-0x007fffff) is read-write. > 0x5C: 0x057f0003 FREG2: Management Engine region (0x00003000-0x0057ffff) is read-write. > 0x60: 0x00020001 FREG3: Gigabit Ethernet region (0x00001000-0x00002fff) is read-write. > 0x64: 0x00000fff FREG4: Platform Data region is unused. > 0x74: 0x00000000 (PR0 is unused) > 0x78: 0x00000000 (PR1 is unused) > 0x7C: 0x00000000 (PR2 is unused) > 0x80: 0x87ff0770 PR3: WARNING: 0x00770000-0x007fffff is read-only. > 0x84: 0x875f0580 PR4: WARNING: 0x00580000-0x0075ffff is read-only. The protected regions are a bigger problem. This configuration protects almost the complete BIOS region and this can not be disabled at runtime. Does the vendor offer updates for the BIOS? Did you look into the BIOS configuration menu if there is a switch to allow BIOS modifications? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH 2/2] Improve getrevision.sh.
by David Hendricks Aug. 7, 2013

Aug. 7, 2013

Overall this is great! I definitely think it's easier to read, test, and maintain than the Makefile approach. But I suppose we'll find out how others feel... On Tue, Aug 6, 2013 at 6:51 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > - remove bashism > - simplify some git-related code > - there is only one sane time format. > - vastly improve git_url() to print the correct remote url and > "nearest" branch > - add "-dirty" to local revisions if there are uncommitted changes > - indicate in local revisions how many git-only commits were done > since branching from upstream svn > - fix svn_revision() fallback to svn info and remove git-svn > - print leading r in script instead of hardcode it in the makefile; > no more "0.9.7-runknown" > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > Makefile | 2 +- > util/getrevision.sh | 156 > +++++++++++++++++++++++++++++----------------------- > 2 files changed, 89 insertions(+), 69 deletions(-) > > diff --git a/Makefile b/Makefile > index da0d0da..e1a4474 100644 > --- a/Makefile > +++ b/Makefile > @@ -329,7 +329,7 @@ CLI_OBJS = cli_classic.o cli_output.o print.o > SVNVERSION := $(shell ./util/getrevision.sh -u) > > RELEASE := 0.9.6.1 > -VERSION := $(RELEASE)-r$(SVNVERSION) > +VERSION := $(RELEASE)-$(SVNVERSION) > RELEASENAME ?= $(VERSION) > > SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' > diff --git a/util/getrevision.sh b/util/getrevision.sh > index 678d66b..95a57fe 100755 > --- a/util/getrevision.sh > +++ b/util/getrevision.sh > @@ -5,6 +5,7 @@ > # Copyright (C) 2005 coresystems GmbH <stepan(a)coresystems.de> > # Copyright (C) 2009,2010 Carl-Daniel Hailfinger > # Copyright (C) 2010 Chromium OS Authors > +# Copyright (C) 2013 Stefan Tauner > # > # This program is free software; you can redistribute it and/or modify > # it under the terms of the GNU General Public License as published by > @@ -23,18 +24,17 @@ > > EXIT_SUCCESS=0 > EXIT_FAILURE=1 > +date_format="+%Y-%m-%dT%H:%M:%S%z" # There is only one valid timeformat > FFS! ISO 8601 > > svn_revision() { > LC_ALL=C svnversion -cn . 2>/dev/null | \ > - sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | \ > - grep "[0-9]" || > + sed -e "s/.*://" -e "s/$[0-9]*$.*/r\1/" | \ > + grep "r[0-9]" || > LC_ALL=C svn info . 2>/dev/null | \ > - awk '/^Revision:/ {print $$2 }' | \ > - grep "[0-9]" || > - LC_ALL=C git svn info . 2>/dev/null | \ > - awk '/^Revision:/ {print $$2 }' | \ > - grep "[0-9]" || > - echo '' > + grep "Last Changed Rev:" | \ > + sed -e "s/^Last Changed Rev: *//" -e "s/$[0-9]*$.*/r\1/" > | \ > + grep "r[0-9]" || > + echo "unknown" > } > > svn_url() { > @@ -45,74 +45,81 @@ svn_url() { > ) > } > > +svn_has_local_changes() { > + svn status | egrep '^ *[ADMR] *' > /dev/null > +} > + > svn_timestamp() { > - local date_format="+%Y-%m-%d %H:%M:%S" > local timestamp > > - # are there local changes in the client? > - if svn status | egrep '^ *[ADMR] *' > /dev/null ; then > - timestamp=$(date "${date_format} +") > + if svn_has_local_changes ; then > + timestamp=$(date "${date_format}") > else > # No local changes, get date of the last log record. > local last_commit_date=$(svn info | grep '^Last Changed > Date:' | \ > awk '{print $4" "$5" "$6}') > - timestamp=$(date --utc --date "${last_commit_date}" \ > - "${date_format} UTC") > + timestamp=$(date -d "${last_commit_date}" "${date_format}") > fi > > echo "${timestamp}" > } > > -git_revision() { > - echo $(git log --oneline | head -1 | awk '{print $1}') > -} > - > -# Retrieve svn revision using git log data (for git mirrors) > +# Retrieve svn revision using git log data (for git-svn mirrors) > gitsvn_revision() { > local r > > - git log| > - grep git-svn-id| > - sed > 's/.*git-svn-id:[[:blank:]]*$[^@]\+$@[0-9]\+[[:blank:]]\+$[^[:blank:]]\+$/\1 > \2/'| > - sort| > - uniq| > - read url uuid > - > - r=$(git log --grep="git-svn-id.*$uuid"| grep git-svn-id | \ > - sed 's/.*@//;s/[[:blank:]].*//'| \ > - sort -n | \ > - tail -1) > + # If this is a "native" git-svn clone we could use git svn log > like so > + # if [ -e .git/svn/.metadata ]; then > + # r=$(git svn log --oneline -1 | sed > 's/^r//;s/[[:blank:]].*//') > + # else > + r=$(git log --grep git-svn-id -1 | \ > + grep git-svn-id | \ > + sed 's/.*@/r/;s/[[:blank:]].*//') > + # fi > > echo "${r}" > } > > +git_has_local_changes() { > + git update-index -q --refresh > + ! git diff-index --quiet HEAD -- > +} > + > git_timestamp() { > - local date_format="+%b %d %Y %H:%M:%S" > local timestamp > > - # are there local changes in the client? > - if git status | \ > - egrep '^# Change(s to be committed|d but not updated):$' > > /dev/null > - then > - timestamp=$(date "${date_format} +") > + # are there local changes? > + if git_has_local_changes ; then > + timestamp=$(date "${date_format}") > else > - # No local changes, get date of the last log record. > - local last_commit_date=$(git log | head -3 | grep '^Date:' > | \ > - awk '{print $3" "$4" "$6" "$5" > "$7}') > - timestamp=$(date --utc --date "${last_commit_date}" \ > - "${date_format} UTC") > + # No local changes, get date of the last commit > + timestamp=$(date -d "$(git log --pretty=format:"%cD" -1)" > "${date_format}") > fi > > echo "${timestamp}" > } > > git_url() { > - # Only the first line of `git remote' is considered. > - echo $(LC_ALL=C git remote show origin 2>/dev/null | > - grep 'Fetch URL:' | > - sed 's/.*URL:[[:blank:]]*//' | > - grep ^. > - ) > + # get all remote branches containing the last commit > + branches=$(git branch -r --contains HEAD | cut -c 3-) > + if [ -z "$branches" ] ; then > + echo "No remote branch contains current HEAD">&2 > + return > + fi > + > + # find "nearest" branch > + local diff=9000 > + local target= > + for branch in $branches ; do > + curdiff=$(git rev-list --count HEAD..$branch) > + if [ $curdiff -ge $diff ] ; then > + continue > + fi > + diff=$curdiff > + target=$branch > + done > + > + echo "$(git ls-remote --exit-code --get-url ${target%/*}) > ${target#*/}" > } > I am seeing a lot of errors when trying this. The version in the previous patch worked, though it kept the http:// prefix which is kind of superfluous. Try cloning http://git.chromium.org/chromiumos/third_party/flashrom.git . $ sh getrevision.sh -U fatal: ambiguous argument 'HEAD..->': unknown revision or path not in the working tree. Use '--' to separate paths from revisions, like this: 'git <command> [<revision>...] -- [<file>...]' getrevision.sh: line 115: [: -ge: unary operator expected getrevision.sh: line 115: [: 0: unary operator expected http://git.chromium.org/chromiumos/third_party/flashrom.git master What about something like: git ls-remote --exit-code --get-url | sed 's/.*\/\///' That looks simpler and works better, at least in my testing... > > scm_url() { > @@ -142,16 +149,26 @@ timestamp() { > echo ${t} > } > > -# Retrieve local SCM revision info. This is useful if we're working in > -# a even different SCM than upstream. > + > +# Retrieve local SCM revision info. This is useful if we're working in a > different SCM than upstream and/or > +# have local changes. > # > -# If local copy is svn, then there is nothing to do here. > -# If local copy is git, then retrieve useful git revision info > local_revision() { > local r > > - if [ -d ".git" ] ; then > - r=$(git_revision) > + if [ -d ".svn" ] ; then > + r=$(svn_has_local_changes && echo "-dirty") > + elif [ -d ".git" ] ; then > + r=$(git rev-parse --short HEAD) > + > + local svn_base=$(git log --grep git-svn-id -1 > --format='%h') > + if [ "$svn_base" != "" ] ; then > + r="$r-$(git rev-list --count $svn_base..HEAD)" > + fi > + > + if git_has_local_changes ; then > + r="$r-dirty" > + fi > fi > > echo ${r} > @@ -168,6 +185,8 @@ upstream_revision() { > r=$(svn_revision) > elif [ -d ".git" ] ; then > r=$(gitsvn_revision) > + else > + r="unknown" > fi > > echo "${r}" > @@ -180,48 +199,49 @@ show_help() { > Options > -h or --help > Display this message. > + -l or --local > + local revision (if different from upstream) and an indicator for > uncommitted changes > -u or --upstream > upstream flashrom revision > - -l or --local > - local revision (if different from upstream) > - -t or --timestamp > - timestamp of most recent modification > -U or --url > url associated with local copy of flashrom > + -t or --timestamp > + timestamp of most recent modification > " > return > } > > -if [ ! -n "${1}" ] > -then > +if [ -z "${1}" ] ; then > show_help; > echo "No options specified"; > - exit ${EXIT_SUCCESS} > + exit ${EXIT_FAILURE} > fi > > # The is the main loop > -while [[ ${1} = -* ]]; > +while [ $# -gt 0 ]; > do > case ${1} in > -h|--help) > show_help; > shift;; > - -u|--upstream) > - echo "$(upstream_revision)"; > - shift;; > -l|--local) > echo "$(local_revision)"; > shift;; > - -t|--timestamp) > - echo "$(timestamp)"; > + -u|--upstream) > + echo "$(upstream_revision)"; > shift;; > -U|--url) > echo "$(scm_url)"; > shift;; > - *) > + -t|--timestamp) > + echo "$(timestamp)"; > + shift;; > + -*) > show_help; > echo "invalid option: ${1}" > - exit ${EXIT_FAILURE} > + exit ${EXIT_FAILURE};; > + *) > + shift;; # ignore arguments not starting with - > esac; > done > > -- > Kind regards, Stefan Tauner > > > _______________________________________________ > flashrom mailing list > flashrom(a)flashrom.org > http://www.flashrom.org/mailman/listinfo/flashrom > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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