Dear all,
I successfully flashed a notebooks GPU BIOS SPI Flash Pm25LV010 using flashrom.
I don't know why but I used Flashrom 0.9.4 and not the latest one and therefore
had to add the WREN feature flag that is already present in 0.9.7.
I used the bus pirate with 120kHz SPI mode.
Notebook is fine again and a friend of mine happy :) (He flashed some
non-mobile gpu bios from within windows using another tool... Don't ask)
Regards,
Matthias
On Wed, Dec 18, 2013 at 2:56 PM, David Hendricks <dhendrix(a)google.com>wrote:
> On Mon, Dec 16, 2013 at 9:09 PM, <
> BM-2cWKH3wgq8zXX9eHfba16oTc8b61ead4Yq(a)bitmessage.ch> wrote:
>
>> >> As root in
>> >> developer mode, the output of flashrom -v is "flashrom v0.9.4 :
>> 4169bc8
>> >> ...". The first time I ran flashrom --wp-disable, I got a message
>> saying
>> >> the operation FAILED with error=1. At that point I took the board apart
>> >> again and cleaned the write-protect screw hole with q-tips dipped in
>> >> rubbing alcohol. When I reassembled the Chromebook and tried again with
>> >> flashrom -V --wp-disable, the last few lines I receive are:
>> >>
>> >> w25_set_srp0: old status: 0xb8
>> >> w25_set_srp0: new status: 0xb8
>> >> w25q_disable_writeprotect(): error=1.
>> >> No -i argument is specified, set ignore_fmap.
>> >> FAILED
>> >> restore_power_management(): Power management enabled
>> >>
>> >> As you can see, I can't seem to disable write protection on this chip.
>> >> I'm
>> >> running stock ChromeOS. Any idea what I might be doing wrong? Thanks in
>> >> advance.
>> >
>> >
>> > That's weird... Since you have the system taken apart already, can you
>> try
>> > disconnecting the battery while the machine is unplugged? I'd recommend
>> > leaving it disconnected for a minute or so, the idea being to give the
>> SPI
>> > ROM enough time to fully discharge and reset.
>> >
>>
>> Thanks for responding. I took your advice and disconnected the battery for
>> several minutes. After reassembling the board and running flashrom
>> --wp-disable again I am receiving the same message (FAILED). flashrom
>> --wp-status says:
>>
>> WP: status: 0x00b8
>> WP: status.srp0: 1
>> WP: status.srp1: 0
>> WP: write protect is enabled.
>> WP: write protect range: start=0x00000000, len=0x00200000
>
>
> Hmmm, that looks correct for normal circumstances (with write-protection
> enabled). Flashrom *should* be able to clear bit 7 of SRP0, so the status
> should show up be 0x38 after running with --wp-disable.
>
> Can you try running "flashrom -p host --wp-disable -V" and pasting the
> output on paste.flashrom.org?
>
You can also try "flashrom -p host --wp-range 0 0" and then "flashrom -p
host --wp-status" to see if that changes anything. I'm curious if it's just
that SRP0 bit that seems stuck. If the /WP pin is not grounded, then
hardware write-protection should not be in effect and you should be able to
effectively disable write-protection by clearing the range of protected
blocks even if SRP0 is set to 1.
> > If you have a voltmeter handy, you can also try measuring the voltage
>> on
>
> > the /WP pin (pin 3). More details on pin configuration can be found in
>> the
>> > datasheet:
>> >
>> http://www.winbond-usa.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/…
>> >
>>
>> I don't have voltmeter; I'm sure I could locate one given enough time
>> though. Do you have any other suggestions as to steps I might be
>> overlooking here? Otherwise, what should I be looking for specifically in
>> the Winbond data sheet?
>>
>
> Unfortunately I don't have many ideas here... I've only seen this once and
> it seemed to be a defective chip since I couldn't change the write-protect
> status by removing the chip and using an external programmer. (This was on
> a different machine, and not in a retail unit)
>
> The only reason for failure should be if there is anything bridging the
> gap between the copper pads around the write-protect screw hole, thereby
> connecting /WP on the chip to ground. If you have a magnifying glass, can
> you inspect just to make sure there is nothing connecting those pads? I
> assume that since you cleaned the area with rubbing alcohol that there is
> no residue from the sticker. I'm wondering if there is a tiny bit of copper
> (perhaps from a manufacturing defect) bridging the gap. If so, I'll ask one
> of our hardware engineers if it's safe to attempt severing it or if they
> have any better ideas.
>
> --
> David Hendricks (dhendrix)
> Systems Software Engineer, Google Inc.
>
--
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
> On Mon, Dec 16, 2013 at 9:14 AM, <
> BM-2cWKH3wgq8zXX9eHfba16oTc8b61ead4Yq(a)bitmessage.ch> wrote:
>
>> Hello flashrom developers,
>>
>> I'm having trouble disabling write-protection on my Samsung Arm
>> Chromebook. So far I've removed the metallic sticker covering the
>> "write-protect screw hole" according to the pictures on the Chromium
>> wiki
>> <
>> http://www.chromium.org/chromium-os/developer-information-for-chrome-os-dev…
>> >.
>> On the Snow board, this hole ships with no screw in it.
>
>
> Are you sure about that? There should be a screw there...
>
>
I guess I should not have spoken for all Snow boards, but mine certainly
did not have a screw in the write-protect screw hole--only the metallic
sticker. I did notice this the first time I opened it up, but I wasn't
sure what to make of it.
>> As root in
>> developer mode, the output of flashrom -v is "flashrom v0.9.4 : 4169bc8
>> ...". The first time I ran flashrom --wp-disable, I got a message saying
>> the operation FAILED with error=1. At that point I took the board apart
>> again and cleaned the write-protect screw hole with q-tips dipped in
>> rubbing alcohol. When I reassembled the Chromebook and tried again with
>> flashrom -V --wp-disable, the last few lines I receive are:
>>
>> w25_set_srp0: old status: 0xb8
>> w25_set_srp0: new status: 0xb8
>> w25q_disable_writeprotect(): error=1.
>> No -i argument is specified, set ignore_fmap.
>> FAILED
>> restore_power_management(): Power management enabled
>>
>> As you can see, I can't seem to disable write protection on this chip.
>> I'm
>> running stock ChromeOS. Any idea what I might be doing wrong? Thanks in
>> advance.
>
>
> That's weird... Since you have the system taken apart already, can you try
> disconnecting the battery while the machine is unplugged? I'd recommend
> leaving it disconnected for a minute or so, the idea being to give the SPI
> ROM enough time to fully discharge and reset.
>
Thanks for responding. I took your advice and disconnected the battery for
several minutes. After reassembling the board and running flashrom
--wp-disable again I am receiving the same message (FAILED). flashrom
--wp-status says:
WP: status: 0x00b8
WP: status.srp0: 1
WP: status.srp1: 0
WP: write protect is enabled.
WP: write protect range: start=0x00000000, len=0x00200000
> If you have a voltmeter handy, you can also try measuring the voltage on
> the /WP pin (pin 3). More details on pin configuration can be found in the
> datasheet:
> http://www.winbond-usa.com/hq/enu/ProductAndSales/ProductLines/FlashMemory/…
>
I don't have voltmeter; I'm sure I could locate one given enough time
though. Do you have any other suggestions as to steps I might be
overlooking here? Otherwise, what should I be looking for specifically in
the Winbond data sheet?
Hello flashrom developers,
I'm having trouble disabling write-protection on my Samsung Arm
Chromebook. So far I've removed the metallic sticker covering the
"write-protect screw hole" according to the pictures on the Chromium wiki
<http://www.chromium.org/chromium-os/developer-information-for-chrome-os-dev…>.
On the Snow board, this hole ships with no screw in it. As root in
developer mode, the output of flashrom -v is "flashrom v0.9.4 : 4169bc8
...". The first time I ran flashrom --wp-disable, I got a message saying
the operation FAILED with error=1. At that point I took the board apart
again and cleaned the write-protect screw hole with q-tips dipped in
rubbing alcohol. When I reassembled the Chromebook and tried again with
flashrom -V --wp-disable, the last few lines I receive are:
w25_set_srp0: old status: 0xb8
w25_set_srp0: new status: 0xb8
w25q_disable_writeprotect(): error=1.
No -i argument is specified, set ignore_fmap.
FAILED
restore_power_management(): Power management enabled
As you can see, I can't seem to disable write protection on this chip. I'm
running stock ChromeOS. Any idea what I might be doing wrong? Thanks in
advance.
I successfully used a Arduino Uno as a serprog programmer to program a
SST25VF016B with
Flashrom 0.9.5.2-r1517 on Ubuntu.
I had tried hooking the eeprom up to the Arduino via level shifting
via resistors, and then via level shifting mosfets + resistors, and finally
via a level conversion chip, but none of them worked reliably. I finally
converted my Ardruino Uno to 3.3v by replacing the regulator.
http://learn.adafruit.com/arduino-tips-tricks-and-techniques/3-3v-conversion
This was a much easier solution, and it worked reliably. Once converted to
3.3v, no extra components are needed. Just wire the eeprom directly to
pins 10,11,12,13, GND, and 5V (which is now actually 3.3v). Remember,
three pins of the eeprom go to 3.3v.
I still had to slow the UART speed down to 115200 for the Arduino sketch on
the Uno, and while reading took a normal amount of time, it took several
hours to program the chip. I used -VVV to enable very very verbose output
to monitor the progress.
Could someone update the wiki with this information? It didn't look like
there was any place to sign up and edit it myself.
http://www.flashrom.org/Serprog/Arduino_flasher
Thanks for helping me save a server!
I'm not subscribed to the list, but I thought I'd report
a successful flash of this motherboard. Thanks!
Attached (assuming it isn't filtered) is the -VVV output
from the flash.
--
Mark Nipper
nipsy(a)bitgnome.net (XMPP)
+1 979 575 3193
-
"We enter into life naked and howling, covered with blood. The
fun doesn't have to end there".
-- _The Book of Madness_
Am 11.12.2013 20:21 schrieb Peter Stuge:
> Carl-Daniel Hailfinger wrote:
>> is anyone going to visit FOSDEM 2014, and if so, do we have enough
>> people for a stand? Deadline is right now.
> Feel free to apply for a booth if you'd like to take care of it
> but I will again only be there very sporadically, if at all.
I can be there on Saturday, but my availability will be spotty (read:
maybe 3 hours) on Sunday.
If someone commits to taking care of the booth on Sunday, I'll submit a
booth application.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
After run flashrom -p internal have error:
=========================================================================
flashrom v0.9.7-r1763 on Linux 2.6.32-5-486 (i686)
flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK.
coreboot table found at 0x9fe1c00.
Found chipset "Intel PIIX4/4E/4M". Enabling flash write... OK.
Enabling full flash access for board "abit BF6"...
ERROR: PIIX4 GPO26 not programmed for output.
FAILED!
Aborting to be safe.
Error: Programmer initialization failed.
How resolve this problem?