flashrom September 2012

flashrom@flashrom.org

32 participants
137 discussions

[PATCH] Add VIA VT6421A LPC programmer driver.
by Stefan Tauner 05 Sep '12

05 Sep '12

Thanks to Idwer Vollering for his iterative testing of this code. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- Now with less WTF... :) Makefile | 9 +++ atavia.c | 181 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 10 ++++ print.c | 5 ++ programmer.h | 13 ++++- 5 files changed, 217 insertions(+), 1 deletion(-) create mode 100644 atavia.c diff --git a/Makefile b/Makefile index 9309ce5..e4b364d 100644 --- a/Makefile +++ b/Makefile @@ -334,6 +334,9 @@ CONFIG_SATASII ?= yes # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no +# VIA VT6421A LPC memory support +CONFIG_ATAVIA ?= yes + # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -459,6 +462,12 @@ PROGRAMMER_OBJS += atahpt.o NEED_PCI := yes endif +ifeq ($(CONFIG_ATAVIA), yes) +FEATURE_CFLAGS += -D'CONFIG_ATAVIA=1' +PROGRAMMER_OBJS += atavia.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") # This is a totally ugly hack. diff --git a/atavia.c b/atavia.c new file mode 100644 index 0000000..6045e2d --- /dev/null +++ b/atavia.c @@ -0,0 +1,181 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2011 Jonathan Kollasch <jakllsch(a)kollasch.net> + * Copyright (C) 2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdbool.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_VIA 0x1106 + +#define VIA_MAX_RETRIES 300 +#define VT6421A_OFF 0 + +#define BROM_ADDR 0x60 + +#define BROM_DATA 0x64 + +#define BROM_ACCESS 0x68 +#define BROM_TRIGGER 0x80 +#define BROM_WRITE 0x40 +#define BROM_SIZE_MASK 0x30 +#define BROM_SIZE_64K 0x00 +#define BROM_SIZE_32K 0x10 +#define BROM_SIZE_16K 0x20 +#define BROM_SIZE_0K 0x30 +#define BROM_BYTE_ENABLE_MASK 0x0f + +#define BROM_STATUS 0x69 +#define BROM_ERROR_STATUS 0x80 + +/* Select the byte we want to access. This is done by clearing the bit corresponding to the byte we want to + * access, leaving the others set (yes, really). */ +#define ENABLE_BYTE(address) ((~(1 << ((address) & 3))) & BROM_BYTE_ENABLE_MASK) +#define BYTE_OFFSET(address) (((addr) & 3) * 8) + +const struct pcidev_status ata_via[] = { + {PCI_VENDOR_ID_VIA, 0x3249, NT, "VIA", "VT6421A"}, + + {}, +}; + +static const struct par_programmer lpc_programmer_atavia = { + .chip_readb = atavia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atavia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static void atavia_prettyprint_access(uint8_t access) +{ + uint8_t bmask = access & BROM_BYTE_ENABLE_MASK; + uint8_t size = access & BROM_SIZE_MASK; + + msg_pspew("Accessing byte(s):%s%s%s%s\n", + (bmask & (1<<3)) ? " 3" : "", + (bmask & (1<<2)) ? " 2" : "", + (bmask & (1<<1)) ? " 1" : "", + (bmask & (1<<0)) ? " 0" : ""); + if (size == BROM_SIZE_0K) { + msg_pspew("No ROM device found.\n"); + } else + msg_pspew("ROM device with %s kB attached.\n", + (size == BROM_SIZE_64K) ? "64" : + (size == BROM_SIZE_32K) ? "32" : "16"); + msg_pspew("Access is a %s.\n", (access & BROM_WRITE) ? "write" : "read"); + msg_pspew("Device is %s.\n", (access & BROM_TRIGGER) ? "busy" : "ready"); +} + +static bool atavia_ready(void) +{ + int try; + uint8_t access, status; + bool ready = false; + + for (try = 0; try < VIA_MAX_RETRIES; try++) { + access = pci_read_byte(pcidev_dev, BROM_ACCESS); + status = pci_read_byte(pcidev_dev, BROM_STATUS); + if (((access & BROM_TRIGGER) == 0) && (status & BROM_ERROR_STATUS) == 0) { + ready = true; + break; + } else { + programmer_delay(1); + continue; + } + } + + msg_pdbg2("%s: %s after %d tries (access=0x%02x, status=0x%02x)\n", + __func__, ready ? "suceeded" : "failed", try, access, status); + atavia_prettyprint_access(access); + return ready; +} + +static int atavia_shutdown(void *data) +{ + pci_cleanup(pacc); + return 0; +} + +int atavia_init(void) +{ + uint32_t tmp; + if (rget_io_perms()) + return 1; + + pcidev_init(PCI_ROM_ADDRESS, ata_via); /* Acutally no BAR setup needed at all. */ + + if (register_shutdown(atavia_shutdown, NULL)) + return 1; + + /* Test if a flash chip is attached. */ + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, (uint32_t)PCI_ROM_ADDRESS_MASK); + programmer_delay(90); + tmp = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + msg_pdbg2("BROM base=0x%08x\n", tmp); + if ((tmp & PCI_ROM_ADDRESS_MASK) == 0) { + msg_perr("Controller thinks there is no ROM attached.\n"); + //return 1; + } + + if (!atavia_ready()) { + msg_perr("Controller not ready.\n"); + //return 1; + } + + atavia_prettyprint_access(pci_read_byte(pcidev_dev, BROM_ACCESS)); + register_par_programmer(&lpc_programmer_atavia, BUS_LPC); + + return 0; +} + +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) +{ + addr += VT6421A_OFF; + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_long(pcidev_dev, BROM_DATA, val << BYTE_OFFSET(addr)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); + + if (!atavia_ready()) { + msg_perr("not ready after write\n"); + } +} + +uint8_t atavia_chip_readb(const struct flashctx *flash, chipaddr addr) +{ + uint8_t val; + + addr += VT6421A_OFF; + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr)); + + if (!atavia_ready()) { + msg_perr("not ready after read\n"); + } + + val = (pci_read_long(pcidev_dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; + + return val; +} diff --git a/flashrom.c b/flashrom.c index fdc5412..f5bf45f 100644 --- a/flashrom.c +++ b/flashrom.c @@ -152,6 +152,16 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_ATAVIA == 1 + { + .name = "atavia", + .init = atavia_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", diff --git a/print.c b/print.c index 582a49e..724f91c 100644 --- a/print.c +++ b/print.c @@ -487,6 +487,11 @@ void print_supported(void) programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif +#if CONFIG_ATAVIA == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_ATAVIA].name); + print_supported_pcidevs(ata_via); +#endif #if CONFIG_FT2232_SPI == 1 msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); diff --git a/programmer.h b/programmer.h index 51b9c40..105613c 100644 --- a/programmer.h +++ b/programmer.h @@ -54,6 +54,9 @@ enum programmer { #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif +#if CONFIG_ATAVIA == 1 + PROGRAMMER_ATAVIA, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -239,7 +242,7 @@ int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_ATAVIA+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -420,6 +423,14 @@ int atahpt_init(void); extern const struct pcidev_status ata_hpt[]; #endif +/* atavia.c */ +#if CONFIG_ATAVIA == 1 +int atavia_init(void); +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr); +extern const struct pcidev_status ata_via[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 struct usbdev_status { -- Kind regards, Stefan Tauner

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Gembird-PCI-VIA VT6421A-W39V040C
by Alexey 05 Sep '12

05 Sep '12

Hi! I'm going to flash Gembird PCI 3SATA+1IDE controller's BIOS, there is W39V040C. I found an excellent professionaly modified ROM for this device. I will try to do it on board of ASUS P4P800E-DELUX. Just let me know, is it possible in the moment or I have to wait for a new version of flashrom.exe? This device have unfriendly relations to Radeon X1600 AGP, on board of ASRock P4i45E MB, so I found only new modified ROM of PCI controller can help. Waiting for Your answer, Alexey.

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[PATCH] Hack libpci not to exit(1) during init if PCI does not work
by Carl-Daniel Hailfinger 05 Sep '12

05 Sep '12

This patch is for testing only, and not for immediate merge. libpci unhelpfully calls exit(1) instead of reporting an error if init fails. Fortunately, that part of libpci has not changed since the year 2000, so we can use a really evil hack to avoid that. We supply an alternative error printing function (which does not exit(1)) and this function detects which error is happening and hacks internal libpci structures in a way that avoids a later segfault due to NULL pointer dereference. We MUST absolutely make sure that pci_init() in libpci will not change or this hack will explode spectacularly. Once we decide that this hack is the way to go, notifying the libpci maintainer is essential. Apply this patch, then compile flashrom with make CONFIG_DUMMY=no CONFIG_INTERNAL=o CONFIG_SERPROG=no CONFIG_RAYER_SPI=no CONFIG_NIC3COM=no CONFIG_GFXNVIDIA=no CONFIG_SATASII=no CONFIG_FT2232_SPI=no CONFIG_DRKAISER=no CONFIG_NICREALTEK=no CONFIG_NICINTEL_SPI=no CONFIG_BUSPIRATE_SPI=no CONFIG_OGP_SPI=no CONFIG_SATAMV=no CONFIG_NICINTEL=yes To check if the hack works, run "flashrom -V" and respond to this mail with the output. You should get a message near the end which says that programmer initialization failed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-libpci_hack_avoid_exit1_during_init/pcidev.c =================================================================== --- flashrom-libpci_hack_avoid_exit1_during_init/pcidev.c (Revision 1362) +++ flashrom-libpci_hack_avoid_exit1_during_init/pcidev.c (Arbeitskopie) @@ -21,6 +21,8 @@ #include <stdlib.h> #include <string.h> +#include <stdio.h> +#include <stdarg.h> #include "flash.h" #include "programmer.h" @@ -188,6 +190,58 @@ return 0; } +/* Ugliest hack ever in flashrom! Should work for all libpci versions released + * in the year 2000 or later. Checked to make sense until at least version + * 3.1.8-test1. + */ +static void fake_libpci_method_init(struct pci_access *foo) +{ + msg_pinfo("Working around another pcilib crash\n"); + return; +} + +static struct { + char *name; /* name in all libpci versions */ + char *dummy1; /* Only present in some libpci versions */ + void *dummy2; + void (*init1)(struct pci_access *); /* init in older versions */ + void (*init2)(struct pci_access *); /* init in newer versions */ + void *dummy3; + void *dummy4; + void *dummy5; + void *dummy6; + void *dummy7; + void *dummy8; + void *dummy9; + void *dummy10; +} fake_libpci_methods = { + .name = "None", + .init1 = &fake_libpci_method_init, + .init2 = &fake_libpci_method_init, +}; + +static int pci_init_failed = 0; + +static void my_libpci_generic_error(char *msg, ...) +{ + va_list ap; + + msg_pinfo("pcilib: "); + va_start(ap, msg); + vprintf(msg, ap); + va_end(ap); + msg_pinfo("\n"); + if (!strcmp(msg, "Cannot find any working access method.")) { + /* Workaround for crash, very ugly. */ + msg_pinfo("Working around pcilib crash\n"); + pacc->methods = (void *)&fake_libpci_methods; + pci_init_failed = 1; + } else { + /* Any error in libpci would result in exit(1) by default. */ + exit(1); + } +} + uintptr_t pcidev_init(int bar, const struct pcidev_status *devs) { struct pci_dev *dev; @@ -198,7 +252,14 @@ uintptr_t addr = 0, curaddr = 0; pacc = pci_alloc(); /* Get the pci_access structure */ + pacc->error = &my_libpci_generic_error; pci_init(pacc); /* Initialize the PCI library */ + /* pci_init returns void, so we have to hack it. */ + if (pci_init_failed) { + /* Yes, technically we would have to free stuff... */ + return 1; + } + pci_scan_bus(pacc); /* We want to get the list of devices */ pci_filter_init(pacc, &filter); -- http://www.hailfinger.org/

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Fw: flashing 0806 bios for P5WD2 PREMIUM
by Stefan Tauner 04 Sep '12

04 Sep '12

please always use the equivalent to a "reply all" button so that the mail ends up in the mailing list in the future. thanks for the logs. Begin forwarded message: Date: Wed, 5 Sep 2012 15:30:28 +1000 From: Mark Starikov <mr.mark.starikov(a)gmail.com> To: stefan.tauner(a)student.tuwien.ac.at Subject: Re: [flashrom] flashing 0806 bios for P5WD2 PREMIUM Thank you for the prompt reply Stefan, please find output of lspci and superiotool attached. I recon I'll give the "board-enable" from the wiki a go - never had a chance to descend into the DRAM land, this might be it. Besides it might help me with my VT-d experiments too :). If you find anything in the files provided - that'd be great, but thanks for your help anyway! Cheers, Mark. On Wed, Sep 5, 2012 at 2:31 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > On Wed, 5 Sep 2012 13:44:53 +1000 > Mark Starikov <mr.mark.starikov(a)gmail.com> wrote: > > > Please let me know if there is a quick fix that can get this board > flashed > > or(as this is very old hardware now) i would understand that support for > > such would be limited. > > Hello Mark, > > your board needs a board enable: http://flashrom.org/Board_Enable > Usually someone disassembles the BIOS to find the necessary procedure, > you can also try what is mentioned in the wiki. Since reverse > engineering this stuff has become boring for those that are able to do > it, dont expect it to be done by someone else soon-ish (sometimes > wonders happen though, the mighty assembler gods are unfathomable :) > > In any case please provide the output of lspci -nnvvvxxx run as root > and if possible also superiotool -deV, thanks. > -- > Kind regards/Mit freundlichen Grüßen, Stefan Tauner > -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] flashing 0806 bios for P5WD2 PREMIUM
by Stefan Tauner 04 Sep '12

04 Sep '12

On Wed, 5 Sep 2012 13:44:53 +1000 Mark Starikov <mr.mark.starikov(a)gmail.com> wrote: > Please let me know if there is a quick fix that can get this board flashed > or(as this is very old hardware now) i would understand that support for > such would be limited. Hello Mark, your board needs a board enable: http://flashrom.org/Board_Enable Usually someone disassembles the BIOS to find the necessary procedure, you can also try what is mentioned in the wiki. Since reverse engineering this stuff has become boring for those that are able to do it, dont expect it to be done by someone else soon-ish (sometimes wonders happen though, the mighty assembler gods are unfathomable :) In any case please provide the output of lspci -nnvvvxxx run as root and if possible also superiotool -deV, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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flashing 0806 bios for P5WD2 PREMIUM
by Mark Starikov 04 Sep '12

04 Sep '12

Dear Flashrom team, I was wondering if you could point me to the right direction: I'm trying to update BIOS on ASUS P5WD2 PREMIUM board(2 NICs). As usual, floppy is not available and your program always did wonders for me so I though I'll send you a quick note before resorting to other measures. the current ROM on the board is Version: 0601 and i'm trying to flash 0806 This fails with output from the attempt, flashrom -V and dmidecode attached as txt files. BIOS download location: http://www.asus.com/Motherboards/Intel_Socket_775/P5WD2_Premium/#download Please let me know if there is a quick fix that can get this board flashed or(as this is very old hardware now) i would understand that support for such would be limited. Thanks in advance. *Big fan of flashrom BTW. Mark.

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asus p5n-mx: flashrom -V
by widhaya trisarnwadhana 04 Sep '12

04 Sep '12

ASUS P5N-MX Motherboard

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[PATCH] Add VIA VT6421A LPC programmer driver.
by Stefan Tauner 04 Sep '12

04 Sep '12

Thanks to Idwer Vollering for his iterative testing of this code. Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> --- the LPC registration was well-meant, but was useless. i am not sure yet why the weird offset in the mapping function is needed by idwer's card, but imho it should be useless and the problem is somewhere else. let's find out where. Makefile | 9 +++ atavia.c | 178 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashrom.c | 10 ++++ print.c | 5 ++ programmer.h | 13 ++++- 5 files changed, 214 insertions(+), 1 deletion(-) create mode 100644 atavia.c diff --git a/Makefile b/Makefile index 9309ce5..e4b364d 100644 --- a/Makefile +++ b/Makefile @@ -334,6 +334,9 @@ CONFIG_SATASII ?= yes # IMPORTANT: This code is not yet working! CONFIG_ATAHPT ?= no +# VIA VT6421A LPC memory support +CONFIG_ATAVIA ?= yes + # Always enable FT2232 SPI dongles for now. CONFIG_FT2232_SPI ?= yes @@ -459,6 +462,12 @@ PROGRAMMER_OBJS += atahpt.o NEED_PCI := yes endif +ifeq ($(CONFIG_ATAVIA), yes) +FEATURE_CFLAGS += -D'CONFIG_ATAVIA=1' +PROGRAMMER_OBJS += atavia.o +NEED_PCI := yes +endif + ifeq ($(CONFIG_FT2232_SPI), yes) FTDILIBS := $(shell pkg-config --libs libftdi 2>/dev/null || printf "%s" "-lftdi -lusb") # This is a totally ugly hack. diff --git a/atavia.c b/atavia.c new file mode 100644 index 0000000..dfb8d3b --- /dev/null +++ b/atavia.c @@ -0,0 +1,178 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> + * Copyright (C) 2011 Jonathan Kollasch <jakllsch(a)kollasch.net> + * Copyright (C) 2012 Stefan Tauner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdbool.h> +#include "flash.h" +#include "programmer.h" +#include "hwaccess.h" + +#define PCI_VENDOR_ID_VIA 0x1106 + +#define VIA_BASE_MASK 0xFFFFF000 +#define VIA_MAX_RETRIES 300 + +#define BROM_ADDR 0x60 + +#define BROM_DATA 0x64 + +#define BROM_ACCESS 0x68 +#define BROM_TRIGGER 0x80 +#define BROM_WRITE 0x40 +#define BROM_SIZE_MASK 0x30 +#define BROM_SIZE_64K 0x00 +#define BROM_SIZE_32K 0x10 +#define BROM_SIZE_16K 0x20 +#define BROM_SIZE_0K 0x30 +#define BROM_BYTE_ENABLE_MASK 0x0f + +#define BROM_STATUS 0x69 +#define BROM_ERROR_STATUS 0x80 + +/* + * Select the byte we want to access. This is done by clearing the bit + * corresponding to the byte we want to access, leaving the others set. + * (Yes, really.) + */ +#define ENABLE_BYTE(address) ((~(1 << ((address) & 3))) & BROM_BYTE_ENABLE_MASK) +#define BYTE_OFFSET(address) (((addr) & 3) * 8) + +const struct pcidev_status ata_via[] = { + {PCI_VENDOR_ID_VIA, 0x3249, NT, "VIA", "VT6421A"}, + + {}, +}; + +static const struct par_programmer lpc_programmer_atavia = { + .chip_readb = atavia_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = atavia_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + +static bool atavia_ready(void) +{ + int try; + uint8_t access, status; + bool ready = false; + + for (try = 0; try < VIA_MAX_RETRIES; try++) { + access = pci_read_byte(pcidev_dev, BROM_ACCESS); + status = pci_read_byte(pcidev_dev, BROM_STATUS); + if (((access & BROM_TRIGGER) == 0) && (status & BROM_ERROR_STATUS) == 0) { + ready = true; + break; + } else { + programmer_delay(1); + continue; + } + } + + msg_pdbg2("%s: %s after %d tries (access=0x%02x, status=0x%02x)\n", + __FUNCTION__, ready ? "suceeded" : "failed", try, access, status); + + return ready; +} + +static int atavia_shutdown(void *data) +{ + pci_cleanup(pacc); + return 0; +} + +int atavia_init(void) +{ + uint32_t tmp; + if (rget_io_perms()) + return 1; + + pcidev_init(PCI_BASE_ADDRESS_0, ata_via); + + /* must be done before rpci calls */ + if (register_shutdown(atavia_shutdown, NULL)) + return 1; + + /* Enable expansion ROM. */ + uint32_t exp_base = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS) | 0x01; + rpci_write_long(pcidev_dev, PCI_ROM_ADDRESS, exp_base); + + /* Test if a flash chip is attached. */ + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, exp_base | VIA_BASE_MASK); + programmer_delay(90); + tmp = pci_read_long(pcidev_dev, PCI_ROM_ADDRESS); + if ((tmp & VIA_BASE_MASK) == 0) { + msg_perr("Controller thinks there is no ROM attached.\n"); + msg_pdbg("BROM base=0x%08x\n", tmp); + //return 1; + } + + pci_write_long(pcidev_dev, PCI_ROM_ADDRESS, exp_base); + programmer_delay(10); + if (!atavia_ready()) { + msg_perr("Controller not ready.\n"); + //return 1; + } + + uint8_t access = pci_read_byte(pcidev_dev, BROM_ACCESS) & BROM_SIZE_MASK; + if (access & BROM_SIZE_0K) { + msg_pinfo("No ROM device found although the Expansion ROM Base test succeeded!?\n"); + msg_pdbg("access=0x%02x\n", access); + //return 1; + } + msg_pinfo("Controller thinks there is a ROM device with %s kB attached.\n", + (access & BROM_SIZE_64K) ? "64" : + (access & BROM_SIZE_32K) ? "32" : "16"); + + register_par_programmer(&lpc_programmer_atavia, BUS_LPC); + + return 0; +} + +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) +{ + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_long(pcidev_dev, BROM_DATA, val << BYTE_OFFSET(addr)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | BROM_WRITE | ENABLE_BYTE(addr)); + + if (atavia_ready() == false) { + msg_perr("not ready after write\n"); + } +} + +uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr) +{ + uint8_t val; + + pci_write_long(pcidev_dev, BROM_ADDR, (addr & ~3)); + pci_write_byte(pcidev_dev, BROM_ACCESS, BROM_TRIGGER | ENABLE_BYTE(addr)); + + if (atavia_ready() == false) { + msg_perr("not ready after read\n"); + } + + val = (pci_read_long(pcidev_dev, BROM_DATA) >> BYTE_OFFSET(addr)) & 0xff; + + return val; +} diff --git a/flashrom.c b/flashrom.c index fdc5412..f5bf45f 100644 --- a/flashrom.c +++ b/flashrom.c @@ -152,6 +152,16 @@ const struct programmer_entry programmer_table[] = { }, #endif +#if CONFIG_ATAVIA == 1 + { + .name = "atavia", + .init = atavia_init, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .delay = internal_delay, + }, +#endif + #if CONFIG_FT2232_SPI == 1 { .name = "ft2232_spi", diff --git a/print.c b/print.c index 582a49e..724f91c 100644 --- a/print.c +++ b/print.c @@ -487,6 +487,11 @@ void print_supported(void) programmer_table[PROGRAMMER_ATAHPT].name); print_supported_pcidevs(ata_hpt); #endif +#if CONFIG_ATAVIA == 1 + printf("\nSupported devices for the %s programmer:\n", + programmer_table[PROGRAMMER_ATAVIA].name); + print_supported_pcidevs(ata_via); +#endif #if CONFIG_FT2232_SPI == 1 msg_ginfo("\nSupported devices for the %s programmer:\n", programmer_table[PROGRAMMER_FT2232_SPI].name); diff --git a/programmer.h b/programmer.h index 51b9c40..105613c 100644 --- a/programmer.h +++ b/programmer.h @@ -54,6 +54,9 @@ enum programmer { #if CONFIG_ATAHPT == 1 PROGRAMMER_ATAHPT, #endif +#if CONFIG_ATAVIA == 1 + PROGRAMMER_ATAVIA, +#endif #if CONFIG_FT2232_SPI == 1 PROGRAMMER_FT2232_SPI, #endif @@ -239,7 +242,7 @@ int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); #endif /* print.c */ -#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 +#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_ATAVIA+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 /* Not needed for CONFIG_INTERNAL, but for all other PCI-based programmers. */ void print_supported_pcidevs(const struct pcidev_status *devs); #endif @@ -420,6 +423,14 @@ int atahpt_init(void); extern const struct pcidev_status ata_hpt[]; #endif +/* atavia.c */ +#if CONFIG_ATAVIA == 1 +int atavia_init(void); +void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); +uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr); +extern const struct pcidev_status ata_via[]; +#endif + /* ft2232_spi.c */ #if CONFIG_FT2232_SPI == 1 struct usbdev_status { -- Kind regards, Stefan Tauner

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Re: [flashrom] [PATCH 1/2] Nvidia CK804 enable improvement
by Stefan Tauner 03 Sep '12

03 Sep '12

On Sun, 7 Aug 2011 06:35:59 +0200 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > Ensure all read and write locks are disabled on ck804 (and MCP51). > > Currently the same chipset enable is used for MCP51 (nForce 430) too. > There have been reports of successful writes with its variations > (e.g. A8N-LA (Nagami-GL8E)), but the chipset enables were not tagged as OK. > Due to the new "unsupported chipset"-message we will get success reports in > the case this patch does not break anything on the MCP51-based boards. > > Tested on CK804 and > Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> > which was previously > Acked-by: Stefan Reinauer <stepan(a)coreboot.org> > > Rebasing, rephrasing and making errors non-fatal is > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> A refined (yes, again) version of this was Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> and committed in r1593. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1593 - trunk
by repository service 03 Sep '12

03 Sep '12

Author: stefanct Date: Tue Sep 4 05:55:04 2012 New Revision: 1593 URL: http://flashrom.org/trac/flashrom/changeset/1593 Log: Try to remove all read and write locks on CK804 (and MCP51). We made a first step into this direction in r1405, but failed to notice that there was already an extended patch by Jonathan which was refined to become this one. Allows the removal of board_shuttle_fn25 (which was also intended to be used on the ASUS A8N-SLI Deluxe, but this was never tested). A previous iteration was tested on CK804 and Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> which was then Acked-by: Stefan Reinauer <stepan(a)coreboot.org> Rebasing, refining and making errors non-fatal is Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/chipset_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Tue Sep 4 03:49:49 2012 (r1592) +++ trunk/board_enable.c Tue Sep 4 05:55:04 2012 (r1593) @@ -993,26 +993,6 @@ /* * Suited for: - * - Shuttle FN25 (SN25P): AMD S939 + NVIDIA CK804 (nForce4) - */ -static int board_shuttle_fn25(void) -{ - struct pci_dev *dev; - - dev = pci_dev_find(0x10DE, 0x0050); /* NVIDIA CK804 ISA bridge. */ - if (!dev) { - msg_perr("\nERROR: NVIDIA nForce4 ISA bridge not found.\n"); - return -1; - } - - /* One of those bits seems to be connected to TBL#, but -ENOINFO. */ - pci_write_byte(dev, 0x92, 0); - - return 0; -} - -/* - * Suited for: * - Elitegroup GeForce6100SM-M: NVIDIA MCP61 + ITE IT8726F */ static int board_ecs_geforce6100sm_m(void) @@ -2339,7 +2319,6 @@ {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, P3, "ASUS", "A8Jm", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x0260, 0x103C, 0x2A34, 0x10DE, 0x0264, 0x103C, 0x2A34, "NODUSM3", NULL, NULL, P3, "ASUS", "A8M2N-LA (NodusM3-GL8E)", 0, OK, nvidia_mcp_gpio0_raise}, {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI2L", NULL, NULL, P3, "ASUS", "A8N-LA (Nagami-GL8E)", 0, OK, nvidia_mcp_gpio0_raise}, - {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, "^A8N-SLI DELUXE", NULL, NULL, P3, "ASUS", "A8N-SLI Deluxe", 0, NT, board_shuttle_fn25}, {0x10de, 0x0264, 0x1043, 0x81bc, 0x10de, 0x02f0, 0x1043, 0x81cd, NULL, NULL, NULL, P3, "ASUS", "A8N-VM CSM", 0, OK, w83627ehf_gpio22_raise_2e}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, P3, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, P3, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, @@ -2433,7 +2412,6 @@ {0x8086, 0x24d3, 0x144d, 0xb025, 0x8086, 0x1050, 0x144d, 0xb025, NULL, NULL, NULL, P3, "Samsung", "Polaris 32", 0, OK, intel_ich_gpio21_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", P3, "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, P3, "Shuttle", "AK38N", 256, OK, NULL}, - {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, P3, "Shuttle", "FN25", 0, OK, board_shuttle_fn25}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x3058, 0x15DD, 0x7609, NULL, NULL, NULL, P3, "Soyo", "SY-7VCA", 0, OK, via_apollo_gpo0_lower}, {0x10de, 0x0364, 0x108e, 0x6676, 0x10de, 0x0369, 0x108e, 0x6676, "^Sun Ultra 40 M2", NULL, NULL, P3, "Sun", "Ultra 40 M2", 0, OK, board_sun_ultra_40_m2}, {0x1106, 0x3038, 0x0925, 0x1234, 0x1106, 0x0596, 0x1106, 0, NULL, NULL, NULL, P3, "Tekram", "P6Pro-A5", 256, OK, NULL}, Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Tue Sep 4 03:49:49 2012 (r1592) +++ trunk/chipset_enable.c Tue Sep 4 05:55:04 2012 (r1593) @@ -997,25 +997,74 @@ static int enable_flash_ck804(struct pci_dev *dev, const char *name) { - uint8_t old, new; + uint32_t segctrl; + uint8_t reg, old, new; + unsigned int err = 0; - pci_write_byte(dev, 0x92, 0x00); - if (pci_read_byte(dev, 0x92) != 0x00) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x92, 0x00, name); + /* 0x8A is special: it is a single byte and only one nibble is touched. */ + reg = 0x8A; + segctrl = pci_read_byte(dev, reg); + if ((segctrl & 0x3) != 0x0) { + if ((segctrl & 0xC) != 0x0) { + msg_pinfo("Can not unlock existing protection in register 0x%02x.\n", reg); + err++; + } else { + msg_pdbg("Unlocking protection in register 0x%02x... ", reg); + rpci_write_byte(dev, reg, segctrl & 0xF0); + + segctrl = pci_read_byte(dev, reg); + if ((segctrl & 0x3) != 0x0) { + msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%x).\n", + reg, segctrl); + err++; + } else + msg_pdbg("OK\n"); + } + } + + for (reg = 0x8C; reg <= 0x94; reg += 4) { + segctrl = pci_read_long(dev, reg); + if ((segctrl & 0x33333333) == 0x00000000) { + /* reads and writes are unlocked */ + continue; + } + if ((segctrl & 0xCCCCCCCC) != 0x00000000) { + msg_pinfo("Can not unlock existing protection in register 0x%02x.\n", reg); + err++; + continue; + } + msg_pdbg("Unlocking protection in register 0x%02x... ", reg); + rpci_write_long(dev, reg, 0x00000000); + + segctrl = pci_read_long(dev, reg); + if ((segctrl & 0x33333333) != 0x00000000) { + msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08x).\n", + reg, segctrl); + err++; + } else + msg_pdbg("OK\n"); } - old = pci_read_byte(dev, 0x88); - new = old | 0xc0; + if (err > 0) { + msg_pinfo("%d locks could not be disabled, disabling writes (reads may also fail).\n", err); + programmer_may_write = 0; + } + + reg = 0x88; + old = pci_read_byte(dev, reg); + new = old | 0xC0; if (new != old) { - rpci_write_byte(dev, 0x88, new); - if (pci_read_byte(dev, 0x88) != new) { - msg_pinfo("Setting register 0x%x to 0x%x on %s failed " - "(WARNING ONLY).\n", 0x88, new, name); + rpci_write_byte(dev, reg, new); + if (pci_read_byte(dev, reg) != new) { + msg_pinfo("Setting register 0x%02x to 0x%x on %s failed.\n", reg, new, name); + err++; } } if (enable_flash_nvidia_common(dev, name)) + err++; + + if (err > 0) return ERROR_NONFATAL; else return 0; Modified: trunk/print.c ============================================================================== --- trunk/print.c Tue Sep 4 03:49:49 2012 (r1592) +++ trunk/print.c Tue Sep 4 05:55:04 2012 (r1593) @@ -620,7 +620,7 @@ B("ASUS", "A8N-E", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL), B("ASUS", "A8N-LA (Nagami-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&d…", "This is an OEM board from HP, the HP name is Nagami-GL8E."), B("ASUS", "A8N-SLI", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL), - B("ASUS", "A8N-SLI Deluxe", NT, NULL, "Untested board enable."), + B("ASUS", "A8N-SLI Deluxe", NT, NULL, "Should work out of the box since r1593."), B("ASUS", "A8N-SLI Premium", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL), B("ASUS", "A8N-VM", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL), B("ASUS", "A8N-VM CSM", OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),

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flashrom September 2012