flashrom February 2012

flashrom@flashrom.org

43 participants
189 discussions

Re: [flashrom] [PATCH] Remove sharplhf00l04.c
by Carl-Daniel Hailfinger 15 May '12

15 May '12

Am 20.06.2011 01:13 schrieb Michael Karcher: > The currently unreferenced function in sharplhf00l04.c does a standard > FWH block protection reset (writes 0 to the protection register) and a > standard FWH block erase. > > The locking blocks of the FWH block lock cover 128KB areas, and thats > the only thing page_size is used for in the functions referenced in the > LHF00L04 entry. > My datasheet talks about 8 kB sectors and 64 kB blocks in "Figure 3. Memory Map", but "Table 8. FWH Flash Registers Configuration Map" only mentions registers for the 8 kB sectors in the top 64 kB block explicitly. "Table 8" also mentions "XX002H Whole Block Lock Register" as generic placeholder, and AFAICS those two X mean you have one block lock register for each of the 15 bottom 64 kB blocks and one for each of the 8 top 8 kB sectors. That also means the 82802ab unlocking as is can't be used. I was unable to find any 128 kB reference in my datasheet, so I'm going to Nack that part. > Finally, this adds a comment that there are non-volatile (flash memory) > lock bits for 8 sectors in the last 64KB. They are write-only and clearable > at once. Readback seems unsupported. > I have a slightly different interpretation of the datasheet (see above), so I'm not sure how to proceed. > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Killing sharplhf00l04.c is a good thing, though, so that part is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] ft2232_spi.c: add frequency divider parameter.
by Samir Ibradžić 15 May '12

15 May '12

On 2012年02月28日 10:48, Stefan Tauner wrote: > This adds an extra argument when using the ft2232_spi programmer to set > the frequency divider. The valid values for the divider is any even integer > between 2 and 131072. > > Signed-off-by: Samir Ibradžić<sibradzic(a)gmail.com> > Signed-off-by: Stefan Tauner<stefan.tauner(a)student.tuwien.ac.at> > > --- > this was totally broken even without Samir's version of the patch applied. > it might be a better idea to let the user specify the actual frequency instead of > the divisor like some other programmers do (serprog and buspirate). Well, it may be more clear to specify exact frequencies, but we may end up with weird set of frequencies for all these large dividers. Maybe it would be better to support a limited set of "standard" dividers and their corresponding frequencies, like: divider | freq --------+-------- 2 | 30MHz 4 | 15MHz 6 | 10MHz 8 | 7.5MHz 10 | 6MHz 12 | 5MHz 20 | 3MHz 30 | 2MHz 60 | 1MHz 80 | 750KHz 100 | 600KHz 120 | 500KHz 150 | 400KHz 200 | 300KHz 300 | 200KHz 600 | 100KHz 800 | 75KHz 1000 | 60KHz 1200 | 50KHz 1500 | 40KHz 2000 | 30KHz 3000 | 20KHz 6000 | 10KHz 8000 | 7.5KHz (and so on) But i vote for supporting specific divider after all, one can never know if there is some obscure device out there in the wild that supports only 6365372Hz. > TODO: man page > --- > ft2232_spi.c | 54 +++++++++++++++++++++++++++++++++++++----------------- > 1 files changed, 37 insertions(+), 17 deletions(-) > > diff --git a/ft2232_spi.c b/ft2232_spi.c > index 122866f..7d598b1 100644 > --- a/ft2232_spi.c > +++ b/ft2232_spi.c > @@ -64,17 +64,8 @@ const struct usbdev_status devs_ft2232spi[] = { > {}, > }; > > -/* > - * The 'H' chips can run internally at either 12MHz or 60MHz. > - * The non-H chips can only run at 12MHz. > - */ > -static uint8_t clock_5x = 1; > > -/* > - * In either case, the divisor is a simple integer clock divider. > - * If clock_5x is set, this divisor divides 30MHz, else it divides 6MHz. > - */ > -#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */ > +#define DEFAULT_DIVISOR 2 > > #define BITMODE_BITBANG_NORMAL 1 > #define BITMODE_BITBANG_SPI 2 > @@ -162,12 +153,28 @@ static const struct spi_programmer spi_programmer_ft2232 = { > /* Returns 0 upon success, a negative number upon errors. */ > int ft2232_spi_init(void) > { > - int f, ret = 0; > + int ret = 0; > struct ftdi_context *ftdic =&ftdic_context; > unsigned char buf[512]; > int ft2232_vid = FTDI_VID; > int ft2232_type = FTDI_FT4232H_PID; > enum ftdi_interface ft2232_interface = INTERFACE_B; > + /* > + * The 'H' chips can run with an internal clock of either 12 MHz or 60 MHz, > + * but the non-H chips can only run at 12 MHz. We enable the divide-by-5 > + * prescaler on the former to run on the same speed. > + */ > + uint8_t clock_5x = 1; > + /* In addition to the prescaler mentioned above there is also another > + * configurable one on all versions of the chips. Its divisor div can be > + * set by a 16 bit value x according to the following formula: > + * div = (1 + x) * 2<-> x = div / 2 - 1 > + * Hence the expressible divisors are all even numbers between 2 and > + * 2^17 (=131072) resulting in SCK frequencies of 2 MHz down to about > + * 92 Hz for 12 MHz inputs. > + */ > + uint32_t divisor = DEFAULT_DIVISOR; > + int f; > char *arg; > double mpsse_clk; > > @@ -243,6 +250,21 @@ int ft2232_spi_init(void) > } > } > free(arg); > + arg = extract_programmer_param("divisor"); > + if (arg&& strlen(arg)) { > + unsigned int temp = 0; > + char *endptr; > + temp = strtoul(arg,&endptr, 10); > + if (*endptr || temp< 2 || temp> 131072 || temp& 0x1) { > + msg_perr("Error: Invalid SPI frequency divisor specified: \"%s\".\n" > + "Valid are even values between 2 and 131072.\n", arg); > + free(arg); > + return -2; > + } else { > + divisor = (uint32_t)temp; > + } > + } > + free(arg); > msg_pdbg("Using device type %s %s ", > get_ft2232_vendorname(ft2232_vid, ft2232_type), > get_ft2232_devicename(ft2232_vid, ft2232_type)); > @@ -303,17 +325,15 @@ int ft2232_spi_init(void) > > msg_pdbg("Set clock divisor\n"); > buf[0] = 0x86; /* command "set divisor" */ > - /* valueL/valueH are (desired_divisor - 1) */ > - buf[1] = (DIVIDE_BY - 1)& 0xff; > - buf[2] = ((DIVIDE_BY - 1)>> 8)& 0xff; > if (send_buf(ftdic, buf, 3)) { > ret = -6; > goto ftdi_err; > } > + buf[1] = (divisor / 2 - 1)& 0xff; > + buf[2] = ((divisor / 2 - 1)>> 8)& 0xff; > > - msg_pdbg("MPSSE clock: %f MHz divisor: %d " > - "SPI clock: %f MHz\n", mpsse_clk, DIVIDE_BY, > - (double)(mpsse_clk / (((DIVIDE_BY - 1) + 1) * 2))); > + msg_pdbg("MPSSE clock: %f MHz, divisor: %u, SPI clock: %f MHz\n", > + mpsse_clk, divisor, (double)(mpsse_clk / divisor)); > > /* Disconnect TDI/DO to TDO/DI for loopback. */ > msg_pdbg("No loopback of TDI/DO TDO/DI\n");

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[PATCH] Add logfile support to flashrom
by Carl-Daniel Hailfinger 08 May '12

08 May '12

Add log file support to flashrom. The log file will always contain all verbose messages even if the user doesn't specify -V. If the user specifies -VV, SPEW messages will be logged as well. Proof of concept, comments welcome. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-logfile/flash.h =================================================================== --- flashrom-logfile/flash.h (Revision 1326) +++ flashrom-logfile/flash.h (Arbeitskopie) @@ -229,6 +229,8 @@ #define ERROR_NONFATAL 0x100 /* cli_output.c */ +int open_logfile(char *filename); +int msg_log(const char *fmt, ...); /* Let gcc and clang check for correct printf-style format strings. */ int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3))); #define MSG_ERROR 0 Index: flashrom-logfile/cli_output.c =================================================================== --- flashrom-logfile/cli_output.c (Revision 1326) +++ flashrom-logfile/cli_output.c (Arbeitskopie) @@ -2,6 +2,7 @@ * This file is part of the flashrom project. * * Copyright (C) 2009 Sean Nelson <audiohacked(a)gmail.com> + * Copyright (C) 2011 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,30 +23,70 @@ #include <stdarg.h> #include "flash.h" -int print(int type, const char *fmt, ...) +static FILE *logfile = NULL; + +int open_logfile(char *filename) { + if (!filename) { + msg_gerr("No filename specified.\n"); + return 1; + } + if ((logfile = fopen(filename, "w")) == NULL) { + perror(filename); + return 1; + } + return 0; +} + +int msg_log(const char *fmt, ...) +{ va_list ap; int ret; - FILE *output_type; + if (!logfile) + return -1; + va_start(ap, fmt); + ret = vfprintf(logfile, fmt, ap); + va_end(ap); + return ret; +} + +int print(int type, const char *fmt, ...) +{ + va_list ap; + int ret = 0; + int want_screen = 1; + int want_file = 1; + FILE *output_type = stdout; + switch (type) { case MSG_ERROR: output_type = stderr; break; case MSG_BARF: - if (verbose < 2) - return 0; + if (verbose < 2) { + want_screen = 0; + want_file = 0; + } + break; case MSG_DEBUG: if (verbose < 1) - return 0; + want_screen = 0; + break; case MSG_INFO: default: - output_type = stdout; break; } - va_start(ap, fmt); - ret = vfprintf(output_type, fmt, ap); - va_end(ap); + if (want_screen) { + va_start(ap, fmt); + ret = vfprintf(output_type, fmt, ap); + va_end(ap); + } + if (want_file && logfile) { + va_start(ap, fmt); + ret = vfprintf(logfile, fmt, ap); + va_end(ap); + } return ret; } Index: flashrom-logfile/cli_classic.c =================================================================== --- flashrom-logfile/cli_classic.c (Revision 1326) +++ flashrom-logfile/cli_classic.c (Arbeitskopie) @@ -38,7 +38,8 @@ "-z|" #endif "-E|-r <file>|-w <file>|-v <file>]\n" - " [-c <chipname>] [-m [<vendor>:]<part>] [-l <file>]\n" + " [-c <chipname>] [-m [<vendor>:]<part>] [-l <file>] " + "[-o <file>]\n" " [-i <image>] [-p <programmername>[:<parameters>]]\n\n"); printf("Please note that the command line interface for flashrom has " @@ -72,6 +73,7 @@ "<file>\n" " -i | --image <name> only flash image <name> " "from flash layout\n" + " -o | --output <name> log to file <name>\n" " -L | --list-supported print supported devices\n" #if CONFIG_PRINT_WIKI == 1 " -z | --list-supported-wiki print supported devices " @@ -118,7 +120,7 @@ int operation_specified = 0; int i; - static const char optstring[] = "r:Rw:v:nVEfc:m:l:i:p:Lzh"; + static const char optstring[] = "r:Rw:v:nVEfc:m:l:i:p:Lzho:"; static const struct option long_options[] = { {"read", 1, NULL, 'r'}, {"write", 1, NULL, 'w'}, @@ -136,6 +138,7 @@ {"programmer", 1, NULL, 'p'}, {"help", 0, NULL, 'h'}, {"version", 0, NULL, 'R'}, + {"output", 1, NULL, 'o'}, {NULL, 0, NULL, 0} }; @@ -307,14 +310,17 @@ cli_classic_usage(argv[0]); exit(0); break; + case 'o': + tempstr = strdup(optarg); + if (open_logfile(tempstr)) + cli_classic_abort_usage(); + break; default: cli_classic_abort_usage(); break; } } - /* FIXME: Print the actions flashrom will take. */ - if (list_supported) { print_supported(); exit(0); @@ -355,6 +361,10 @@ flash = NULL; } + /* FIXME: Print the actions flashrom will take. */ + /* For the log. FIXME: Print this only to the log file. */ + print_version(); + /* FIXME: Delay calibration should happen in programmer code. */ myusec_calibrate_delay(); -- http://www.hailfinger.org/

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[PATCH] Add Winbond SuperI/O detection
by Carl-Daniel Hailfinger 06 May '12

06 May '12

Add Winbond Super I/O detection and hook it up to the generic Super I/O detection framework. Incomplete and untested, but at least it shouldn't break anything. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-winbond_superio_detect/flash.h =================================================================== --- flashrom-winbond_superio_detect/flash.h (Revision 1064) +++ flashrom-winbond_superio_detect/flash.h (Arbeitskopie) @@ -350,6 +350,7 @@ /* board_enable.c */ void w836xx_ext_enter(uint16_t port); void w836xx_ext_leave(uint16_t port); +struct superio probe_superio_winbond(void); uint8_t sio_read(uint16_t port, uint8_t reg); void sio_write(uint16_t port, uint8_t reg, uint8_t data); void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); @@ -388,7 +389,8 @@ }; extern struct superio superio; #define SUPERIO_VENDOR_NONE 0x0 -#define SUPERIO_VENDOR_ITE 0x1 +#define SUPERIO_VENDOR_WINBOND 0x1 +#define SUPERIO_VENDOR_ITE 0x2 struct pci_dev *pci_dev_find_filter(struct pci_filter filter); struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); Index: flashrom-winbond_superio_detect/internal.c =================================================================== --- flashrom-winbond_superio_detect/internal.c (Revision 1064) +++ flashrom-winbond_superio_detect/internal.c (Arbeitskopie) @@ -104,12 +104,14 @@ void probe_superio(void) { - superio = probe_superio_ite(); + superio = probe_superio_winbond(); #if 0 - /* Winbond Super I/O code is not yet available. */ + /* ITE probe causes SMSC LPC47N217 to power off the serial UART. */ if (superio.vendor == SUPERIO_VENDOR_NONE) - superio = probe_superio_winbond(); + superio = probe_superio_smsc(); #endif + if (superio.vendor == SUPERIO_VENDOR_NONE) + superio = probe_superio_ite(); } #endif Index: flashrom-winbond_superio_detect/board_enable.c =================================================================== --- flashrom-winbond_superio_detect/board_enable.c (Revision 1064) +++ flashrom-winbond_superio_detect/board_enable.c (Arbeitskopie) @@ -229,22 +229,59 @@ address, but takes no effort to make sure the chip is really a Winbond Super I/O */ -static const struct winbond_chip * winbond_superio_detect(uint16_t base) +uint8_t probe_id_winbond(uint16_t port) { uint8_t chipid; + + w836xx_ext_enter(port); + chipid = sio_read(port, 0x20); + w836xx_ext_leave(port); + + return chipid; +} + +#define WINBOND_SUPERIO_PORT1 0x2e +#define WINBOND_SUPERIO_PORT2 0x4e + +struct superio probe_superio_winbond(void) +{ + struct superio ret = {}; + uint16_t winbond_ports[] = {WINBOND_SUPERIO_PORT1, WINBOND_SUPERIO_PORT2, 0}; + uint16_t *i = winbond_ports; + + ret.vendor = SUPERIO_VENDOR_WINBOND; + for (; *i; i++) { + ret.port = *i; + ret.model = probe_id_winbond(ret.port); + switch (ret.model) { + case WINBOND_W83627HF_ID: + case WINBOND_W83627EHF_ID: + case WINBOND_W83627THF_ID: + msg_pinfo("Found Winbond Super I/O, id %02hx\n", + ret.model); + return ret; + } + } + + /* No good ID found. */ + ret.vendor = SUPERIO_VENDOR_NONE; + ret.port = 0; + ret.model = 0; + return ret; +} + +static const struct winbond_chip *winbond_superio_chipdef(void) +{ const struct winbond_chip * chip = NULL; int i; - w836xx_ext_enter(base); - chipid = sio_read(base, 0x20); for (i = 0; i < ARRAY_SIZE(winbond_chips); i++) - if (winbond_chips[i].device_id == chipid) + if (winbond_chips[i].device_id == superio.model) { chip = &winbond_chips[i]; break; } - w836xx_ext_leave(base); return chip; } @@ -259,7 +296,7 @@ int port = pin / 10; int bit = pin % 10; - chip = winbond_superio_detect(base); + chip = winbond_superio_chipdef(); if (!chip) { msg_perr("\nERROR: No supported Winbond Super I/O found\n"); return -1; -- http://www.hailfinger.org/

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[PATCH] W83697xx superio flash enable
by David Borg 05 May '12

05 May '12

Adds a function to enable the flash interface on w83697xx superio's. Still needs to be hooked up to the superio detection framework though. Signed-off-by: David Borg <borg.db(a)gmail.com>

2 1

Re: [flashrom] [PATCH] spi25.c: Refactor spi_write_status_register helpers.
by Carl-Daniel Hailfinger 25 Mar '12

25 Mar '12

Am 31.01.2012 06:50 schrieb Stefan Tauner: > In r1115 "Write protection handling for Atmel AT25*" the old spi_write_status_register > function was duplicated to send WREN and EWSR commands respectively controlled > by a new common wrapper function spi_write_status_register without a reason. > Both functions' resulting code is equal apart from the opcode used. The code > itself does also differ in the macros used, but their value (apart from the opcode) > is equal. This patch adds a new parameter for the opcode to the helper function > which allows removal of the other one. This relies on the fact that EWSR and WREN > have the same INSIZE and OUTSIZE though. If that is really seen as an issue, the > sizes could be made parameters too. > > This patch also changes the wrapper so that it no longer sets the feature bits > of the struct flash(ctx) argument. This may result in changed output, because it > no longer implicitly disables the debug message in following executions. Ahem. Once we do the per-region unlock dance, this will be extremely painful. We have three choices: - Keep that part of the code as is. Not good. - Spit out that message for every status register write. Not good. - Fix all flash chip definitions. Good, but separate patch. How do we proceed? I'd like to keep the feature bit setting until the flash chip definitions have been fixed, but this is not a veto-style decision. > Also, spi_write_status_enable has been dead code since r658 or so. Remove it. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Once the feature bit setting is decided upon, this is Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> with one small comment below. > --- > spi25.c | 90 ++++++++++----------------------------------------------------- > 1 files changed, 14 insertions(+), 76 deletions(-) > > diff --git a/spi25.c b/spi25.c > index 3ce7f08..d81616c 100644 > --- a/spi25.c > +++ b/spi25.c > @@ -720,81 +720,19 @@ int spi_block_erase_c7(struct flashctx *flash, unsigned int addr, > return spi_chip_erase_c7(flash); > } > > -int spi_write_status_enable(struct flashctx *flash) > -{ > - static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR }; > - int result; > - > - /* Send EWSR (Enable Write Status Register). */ > - result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL); > - > - if (result) > - msg_cerr("%s failed\n", __func__); > - > - return result; > -} > - > -/* > - * This is according the SST25VF016 datasheet, who knows it is more > - * generic that this... > - */ > -static int spi_write_status_register_ewsr(struct flashctx *flash, int status) > +static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char opcode) enable_opcode instead of opcode. > { > int result; > int i = 0; > - struct spi_command cmds[] = { > - { > - /* WRSR requires either EWSR or WREN depending on chip type. */ > - .writecnt = JEDEC_EWSR_OUTSIZE, > - .writearr = (const unsigned char[]){ JEDEC_EWSR }, > - .readcnt = 0, > - .readarr = NULL, > - }, { > - .writecnt = JEDEC_WRSR_OUTSIZE, > - .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, > - .readcnt = 0, > - .readarr = NULL, > - }, { > - .writecnt = 0, > - .writearr = NULL, > - .readcnt = 0, > - .readarr = NULL, > - }}; > - > - result = spi_send_multicommand(flash, cmds); > - if (result) { > - msg_cerr("%s failed during command execution\n", > - __func__); > - /* No point in waiting for the command to complete if execution > - * failed. > - */ > - return result; > - } > - /* WRSR performs a self-timed erase before the changes take effect. > - * This may take 50-85 ms in most cases, and some chips apparently > - * allow running RDSR only once. Therefore pick an initial delay of > - * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. > + /* > + * WRSR requires either EWSR or WREN depending on chip type. > + * The code below relies on the fact hat EWSR and WREN have the same > + * INSIZE and OUTSIZE. > */ > - programmer_delay(100 * 1000); > - while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { > - if (++i > 490) { > - msg_cerr("Error: WIP bit after WRSR never cleared\n"); > - return TIMEOUT_ERROR; > - } > - programmer_delay(10 * 1000); > - } > - return 0; > -} > - > -static int spi_write_status_register_wren(struct flashctx *flash, int status) > -{ > - int result; > - int i = 0; > struct spi_command cmds[] = { > { > - /* WRSR requires either EWSR or WREN depending on chip type. */ > .writecnt = JEDEC_WREN_OUTSIZE, > - .writearr = (const unsigned char[]){ JEDEC_WREN }, > + .writearr = (const unsigned char[]){ opcode }, > .readcnt = 0, > .readarr = NULL, > }, { > @@ -811,8 +749,7 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) > > result = spi_send_multicommand(flash, cmds); > if (result) { > - msg_cerr("%s failed during command execution\n", > - __func__); > + msg_cerr("%s failed during command execution\n", __func__); > /* No point in waiting for the command to complete if execution > * failed. > */ > @@ -836,17 +773,18 @@ static int spi_write_status_register_wren(struct flashctx *flash, int status) > > int spi_write_status_register(struct flashctx *flash, int status) > { > + int feature_bits = flash->feature_bits; > int ret = 1; > > - if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { > + if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { > msg_cdbg("Missing status register write definition, assuming " > "EWSR is needed\n"); > - flash->feature_bits |= FEATURE_WRSR_EWSR; > + feature_bits |= FEATURE_WRSR_EWSR; > } > - if (flash->feature_bits & FEATURE_WRSR_WREN) > - ret = spi_write_status_register_wren(flash, status); > - if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) > - ret = spi_write_status_register_ewsr(flash, status); > + if (feature_bits & FEATURE_WRSR_WREN) > + ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); > + if (ret && (feature_bits & FEATURE_WRSR_EWSR)) > + ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); > return ret; > } > Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] FlashRom and Intel C204 chipset.
by Stefan Tauner 09 Mar '12

09 Mar '12

On Wed, 12 Oct 2011 22:01:01 +0400 "Andrey V. Bondarenko" <avbondarenko(a)gmail.com> wrote: > Hello, > > Verbose output is in the attachment file for chipset Intel C204. I sent this > e-mail because it was suggested to send report. > > # ./flashrom --read ./P8B-E-4L-ASUS-0602.ROM > flashrom v0.9.4-r1395 on Linux 2.6.18-274.3.1.el5.028stab094.3 (x86_64), > built with libpci 3.1.7, GCC 4.1.2 20080704 (Red Hat 4.1.2-51), little > endian > flashrom is free software, get the source code at http://www.flashrom.org > > Calibrating delay loop... OK. > Found chipset "Intel C204". > This chipset is marked as untested. If you are using an up-to-date version > of flashrom please email a report to flashrom(a)flashrom.org including a > verbose (-V) log. Thank you! > Enabling flash write... OK. > This chipset supports the following protocols: FWH, SPI. > Found Winbond flash chip "W25Q64" (8192 kB, SPI) at physical address > 0xff800000. > Reading flash... Transaction error! > Read operation failed! > FAILED. hello and thanks for your report. this is another case of a locked Management Engine (ME) region, which we can't unlock yet. i have added the P8B-E/4L to our list of boards with a note about the problem for now and will commit that later. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] compiling flashrom for Debian/kFreeBSD
by Carl-Daniel Hailfinger 02 Mar '12

02 Mar '12

Am 25.02.2012 11:46 schrieb Robert Millan: > El 25 de febrer de 2012 0:49, Carl-Daniel Hailfinger >> El 24 de > febrer de 2012 0:55, Carl-Daniel Hailfinger >>> <c-d.hailfinger.devel.2006(a)gmx.net> ha escrit: >>>> #include <machine/cpufunc.h> >>>> #define off64_t off_t >>>> #define lseek64 lseek >>> Actually, we have machine/cpufunc.h (we have everything in machine/* >>> actually). The off_t / lseek defines after this look dangerous though >>> (they collide with glibc definitions). >> Comment has been replaced with >> /* Note that FreeBSD kernel with glibc has conflicting out[bwl] definitions >> * in machine/cpufunc.h and sys/io.h. Use cpufunc.h only for plain FreeBSD. >> */ > Uhm no, we removed the conflicts. We need to allow programs to > include both headers painlessly. Again, just pick the one you prefer. > cpufunc.h is supposed to work, and if it doesn't it's a bug. Thanks for the info, I have adjusted the comment: /* Note that Debian/kFreeBSD (FreeBSD with glibc) machine/cpufunc.h contains out[bwl] definitions which are incompatible with FreeBSD machine/cpufunc.h. Use machine/cpufunc.h only for plain FreeBSD. */ Background: FreeBSD machine/cpufunc.h has outb(port,data). Linux/glibc sys/io.h has outb(data,port). Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] flashrom with HP XW9300
by Stefan Tauner 01 Mar '12

01 Mar '12

On Mon, 27 Feb 2012 07:55:04 +0100 Jürgen Trapp <juergen.trapp(a)alice.de> wrote: > lspci -nnvvxxx > […] Hello Jürgen! The last thing we heard from you was that you are trying to find and play with a write protection jumper. Did you succeed? -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Support for ASRock 890GX Extreme3 mainboard
by Svetoslav Trochev 29 Feb '12

29 Feb '12

Hi Everybody, I am new here, so my apology if I am doing something wrong. I have ASRock 890GX Extreme3 mainboard. This board has ability to be flashed using standard BIOS, but never the less I decided to test Flashrom. I read the "Board Testing HOWTO" [1]. First signs are that this board will work out of the box with "flashrom v0.9.4-r1394 on Linux 3.0.4-pmagic (i686), built with libpci 3.1.7, GCC 4.6.1, little endian" What I have done so far: 1. Ran 'flashrom' command and it detected the chip: Winbond W25Q80. 2. Ran 'flashrom -R xxxx.rom' and it completed with no errors. I examine the file and it looks like normal ROM file. 3. Ran 'flashrom -V' I am attaching the output. 4. I try comparing the backup copy of the EEPROM with the original file provided by ASRock. It is different. They have exact same header, but quite different. 5. Because I am not 100% sure that I have good backup I decided to order spare chip and continue with the test later. ( I have external EEPROM programmer ) I will continue this weekend. Thank you and any comments are welcome and highly appreciated, Svetoslav Trochev [1] http://www.flashrom.org/Board_Testing_HOWTO

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flashrom February 2012