August 2011 - flashrom - mail.coreboot.org

ck804 enable improvement
by Jonathan A. Kollasch 07 Aug '11

07 Aug '11

Hi, Attached is a proposed patch for improving the ck804 chipset enable. Comments? Jonathan Kollasch

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Re: [flashrom] FAILED update new bios but OK to flash OLD bios - P5N-E SLI
by Stefan Tauner 06 Aug '11

06 Aug '11

On Fri, 22 Jul 2011 10:38:45 +0200 Joël Obrecht <joel.obrecht(a)gmail.com> wrote: > Hi Joshua, > I'm sorry I looked a bit around but I guess I need some more explanations > for using / installing that patch. May I have to replace the data in source > files ? Where ? > Anyway, I tried again with last svn, failed again, I joined the verbose > output. > Joël hello joël! i am not entirely sure how your building process works, but you basically need to apply joshua's patch on top of a current source snapshot before compiling it. lets say you have the source in your current working directory. you can then fetch and apply the patch by: wget http://patchwork.coreboot.org/patch/2125/raw/ -O p5ne.patch patch < p5ne.patch after that you have to recompile it. it should print something like "Disabling flash write protection for P5N-E" when run then. it is possible that it does not work yet. please dont reboot if flashrom tells you that and report back (you can get even faster reponses on IRC, if that's an issue btw). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[PATCH] typo
by Sylvain 'ythier' Hitier 06 Aug '11

06 Aug '11

Typo after r1389. Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier(a)gmail.com> Index: chipset_enable.c =================================================================== --- chipset_enable.c (revision 1405) +++ chipset_enable.c (working copy) @@ -326,7 +326,7 @@ } if (fwh_idsel & 0xffff000000000000ULL) { msg_perr("Error: fwh_idsel= specified, but value had " - "unusued bits set.\n"); + "unused bits set.\n"); goto idsel_garbage_out; } fwh_idsel_old = pci_read_long(dev, 0xd0); Regards, Sylvain "ythier" Hitier -- Business is about being busy, not being rich... Living in a Debian package => http://en.wikipedia.org/wiki/Apt,_Vaucluse

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[commit] r1407 - trunk
by repository service 06 Aug '11

06 Aug '11

Author: stefanct Date: Sat Aug 6 18:16:45 2011 New Revision: 1407 URL: http://flashrom.org/trac/flashrom/changeset/1407 Log: Fix the A8N-SLI Deluxe board enable Long story short: - the A8N in print.c should be A8N-SLI Deluxe as documented - the A8N-SLI Deluxe board enable needs a DMI pattern, else it will get executed on the A8N-SLI Premium unnecessarily. http://www.flashrom.org/pipermail/flashrom/2010-August/004310.html the DMI string is taken from an ubuntu bug report (a real dmidecode or flashrom output was not found). https://bugs.launchpad.net/ubuntu/+source/linux/+bug/807980 - the other A8N-SLI variants seem to work without the board enable A8N-SLI Premium: http://www.flashrom.org/pipermail/flashrom/2010-August/004310.html A8N-SLI: http://www.coreboot.org/pipermail/coreboot/2009-June/049107.html http://www.coreboot.org/pipermail/coreboot/2009-May/049002.html Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Aug 6 18:16:33 2011 (r1406) +++ trunk/board_enable.c Sat Aug 6 18:16:45 2011 (r1407) @@ -2001,7 +2001,7 @@ {0x1002, 0x4372, 0x103c, 0x2a26, 0x1002, 0x4377, 0x103c, 0x2a26, NULL, NULL, NULL, P3, "ASUS", "A8AE-LE", 0, OK, amd_sbxxx_gpio9_raise}, {0x8086, 0x27A0, 0x1043, 0x1287, 0x8086, 0x27DF, 0x1043, 0x1287, "^A8J", NULL, NULL, P3, "ASUS", "A8Jm", 0, NT, intel_ich_gpio34_raise}, {0x10DE, 0x0260, 0x103c, 0x2a3e, 0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI2L", NULL, NULL, P3, "ASUS", "A8N-LA (Nagami-GL8E)", 0, OK, nvidia_mcp_gpio0_raise}, - {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, "^A8N-SLI", NULL, NULL, P3, "ASUS", "A8N-SLI Deluxe", 0, NT, board_shuttle_fn25}, + {0x10DE, 0x005E, 0x1043, 0x815A, 0x10DE, 0x0054, 0x1043, 0x815A, "^A8N-SLI DELUXE", NULL, NULL, P3, "ASUS", "A8N-SLI Deluxe", 0, NT, board_shuttle_fn25}, {0x10de, 0x0264, 0x1043, 0x81bc, 0x10de, 0x02f0, 0x1043, 0x81cd, NULL, NULL, NULL, P3, "ASUS", "A8N-VM CSM", 0, OK, w83627ehf_gpio22_raise_2e}, {0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, P3, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise}, {0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, P3, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Aug 6 18:16:33 2011 (r1406) +++ trunk/print.c Sat Aug 6 18:16:45 2011 (r1407) @@ -420,10 +420,10 @@ B("ASUS", "A7V8X-MX SE", 1, "http://www.asus.com/product.aspx?P_ID=1guVBT1qV5oqhHyZ", NULL), B("ASUS", "A7V8X-X", 1, "http://www.asus.com/product.aspx?P_ID=YcXfRrWHZ9RKoVmw", NULL), B("ASUS", "A8Jm", 1, "http://www.asus.com/product.aspx?P_ID=VztICtOgiU6drx4m", NULL), - B("ASUS", "A8N", 1, NULL, NULL), /* TODO: This should probably be A8N-SLI Deluxe, see http://www.coreboot.org/pipermail/flashrom/2009-November/000878.html */ B("ASUS", "A8N-E", 1, "http://www.asus.com/product.aspx?P_ID=DzbA8hgqchMBOVRz", NULL), B("ASUS", "A8N-LA (Nagami-GL8E)", 1, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&d…", "This is an OEM board from HP, the HP name is Nagami-GL8E."), B("ASUS", "A8N-SLI", 1, "http://www.asus.com/product.aspx?P_ID=J9FKa8z2xVId3pDK", NULL), + B("ASUS", "A8N-SLI Deluxe", 0, NULL, "Untested board enable."), B("ASUS", "A8N-SLI Premium", 1, "http://www.asus.com/product.aspx?P_ID=nbulqxniNmzf0mH1", NULL), B("ASUS", "A8N-VM", 1, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL), B("ASUS", "A8N-VM CSM", 1, "http://www.asus.com/product.aspx?P_ID=JBqqlpj4cspbSa3s", NULL),

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[commit] r1406 - trunk
by repository service 06 Aug '11

06 Aug '11

Author: stefanct Date: Sat Aug 6 18:16:33 2011 New Revision: 1406 URL: http://flashrom.org/trac/flashrom/changeset/1406 Log: Fix the EP-8NPA7I (for the last time hopefully) - retag it as OK (tested by Jonathan Kollasch when he wrote it) http://patchwork.coreboot.org/patch/2106/ - add a line with identical pci ids but a different dmi pattern, so that EP-9NPA7I is also matched. combining multiple boards in one line is problematic due to print.c's detection of board enables - so dont bother for now. http://www.flashrom.org/pipermail/flashrom/2011-June/006878.html See previous commit for additional information. Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sat Aug 6 14:45:21 2011 (r1405) +++ trunk/board_enable.c Sat Aug 6 18:16:33 2011 (r1406) @@ -2027,7 +2027,8 @@ {0x10de, 0x03ea, 0x1019, 0x2602, 0x10de, 0x03e0, 0x1019, 0x2602, NULL, NULL, NULL, P3, "Elitegroup", "GeForce6100SM-M", 0, OK, board_ecs_geforce6100sm_m}, {0x1106, 0x3038, 0x1019, 0x0996, 0x1106, 0x3177, 0x1019, 0x0996, NULL, NULL, NULL, P3, "Elitegroup", "K7VTA3", 256, OK, NULL}, {0x1106, 0x3177, 0x1106, 0x3177, 0x1106, 0x3059, 0x1695, 0x3005, NULL, NULL, NULL, P3, "EPoX", "EP-8K5A2", 0, OK, w836xx_memw_enable_2e}, - {0x10DE, 0x005E, 0x1695, 0x1010, 0x10DE, 0x0050, 0x1695, 0x1010, "8NPA7I", NULL, NULL, P3, "EPoX", "EP-8NPA7I", 0, NT, nvidia_mcp_gpio4_raise}, /* needs http://patchwork.coreboot.org/patch/2125/ */ + {0x10DE, 0x005E, 0x1695, 0x1010, 0x10DE, 0x0050, 0x1695, 0x1010, "8NPA7I", NULL, NULL, P3, "EPoX", "EP-8NPA7I", 0, OK, nvidia_mcp_gpio4_raise}, + {0x10DE, 0x005E, 0x1695, 0x1010, 0x10DE, 0x0050, 0x1695, 0x1010, "9NPA7I", NULL, NULL, P3, "EPoX", "EP-9NPA7I", 0, OK, nvidia_mcp_gpio4_raise}, {0x10EC, 0x8139, 0x1695, 0x9001, 0x11C1, 0x5811, 0x1695, 0x9015, NULL, NULL, NULL, P3, "EPoX", "EP-8RDA3+", 0, OK, nvidia_mcp_gpio31_raise}, {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, NULL, "epox", "ep-bx3", P3, "EPoX", "EP-BX3", 0, NT, intel_piix4_gpo22_raise}, {0x10de, 0x02f0, 0x105b, 0x0d01, 0x10de, 0x0264, 0x105b, 0x0d01, NULL, NULL, NULL, P3, "Foxconn", "6150K8MD-8EKRSH", 0, NT, nvidia_mcp_gpio2_raise}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sat Aug 6 14:45:21 2011 (r1405) +++ trunk/print.c Sat Aug 6 18:16:33 2011 (r1406) @@ -482,7 +482,7 @@ B("ASUS", "P5KC", 1, "http://www.asus.com/product.aspx?P_ID=fFZ8oUIGmLpwNMjj", NULL), B("ASUS", "P5L-MX", 1, "http://www.asus.com/product.aspx?P_ID=X70d3NCzH2DE9vWH", NULL), B("ASUS", "P5GD1 Pro", 1, "http://www.asus.com/product.aspx?P_ID=50M49xQh71EZOeM1", NULL), - B("ASUS", "P5N-E SLI", 0, "http://www.asus.com/product.aspx?P_ID=KyHOsOKWujC2QguJ", "Needs a patch (http://patchwork.coreboot.org/patch/2125/) and a board enable (http://patchwork.coreboot.org/patch/3298/)."), + B("ASUS", "P5N-E SLI", 0, "http://www.asus.com/product.aspx?P_ID=KyHOsOKWujC2QguJ", "Needs a board enable (http://patchwork.coreboot.org/patch/3298/)."), B("ASUS", "P5N32-E SLI", 1, "http://www.asus.com/product.aspx?P_ID=vBZLIBtPzYB2bLcb", NULL), B("ASUS", "P5ND2-SLI Deluxe", 1, "http://www.asus.com/product.aspx?P_ID=WY7XroDuUImVbgp5", NULL), B("ASUS", "P5PE-VM", 1, "http://www.asus.com/product.aspx?P_ID=k3h0ZFVu9Lo1dUvk", NULL), @@ -512,8 +512,8 @@ B("Elitegroup", "RS485M-M", 1, "http://www.ecs.com.tw/ECSWebSite_2007/Products/ProductsDetail.aspx?Category…", NULL), B("Emerson", "ATCA-7360", 1, "http://www.emerson.com/sites/Network_Power/en-US/Products/Product_Detail/Pr…", NULL), B("EPoX", "EP-8K5A2", 1, "http://www.epox.com/product.asp?ID=EP-8K5A2", NULL), - B("EPoX", "EP-8NPA7I", 0, "http://www.epox.com/product.asp?ID=EP-8NPA7I", "Needs a patch (http://patchwork.coreboot.org/patch/2125/)."), - B("EPoX", "EP-9NPA7I", 0, "http://www.epox.com/product.asp?ID=EP-9NPA7I", "Needs a patch (http://patchwork.coreboot.org/patch/2125/) and the same board enable as the EP-8NPA7I."), + B("EPoX", "EP-8NPA7I", 1, "http://www.epox.com/product.asp?ID=EP-8NPA7I", NULL), + B("EPoX", "EP-9NPA7I", 1, "http://www.epox.com/product.asp?ID=EP-9NPA7I", NULL), B("EPoX", "EP-8RDA3+", 1, "http://www.epox.com/product.asp?ID=EP-8RDA3plus", NULL), B("EPoX", "EP-BX3", 1, "http://www.epox.com/product.asp?ID=EP-BX3", NULL), B("EVGA", "132-CK-NF78", 1, "http://www.evga.com/articles/385.asp", NULL),

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[commit] r1405 - trunk
by repository service 06 Aug '11

06 Aug '11

Author: stefanct Date: Sat Aug 6 14:45:21 2011 New Revision: 1405 URL: http://flashrom.org/trac/flashrom/changeset/1405 Log: Clear byte 0x92 of the LPC bridge for all CK804 (and MCP51) chipsets The OEM BIOS on the EPoX EP-8PA7I and a number of other boards clear byte 0x92 in the LPC bridge configuration space. Do the same for all CK804 chips, assuming this to be some sort of chipset-generic write-enable. Currently the same chipset enable is used for MCP51 (nForce 430). There have been reports of successful writes with its variations (e.g. A8N-LA (Nagami-GL8E)), but they were not tagged as OK. Due to the new "unsupported chipset"-message we will get success reports in the case this patch does not break anything on the MCP51-based boards. See also: http://www.flashrom.org/pipermail/flashrom/2011-July/007252.html http://patchwork.coreboot.org/patch/3176/ Signed-off-by: Jonathan Kollasch <jakllsch(a)kollasch.net> Acked-by: Joshua Roys <roysjosh(a)gmail.com> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Thu Aug 4 19:40:25 2011 (r1404) +++ trunk/chipset_enable.c Sat Aug 6 14:45:21 2011 (r1405) @@ -801,6 +801,12 @@ { uint8_t old, new; + pci_write_byte(dev, 0x92, 0x00); + if (pci_read_byte(dev, 0x92) != 0x00) { + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x92, 0x00, name); + } + old = pci_read_byte(dev, 0x88); new = old | 0xc0; if (new != old) {

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[commit] r1404 - trunk
by repository service 04 Aug '11

04 Aug '11

Author: stefanct Date: Thu Aug 4 19:40:25 2011 New Revision: 1404 URL: http://flashrom.org/trac/flashrom/changeset/1404 Log: Introduce msg_*dbg2 Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/cli_output.c trunk/flash.h trunk/flashrom.8 Modified: trunk/cli_output.c ============================================================================== --- trunk/cli_output.c Thu Aug 4 19:37:58 2011 (r1403) +++ trunk/cli_output.c Thu Aug 4 19:40:25 2011 (r1404) @@ -33,6 +33,9 @@ output_type = stderr; break; case MSG_BARF: + if (verbose < 3) + return 0; + case MSG_DEBUG2: if (verbose < 2) return 0; case MSG_DEBUG: Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Thu Aug 4 19:37:58 2011 (r1403) +++ trunk/flash.h Thu Aug 4 19:40:25 2011 (r1404) @@ -233,7 +233,8 @@ #define MSG_ERROR 0 #define MSG_INFO 1 #define MSG_DEBUG 2 -#define MSG_BARF 3 +#define MSG_DEBUG2 3 +#define MSG_BARF 4 #define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */ #define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */ #define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */ @@ -243,6 +244,9 @@ #define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */ #define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */ #define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */ +#define msg_gdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* general debug2 */ +#define msg_pdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */ +#define msg_cdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */ #define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */ #define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */ #define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */ Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Aug 4 19:37:58 2011 (r1403) +++ trunk/flashrom.8 Thu Aug 4 19:40:25 2011 (r1404) @@ -77,8 +77,8 @@ .TP .B "\-V, \-\-verbose" More verbose output. This option can be supplied multiple times -(max. 2 times, i.e. -.BR \-VV ) +(max. 3 times, i.e. +.BR \-VVV ) for even more debug output. .TP .B "\-c, \-\-chip" <chipname>

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[commit] r1403 - trunk
by repository service 04 Aug '11

04 Aug '11

Author: stefanct Date: Thu Aug 4 19:37:58 2011 New Revision: 1403 URL: http://flashrom.org/trac/flashrom/changeset/1403 Log: Rephrase warnings in chipset_enable.c Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/chipset_enable.c Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Mon Aug 1 20:39:28 2011 (r1402) +++ trunk/chipset_enable.c Thu Aug 4 19:37:58 2011 (r1403) @@ -77,8 +77,8 @@ rpci_write_byte(dev, 0x40, new); newer = pci_read_byte(dev, 0x40); if (newer != new) { - msg_pinfo("tried to set register 0x%x to 0x%x on %s " - "failed (WARNING ONLY)\n", 0x40, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x40, new, name); msg_pinfo("Stuck at 0x%x\n", newer); return -1; } @@ -166,8 +166,8 @@ rpci_write_byte(sbdev, 0x45, new); newer = pci_read_byte(sbdev, 0x45); if (newer != new) { - msg_pinfo("tried to set register 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x45, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x45, new, name); msg_pinfo("Stuck at 0x%x\n", newer); ret = -1; } @@ -193,8 +193,8 @@ rpci_write_byte(sbdev, 0x45, new); newer = pci_read_byte(sbdev, 0x45); if (newer != new) { - msg_pinfo("tried to set register 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x45, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x45, new, name); msg_pinfo("Stuck at 0x%x\n", newer); ret = -1; } @@ -241,8 +241,8 @@ rpci_write_word(dev, xbcs, new); if (pci_read_word(dev, xbcs) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", xbcs, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", xbcs, new, name); return -1; } @@ -287,8 +287,8 @@ rpci_write_byte(dev, bios_cntl, new); if (pci_read_byte(dev, bios_cntl) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", bios_cntl, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", bios_cntl, new, name); return -1; } @@ -674,8 +674,8 @@ new = pci_read_byte(dev, 0x52); if (new != 0xee) { - msg_pinfo("tried to set register 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x52, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x52, new, name); return -1; } @@ -693,8 +693,8 @@ if (new != old) { rpci_write_byte(dev, 0x43, new); if (pci_read_byte(dev, 0x43) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x43, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x43, new, name); } } @@ -706,8 +706,8 @@ rpci_write_byte(dev, 0x40, new); if (pci_read_byte(dev, 0x40) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x40, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x40, new, name); return -1; } @@ -806,8 +806,8 @@ if (new != old) { rpci_write_byte(dev, 0x88, new); if (pci_read_byte(dev, 0x88) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x88, new, name); + msg_pinfo("Setting register to set 0x%x to 0x%x on %s " + "failed (WARNING ONLY).\n", 0x88, new, name); } } @@ -818,8 +818,8 @@ rpci_write_byte(dev, 0x6d, new); if (pci_read_byte(dev, 0x6d) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x6d, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x6d, new, name); return -1; } @@ -902,8 +902,8 @@ rpci_write_byte(dev, 0x6d, new); if (pci_read_byte(dev, 0x6d) != new) { - msg_pinfo("tried to set 0x%x to 0x%x on %s failed " - "(WARNING ONLY)\n", 0x6d, new, name); + msg_pinfo("Setting register 0x%x to 0x%x on %s failed " + "(WARNING ONLY).\n", 0x6d, new, name); return -1; }

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A8M2N-LA flash fail fail
by Márton Miklós 03 Aug '11

03 Aug '11

Hello all, I have just tried to flash my BIOS using the flashrom, and I have ran into the following situation: lucifer@lucifer-desktop:~/Letöltések/flashrom-0.9.4$ sudo ./flashrom -w /tmp/sp35111/3.10 flashrom v0.9.4-r1395 on Linux 2.6.35-28-generic (i686), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA MCP51". This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x23, failed byte count from 0x00000000-0x00000fff: 0xfec ERASE FAILED! Reading current flash chip contents... done. ERASE FAILED at 0x00000000! Expected=0xff, Read=0x23, failed byte count from 0x00000000-0x0000ffff: 0xfef9 ERASE FAILED! Reading current flash chip contents... done. ERASE FAILED at 0x00000000! Expected=0xff, Read=0x23, failed byte count from 0x00000000-0x0007ffff: 0x6494b ERASE FAILED! FAILED! Uh oh. Erase/write failed. Checking if anything changed. Good. It seems nothing was changed. Writing to the flash chip apparently didn't do anything. This means we have to add special support for your board, programmer or flash chip. Please report this on IRC at irc.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org! ------------------------------------------------------------------------------- You may now reboot or simply leave the machine running. Flashrom info: lucifer@lucifer-desktop:~/Letöltések/flashrom-0.9.4$ sudo ./flashrom flashrom v0.9.4-r1395 on Linux 2.6.35-28-generic (i686), built with libpci 3.1.7, GCC 4.4.5, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA MCP51". This chipset is marked as untested. If you are using an up-to-date version of flashrom please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found PMC flash chip "Pm49FL004" (512 kB, LPC, FWH) at physical address 0xfff80000. No operations were specified. I have tried the latest revision (1402) but it did not works too. Let me know if I should provide any additional information. Regards, Miklós Márton

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Re: [flashrom] [PATCH] Add deferred -i processing
by Stefan Tauner 02 Aug '11

02 Aug '11

On Tue, 2 Aug 2011 14:48:15 -0700 David Hendricks <dhendrix(a)google.com> wrote: > The patch is mostly ack-able, save for a few nits. > > On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < > stefan.tauner(a)student.tuwien.ac.at> wrote: > > > My implementation does not defer the processing until doit(), but after the > > argument parsing loop only (doit() should not contain argument checks). > > > > Just FYI -- The reason we deferred processing until doit() was because our > usage case calls for reading the ROM content to find pre-existing mappings > (e.g. fmap) which exist in the ROM image. It might be useful to eventually > do the same thing for cbfs and Intel's flash descriptor. jup i am aware of that. but i dont like to inflate doit() with even more stuff, that does not belong there. we need to think about refactoring the whole processing... we need something like pre-doit() before doit() but after init and unlocking. a bit like the shutdown process with the registration of some callbacks... i hope work on libflashrom will enforce us to move forward with that. > On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < > stefan.tauner(a)student.tuwien.ac.at> wrote: > > > This allows to specify -i and -l parameters in any order. > > > > I don't like the output in error cases much, any ideas? > > example of a good run: > > flashrom -p dummy:emulate=SST25VF032B -i normal -w > > ../testimages/4096kB.rand.img -l test.layout -i gfxrom -i fallback > > flashrom v0.9.4-r1396 on Linux 2.6.35-30-generic (x86_64), built with > > libpci 3.1.7, GCC 4.4.5, little endian > > flashrom is free software, get the source code at http://www.flashrom.org > > > > Using region(s): "normal", "gfxrom", "fallback". > > Calibrating delay loop... OK. > > Found SST flash chip "SST25VF032B" (4096 kB, SPI) on dummy. > > Reading old flash chip contents... done. > > Erasing and writing flash chip... Erase/write done. > > Verifying flash... VERIFIED. > > > > Looks okay to me. And IIRC -V will list all ROM layout entries found even if > they are not included, which is nice for debugging. that was printed at default verbosity before, and is now spew-verbose (which is now at -VVV level). but yes i wanted to keep something for debugging. > > On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < > stefan.tauner(a)student.tuwien.ac.at> wrote: > > > example of a semi-good run: > > flashrom -p dummy:emulate=SST25VF032B -i normal -w > > ../testimages/4096kB.rand.img -l test.layout -i gfxrom -i fallback > > flashrom v0.9.4-r1396 on Linux 2.6.35-30-generic (x86_64), built with > > libpci 3.1.7, GCC 4.4.5, little endian > > flashrom is free software, get the source code at http://www.flashrom.org > > > > Maximum number of ROM images (4) in layout file reached before end of > > layout file. > > Ignoring the rest of the layout file. > > > > I think that if the user accidentally specifies an invalid layout or number > of included regions, then Flashrom should quit. Otherwise Flashrom might not > flash everything the user intends, leaving the content in an inconsistent > (probably bricked) state. This has become problematic due to complicated ROM > layouts in systems where multiple masters use a shared SPI flash (e.g. an EC > or Intel's ME insanity). yes, that's certainly a well argued proposal imo. carl-daniel? > On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < > stefan.tauner(a)student.tuwien.ac.at> wrote: > > > example of a faulty run: > > flashrom -p dummy:emulate=SST25VF032B -i normal -w > > ../testimages/4096kB.rand.img -l test.layout -i gfxrom -i fallback -i bios > > flashrom v0.9.4-r1396 on Linux 2.6.35-30-generic (x86_64), built with > > libpci 3.1.7, GCC 4.4.5, little endian > > flashrom is free software, get the source code at http://www.flashrom.org > > > > Maximum number of ROM images (4) in layout file reached before end of > > layout file. > > Ignoring the rest of the layout file. > > Using region(s): "normal", "gfxrom", "fallback"Invalid region specified: > > "bios" > > > > If you split that last line so that the "Invalid region" part shows up on a > newline, it looks okay. that is one option yes. but i tend to think we may defer the output of the used regions and push it into its own loop at the end of process_include_args. this was there would be no "using region..." output in case of errors at all. and it may even be more readable(?) > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > > --- > > cli_classic.c | 11 ++++----- > > flash.h | 2 + > > layout.c | 68 > > ++++++++++++++++++++++++++++++++++++++++++++++++++------ > > 3 files changed, 67 insertions(+), 14 deletions(-) > > > > diff --git a/cli_classic.c b/cli_classic.c > > index 36fe9ad..e44ea86 100644 > > --- a/cli_classic.c > > +++ b/cli_classic.c > > @@ -233,14 +233,9 @@ int cli_classic(int argc, char *argv[]) > > cli_classic_abort_usage(); > > break; > > case 'i': > > - /* FIXME: -l has to be specified before -i. */ > > tempstr = strdup(optarg); > > - if (find_romentry(tempstr) < 0) { > > - fprintf(stderr, "Error: image %s not found > > in " > > - "layout file or -i specified before > > " > > - "-l\n", tempstr); > > + if (register_include_arg(tempstr) < 0) > > cli_classic_abort_usage(); > > - } > > break; > > case 'L': > > if (++operation_specified > 1) { > > @@ -325,6 +320,10 @@ int cli_classic(int argc, char *argv[]) > > cli_classic_abort_usage(); > > } > > > > + if (process_include_args() < 0) { > > + cli_classic_abort_usage(); > > + } > > + > > /* FIXME: Print the actions flashrom will take. */ > > > > if (list_supported) { > > diff --git a/flash.h b/flash.h > > index 5b49e9d..0848255 100644 > > --- a/flash.h > > +++ b/flash.h > > @@ -251,6 +251,8 @@ int print(int type, const char *fmt, ...) > > __attribute__((format(printf, 2, 3))); > > int cli_classic(int argc, char *argv[]); > > > > /* layout.c */ > > +int register_include_arg(char *name); > > +int process_include_args(void); > > int read_romlayout(char *name); > > int find_romentry(char *name); > > int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, > > uint8_t *newcontents); > > diff --git a/layout.c b/layout.c > > index d719a05..936e316 100644 > > --- a/layout.c > > +++ b/layout.c > > @@ -41,6 +41,12 @@ typedef struct { > > char name[256]; > > } romlayout_t; > > > > +/* include_args lists arguments specified at the command line with -i. > > They > > + * must be processed at some point so that desired regions are marked as > > + * "included" in the rom_entries list. > > + */ > > +static char *include_args[MAX_ROMLAYOUT]; > > +static int num_include_args = 0; /* the number of valid entries. */ > > static romlayout_t rom_entries[MAX_ROMLAYOUT]; > > > > #if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ > > @@ -194,6 +200,20 @@ int read_romlayout(char *name) > > } > > #endif > > > > +/* register an include argument (-i) for later processing */ > > +int register_include_arg(char *name) > > +{ > > + if (num_include_args >= MAX_ROMLAYOUT) { > > + msg_gerr("Too many regions included (%i).\n", > > num_include_args); > > + return -1; > > + } > > + > > + include_args[num_include_args] = name; > > + num_include_args++; > > + return num_include_args; > > +} > > + > > +/* returns the index of the entry (or a negative value if it is not found) > > */ > > int find_romentry(char *name) > > { > > int i; > > @@ -201,20 +221,49 @@ int find_romentry(char *name) > > if (!romimages) > > return -1; > > > > - msg_ginfo("Looking for \"%s\"... ", name); > > - > > + msg_gspew("Looking for region \"%s\"... ", name); > > for (i = 0; i < romimages; i++) { > > if (!strcmp(rom_entries[i].name, name)) { > > rom_entries[i].included = 1; > > - msg_ginfo("found.\n"); > > + msg_gspew("found.\n"); > > return i; > > } > > } > > - msg_ginfo("not found.\n"); // Not found. Error. > > - > > + msg_gspew("not found.\n"); > > return -1; > > } > > > > +/* process -i arguments > > + * returns 0 to indicate success, <0 to indicate failure > > > > I think the usual Flashrom convention is to return 1 to indicate failure. I > used <0 out of habit. Let's go ahead and fix that coding convention for > upstream if desired, and update the call sites to do error checking > correctly. well -1 is also used very often, but that's no argument to introduce more inconsistencies :) i'll fix this, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] [PATCH] Add deferred -i processing
by David Hendricks 02 Aug '11

02 Aug '11

The patch is mostly ack-able, save for a few nits. On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > My implementation does not defer the processing until doit(), but after the > argument parsing loop only (doit() should not contain argument checks). > Just FYI -- The reason we deferred processing until doit() was because our usage case calls for reading the ROM content to find pre-existing mappings (e.g. fmap) which exist in the ROM image. It might be useful to eventually do the same thing for cbfs and Intel's flash descriptor. On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > This allows to specify -i and -l parameters in any order. > > I don't like the output in error cases much, any ideas? > example of a good run: > flashrom -p dummy:emulate=SST25VF032B -i normal -w > ../testimages/4096kB.rand.img -l test.layout -i gfxrom -i fallback > flashrom v0.9.4-r1396 on Linux 2.6.35-30-generic (x86_64), built with > libpci 3.1.7, GCC 4.4.5, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Using region(s): "normal", "gfxrom", "fallback". > Calibrating delay loop... OK. > Found SST flash chip "SST25VF032B" (4096 kB, SPI) on dummy. > Reading old flash chip contents... done. > Erasing and writing flash chip... Erase/write done. > Verifying flash... VERIFIED. > Looks okay to me. And IIRC -V will list all ROM layout entries found even if they are not included, which is nice for debugging. On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > example of a semi-good run: > flashrom -p dummy:emulate=SST25VF032B -i normal -w > ../testimages/4096kB.rand.img -l test.layout -i gfxrom -i fallback > flashrom v0.9.4-r1396 on Linux 2.6.35-30-generic (x86_64), built with > libpci 3.1.7, GCC 4.4.5, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Maximum number of ROM images (4) in layout file reached before end of > layout file. > Ignoring the rest of the layout file. > I think that if the user accidentally specifies an invalid layout or number of included regions, then Flashrom should quit. Otherwise Flashrom might not flash everything the user intends, leaving the content in an inconsistent (probably bricked) state. This has become problematic due to complicated ROM layouts in systems where multiple masters use a shared SPI flash (e.g. an EC or Intel's ME insanity). We can apply this fix in a follow-up patch if you'd prefer: Index: layout.c =================================================================== --- layout.c (revision 1402) +++ layout.c (working copy) @@ -159,7 +159,7 @@ "file reached before end of layout file.\n", MAX_ROMLAYOUT); msg_gerr("Ignoring the rest of the layout file.\n"); - break; + return 1; } if (2 != fscanf(romlayout, "%s %s\n", tempstr, rom_entries[romimages].name)) continue; On Mon, Aug 1, 2011 at 6:05 PM, Stefan Tauner < stefan.tauner(a)student.tuwien.ac.at> wrote: > example of a faulty run: > flashrom -p dummy:emulate=SST25VF032B -i normal -w > ../testimages/4096kB.rand.img -l test.layout -i gfxrom -i fallback -i bios > flashrom v0.9.4-r1396 on Linux 2.6.35-30-generic (x86_64), built with > libpci 3.1.7, GCC 4.4.5, little endian > flashrom is free software, get the source code at http://www.flashrom.org > > Maximum number of ROM images (4) in layout file reached before end of > layout file. > Ignoring the rest of the layout file. > Using region(s): "normal", "gfxrom", "fallback"Invalid region specified: > "bios" > If you split that last line so that the "Invalid region" part shows up on a newline, it looks okay. Please run "flashrom --help" for usage info. > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > cli_classic.c | 11 ++++----- > flash.h | 2 + > layout.c | 68 > ++++++++++++++++++++++++++++++++++++++++++++++++++------ > 3 files changed, 67 insertions(+), 14 deletions(-) > > diff --git a/cli_classic.c b/cli_classic.c > index 36fe9ad..e44ea86 100644 > --- a/cli_classic.c > +++ b/cli_classic.c > @@ -233,14 +233,9 @@ int cli_classic(int argc, char *argv[]) > cli_classic_abort_usage(); > break; > case 'i': > - /* FIXME: -l has to be specified before -i. */ > tempstr = strdup(optarg); > - if (find_romentry(tempstr) < 0) { > - fprintf(stderr, "Error: image %s not found > in " > - "layout file or -i specified before > " > - "-l\n", tempstr); > + if (register_include_arg(tempstr) < 0) > cli_classic_abort_usage(); > - } > break; > case 'L': > if (++operation_specified > 1) { > @@ -325,6 +320,10 @@ int cli_classic(int argc, char *argv[]) > cli_classic_abort_usage(); > } > > + if (process_include_args() < 0) { > + cli_classic_abort_usage(); > + } > + > /* FIXME: Print the actions flashrom will take. */ > > if (list_supported) { > diff --git a/flash.h b/flash.h > index 5b49e9d..0848255 100644 > --- a/flash.h > +++ b/flash.h > @@ -251,6 +251,8 @@ int print(int type, const char *fmt, ...) > __attribute__((format(printf, 2, 3))); > int cli_classic(int argc, char *argv[]); > > /* layout.c */ > +int register_include_arg(char *name); > +int process_include_args(void); > int read_romlayout(char *name); > int find_romentry(char *name); > int handle_romentries(struct flashchip *flash, uint8_t *oldcontents, > uint8_t *newcontents); > diff --git a/layout.c b/layout.c > index d719a05..936e316 100644 > --- a/layout.c > +++ b/layout.c > @@ -41,6 +41,12 @@ typedef struct { > char name[256]; > } romlayout_t; > > +/* include_args lists arguments specified at the command line with -i. > They > + * must be processed at some point so that desired regions are marked as > + * "included" in the rom_entries list. > + */ > +static char *include_args[MAX_ROMLAYOUT]; > +static int num_include_args = 0; /* the number of valid entries. */ > static romlayout_t rom_entries[MAX_ROMLAYOUT]; > > #if CONFIG_INTERNAL == 1 /* FIXME: Move the whole block to cbtable.c? */ > @@ -194,6 +200,20 @@ int read_romlayout(char *name) > } > #endif > > +/* register an include argument (-i) for later processing */ > +int register_include_arg(char *name) > +{ > + if (num_include_args >= MAX_ROMLAYOUT) { > + msg_gerr("Too many regions included (%i).\n", > num_include_args); > + return -1; > + } > + > + include_args[num_include_args] = name; > + num_include_args++; > + return num_include_args; > +} > + > +/* returns the index of the entry (or a negative value if it is not found) > */ > int find_romentry(char *name) > { > int i; > @@ -201,20 +221,49 @@ int find_romentry(char *name) > if (!romimages) > return -1; > > - msg_ginfo("Looking for \"%s\"... ", name); > - > + msg_gspew("Looking for region \"%s\"... ", name); > for (i = 0; i < romimages; i++) { > if (!strcmp(rom_entries[i].name, name)) { > rom_entries[i].included = 1; > - msg_ginfo("found.\n"); > + msg_gspew("found.\n"); > return i; > } > } > - msg_ginfo("not found.\n"); // Not found. Error. > - > + msg_gspew("not found.\n"); > return -1; > } > > +/* process -i arguments > + * returns 0 to indicate success, <0 to indicate failure > I think the usual Flashrom convention is to return 1 to indicate failure. I used <0 out of habit. Let's go ahead and fix that coding convention for upstream if desired, and update the call sites to do error checking correctly. > + */ > +int process_include_args(void) > +{ > + int i; > + unsigned int found = 0; > + for (i = 0; i < num_include_args && include_args[i] != NULL; i++) { > + /* User has specified an area, but no layout file is > loaded. */ > + if (!romimages) { > + msg_gerr("Region requested (with -i \"%s\"), " > + "but no layout data is available.\n", > + include_args[i]); > + return -1; > return 1 + } > + > + if (find_romentry(include_args[i]) < 0) { > + msg_gerr("Invalid region specified: \"%s\"\n", > + include_args[i]); > + return -1; > return 1 > + } > + if (found == 0) > + msg_ginfo("Using region(s): \"%s\"", > include_args[i]); > + else > + msg_ginfo(", \"%s\"", include_args[i]); > + found++; > + } > + msg_ginfo(".\n"); > + return 0; > +} > + > int find_next_included_romentry(unsigned int start) > { > int i; > @@ -246,11 +295,12 @@ int handle_romentries(struct flashchip *flash, > uint8_t *oldcontents, uint8_t *ne > int entry; > unsigned int size = flash->total_size * 1024; > > - /* If no layout file was specified or the layout file was empty, > assume > - * that the user wants to flash the complete new image. > + /* If no regions were specified for inclusion, assume > + * that the user wants to write the complete new image. > */ > - if (!romimages) > + if (num_include_args == 0) > return 0; > + > /* Non-included romentries are ignored. > * The union of all included romentries is used from the new image. > */ > @@ -262,6 +312,8 @@ int handle_romentries(struct flashchip *flash, uint8_t > *oldcontents, uint8_t *ne > size - start); > break; > } > + > + /* For non-included region, copy from old content. */ > if (rom_entries[entry].start > start) > memcpy(newcontents + start, oldcontents + start, > rom_entries[entry].start - start); > -- > 1.7.1 > > -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

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[PATCH] Confirm EN29LV800 bus, timing, and page size
by TJ 02 Aug '11

02 Aug '11

Uncertain values now confirmed. If you're happy with the new EN29LV800 code I'll submit a combined patch with a Signed-off-by tag. --- flashchips.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/flashchips.c b/flashchips.c index b5be180..10b8dea 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2166,15 +2166,15 @@ struct flashchip flashchips[] = { { .vendor = "EON", .name = "EN29LV800(B)(C)B", - .bustype = CHIP_BUSTYPE_UNKNOWN, + .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = EON_ID, .model_id = EN_29LV800B, .total_size = 1024, - .page_size = 1024, // TODO: check this + .page_size = 1024, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* TODO: check Datasheet has no timing info specified */ + .probe_timing = TIMING_ZERO, .erase = NULL, .block_erasers = { @@ -2198,15 +2198,15 @@ struct flashchip flashchips[] = { { .vendor = "EON", .name = "EN29LV800(B)(C)T", - .bustype = CHIP_BUSTYPE_UNKNOWN, + .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = EON_ID, .model_id = EN_29LV800T, .total_size = 1024, - .page_size = 1024, // TODO: check this + .page_size = 1024, .feature_bits = FEATURE_ADDR_AAA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_ZERO, /* TODO: check Datasheet has no timing info specified */ + .probe_timing = TIMING_ZERO, .erase = NULL, .block_erasers = { -- 1.6.3.3

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Report back
by Pulp and Paper Automation 01 Aug '11

01 Aug '11

Hi First thanks for a great service. I successfully tested a Intel NIC card Model Intel PRO/100 S desktop adapter Chipset Intel 82550EY Atmel flash chip "AT49BV512" There is also an onboard Atmel 93C46 that could not be read with –p nicintel_spi? Here is the edited results pupa@pupa-IMBA-9454ISA:~$ sudo flashrom -R test.bin -p nicintel Mapping Intel NIC control/status reg at 0xff8ff000, unaligned size 0x10. Found Atmel flash chip "AT49BV512" (64 kB, Parallel) on nicintel. Reading old flash chip contents... done. Verifying flash... VERIFIED. pupa@pupa-IMBA-9454ISA:~$ sudo flashrom -E -p nicintel Calibrating delay loop... OK. Found "Intel 82557/8/9/0/1 Ethernet Pro 100" (8086:1229, BDF 03:0d.0). Mapping Intel NIC control/status reg at 0xff8ff000, unaligned size 0x10. Found Atmel flash chip "AT49BV512" (64 kB, Parallel) on nicintel. Erasing and writing flash chip... Erase/write done. pupa@pupa-IMBA-9454ISA:~$ sudo flashrom -v test.bin -p nicintel Calibrating delay loop... OK. Mapping Intel NIC control/status reg at 0xff8ff000, unaligned size 0x10. Found Atmel flash chip "AT49BV512" (64 kB, Parallel) on nicintel. Reading old flash chip contents... done. Verifying flash... VERIFY FAILED at 0x00000000! Expected=0x55, Read=0xff, failed byte count from 0x00000000-0x0000ffff: 0xd0cf pupa@pupa-IMBA-9454ISA:~$ sudo flashrom -w test.bin -p nicintel Calibrating delay loop... OK. Mapping Intel NIC control/status reg at 0xff8ff000, unaligned size 0x10. Found Atmel flash chip "AT49BV512" (64 kB, Parallel) on nicintel. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. pupa@pupa-IMBA-9454ISA:~$ sudo flashrom -v test.bin -p nicintel Calibrating delay loop... OK. Found "Intel 82557/8/9/0/1 Ethernet Pro 100" (8086:1229, BDF 03:0d.0). Mapping Intel NIC control/status reg at 0xff8ff000, unaligned size 0x10. Found Atmel flash chip "AT49BV512" (64 kB, Parallel) on nicintel. Reading old flash chip contents... done. Verifying flash... VERIFIED.

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AAI on SST25VF016B
by Noé Rubinstein 01 Aug '11

01 Aug '11

Hi, I was looking for some way to decrease the flashing time with Flashrom for a 2MB SST SST25VF016B chip with a Dediprog SF100 programmer. After taking a look at the datasheet, stefanct suggested to try to change the write function for SST25VF016B to spi_aai_write, instead of spi_chip_write_1. (I had tried changing it to spi_chip_write_256 some time ago. Unsurprisingly, the results were not so good) I did some benchmark by writing random data on a chip already filled with random data. I attached the results. I've run the benchmark two times and got similar results on the two runs. In short: - with spi_aai_write, writing takes 56 minutes and seems to work reliably - with spi_chip_write_1, writing takes 143 minutes I also ran the test with -VV but the log is so big I can't possibly send it to the mailing list. Here it is: http://neetwork.net/up/misc/bench_vv I also attached the patch I applied to Flashrom's trunk. -- Noé Rubinstein Proformatique (groupe Avencall) - XiVO IPBX OpenHardware 10 bis, rue Lucien VOILIN - 92800 Puteaux

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[commit] r1402 - trunk
by repository service 01 Aug '11

01 Aug '11

Author: stefanct Date: Mon Aug 1 20:39:28 2011 New Revision: 1402 URL: http://flashrom.org/trac/flashrom/changeset/1402 Log: Switch to AAI for some more SST chips Enable AAI for: SST25VF016B SST25VF040B{,.REMS} SST25VF080B Chips that support AAI via a different opcode are annotated with a comment: SST25VF040.REMS SST25LF040A.RES SST25VF080B Tested-by: Joshua Roys <roysjosh(a)gmail.com> Write time (w/erase) went from 46 s to 21 s. SST25VF016B Tested-by: Noé Rubinstein <nrubinstein(a)avencall.com> Write time (w/erase) on a dediprog went from 143 mins to 56 mins. Signed-off-by: Joshua Roys <roysjosh(a)gmail.com> Rebased and Acked-by: Noé Rubinstein <nrubinstein(a)avencall.com> Modified: trunk/flashchips.c Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Fri Jul 29 22:13:45 2011 (r1401) +++ trunk/flashchips.c Mon Aug 1 20:39:28 2011 (r1402) @@ -5606,7 +5606,7 @@ }, }, .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, + .write = spi_aai_write, .read = spi_chip_read, .voltage = {2700, 3600}, }, @@ -5708,7 +5708,7 @@ }, }, .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, + .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, .voltage = {2700, 3600}, }, @@ -5744,7 +5744,7 @@ }, }, .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, + .write = spi_aai_write, .read = spi_chip_read, .voltage = {2700, 3600}, }, @@ -5774,7 +5774,7 @@ }, }, .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, + .write = spi_chip_write_1, /* AAI supported, but opcode is 0xAF */ .read = spi_chip_read, .voltage = {3000, 3600}, }, @@ -5810,7 +5810,7 @@ }, }, .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, + .write = spi_aai_write, .read = spi_chip_read, .voltage = {2700, 3600}, }, @@ -5846,7 +5846,7 @@ }, }, .unlock = spi_disable_blockprotect, - .write = spi_chip_write_1, + .write = spi_aai_write, .read = spi_chip_read, .voltage = {2700, 3600}, },

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Re: [flashrom] AMD - SP5100 - take SPI ownership (1/2)
by Stefan Tauner 01 Aug '11

01 Aug '11

hello frederic, thanks for your patches. i have not looked at it in detail yet (i'll leave that to those who are more familiar with the IMC problem), but i have spotted quite some coding style issues. it would be great if you could fix those. i'll explain what i noticed inline. On Mon, 1 Aug 2011 10:45:24 +0200 frederic.temporelli(a)bull.net wrote: > diff -ur ../flashrom-0.9.4-r1394/sb600spi.c ./sb600spi.c > --- ../flashrom-0.9.4-r1394/sb600spi.c 2011-05-11 13:07:07.000000000 -0400 > +++ ./sb600spi.c 2011-07-29 22:45:48.693159918 -0400 > @@ -5,6 +5,8 @@ > * Copyright (C) 2008 Joe Bao <Zheng.Bao(a)amd.com> > * Copyright (C) 2008 Advanced Micro Devices, Inc. > * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger > + * Copyright (C) 2011 Bull SAS > + * (Written by Frederic Temporelli <frederic.temporelli(a)bull.net> for Bull SAS ) space before the closing parenthesis > * > * This program is free software; you can redistribute it and/or modify > * it under the terms of the GNU General Public License as published by > @@ -43,6 +45,63 @@ > > static uint8_t *sb600_spibar = NULL; > > +/* reference to LPC/SPI PCI device, > + * requested for requesting/releasing > + * device access, shared with IMC > + */ > +struct pci_dev *lpc_isa_bridge = NULL; > + > + > +/* > + * avoid interaction from IMC while we are working with LPC/SPI > + * this is done by requesting HostOwnLPC register (LPC_ISA_BRIDGE, write 1 in register 0x98) line too long, please split (and some punctuation would increase readability then) > + * then we have to read this register. > + * Loop until we have the ownership > + * see doc AMD 44413 - AMD SP5100 Register Reference Guide > + */ > +static int resquest_lpc_ownership (void) > +{ > + uint8_t tmp; > + int i = 0; > + > + if (lpc_isa_bridge == NULL) > + return 1; > + > + pci_write_byte(lpc_isa_bridge, 0x98, 0x01); > + > + while ( (tmp = pci_read_byte (lpc_isa_bridge, 0x98)) == 0 ){ we don't use inner space around clauses like here '( (' and '0 )' usually. also there is a space missing between ')' and '{' > + pci_write_byte(lpc_isa_bridge, 0x98, 0x01); > + if (++i > 1024) { > + msg_perr("IMC did not release flash.\n"); > + return 1; > + } > + > + } > + msg_pspew("flash ownership after %i cycles.\n", i); > + i = 0; please drop the line above completely > + return 0; > +} > + > + one line break between functions please > +/* > + * release LPC/SPI ownership (IMC can access to these resources) > + * this is done by releasing HostOwnLPC register > + * (write 0 in register 0x98) > + */ > +static int release_lpc_ownership (void) > +{ > + > + if (lpc_isa_bridge == NULL) > + return 1; > + spaces instead of tabs in the following lines: > + pci_write_byte(lpc_isa_bridge, 0x98, 0x00); > + > + msg_pspew("flash ownership is released.\n"); > + return 0; > +} > + > + > + one line break between functions please > static void reset_internal_fifo_pointer(void) > { > mmio_writeb(mmio_readb(sb600_spibar + 2) | 0x10, sb600_spibar + 2); > @@ -93,6 +152,8 @@ > const unsigned char *writearr, unsigned char *readarr) > { > int count; spaces instead of tabs > + int result = 0; > + > /* First byte is cmd which can not being sent through FIFO. */ > unsigned char cmd = *writearr++; > unsigned int readoffby1; > @@ -103,16 +164,26 @@ > msg_pspew("%s, cmd=%x, writecnt=%x, readcnt=%x\n", > __func__, cmd, writecnt, readcnt); > > + if (resquest_lpc_ownership() != 0){ space missing between ')' and '{' > + result = SPI_PROGRAMMER_ERROR; > + msg_pinfo("can't take ownership of LPC/SPI"); > + goto return_status; > + } > + > + > if (readcnt > 8) { > msg_pinfo("%s, SB600 SPI controller can not receive %d bytes, " > "it is limited to 8 bytes\n", __func__, readcnt); > - return SPI_INVALID_LENGTH; > + > + result = SPI_INVALID_LENGTH; > + goto return_status; > } > > if (writecnt > 8) { > msg_pinfo("%s, SB600 SPI controller can not send %d bytes, " > "it is limited to 8 bytes\n", __func__, writecnt); > - return SPI_INVALID_LENGTH; > + result = SPI_INVALID_LENGTH; > + goto return_status; > } > > /* This is a workaround for a bug in SB600 and SB700. If we only send > @@ -142,7 +213,10 @@ > * the FIFO pointer to the first byte we want to send. > */ > if (reset_compare_internal_fifo_pointer(writecnt)) > - return SPI_PROGRAMMER_ERROR; > + { the '{' should be in the same line as the 'if' > + result = SPI_PROGRAMMER_ERROR; > + goto return_status; > + } > > msg_pspew("Executing: \n"); > execute_command(); > @@ -159,7 +233,10 @@ > * Usually, the chip will respond with 0x00 or 0xff. > */ > if (reset_compare_internal_fifo_pointer(writecnt + readcnt)) > - return SPI_PROGRAMMER_ERROR; > + { here too > + result = SPI_PROGRAMMER_ERROR; > + goto return_status; > + } > > /* Skip the bytes we sent. */ > msg_pspew("Skipping: "); > @@ -168,8 +245,11 @@ > msg_pspew("[%02x]", cmd); > } > msg_pspew("\n"); > - if (compare_internal_fifo_pointer(writecnt)) > - return SPI_PROGRAMMER_ERROR; > + if (compare_internal_fifo_pointer(writecnt)){ missing space > + > + result = SPI_PROGRAMMER_ERROR; > + goto return_status; > + } > > msg_pspew("Reading: "); > for (count = 0; count < readcnt; count++, readarr++) { > @@ -177,8 +257,11 @@ > msg_pspew("[%02x]", *readarr); > } > msg_pspew("\n"); > - if (reset_compare_internal_fifo_pointer(readcnt + writecnt)) > - return SPI_PROGRAMMER_ERROR; > + if (reset_compare_internal_fifo_pointer(readcnt + writecnt)) { > + > + result = SPI_PROGRAMMER_ERROR; > + goto return_status; > + } > > if (mmio_readb(sb600_spibar + 1) != readwrite) { > msg_perr("Unexpected change in SB600 read/write count!\n"); > @@ -186,10 +269,12 @@ > "causes random corruption.\nPlease stop all " > "applications and drivers and IPMI which access the " > "flash chip.\n"); > - return SPI_PROGRAMMER_ERROR; > + result = SPI_PROGRAMMER_ERROR; > } > > - return 0; > +return_status: > + release_lpc_ownership(); > + return result; > } > > static const struct spi_programmer spi_programmer_sb600 = { > @@ -211,6 +296,9 @@ > "Reserved", "33", "22", "16.5" > }; > > + > + lpc_isa_bridge = dev; > + > /* Read SPI_BaseAddr */ > tmp = pci_read_long(dev, 0xa0); > tmp &= 0xffffffe0; /* remove bits 4-0 (reserved) */ -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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adding support for 82545GM (et al).
by Stefan Tauner 01 Aug '11

01 Aug '11

friend of mine allowed me to play with his dual fiber nic remotely. it is an Intel PRO/1000 MF PCI-X card based on the 82545GM controller: http://geizhals.at/119043 http://download.intel.com/design/network/datashts/82545gm_ds.pdf http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf i was able to probe the attached chip (SST39VF020) after adding the PCI ID, but reads returned all 0xFF. i need to verify that this is not correct, but i am quite certain that there is a working bootrom in there. i have not looked too much at the code, commit log, ml archive or the datasheet yet, maybe there is something obvious for you...? why does flashrom detect the card twice although there is only one in there? should we add a maximum size field to the pcidev_status arrays that hold pci programmers? i wanted to do something like that ever since i discovered that the 3com nic have a 128 kB limit (after borrowing a bunch of them to access a 256 kB chip...). PS: i have also tried to add the other nic's PCI ID (82562EZ-based) to no avail. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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AMD - SP5100 - take SPI ownership (2/2)
by frederic.temporelli＠bull.net 01 Aug '11

01 Aug '11

Hello, Here's the second patch that will remove the write protection. If this patch isn't applied, even if SPI owenrship is ok, flashrom won't be able to write BIOS Best regards -- Fred

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AMD - SP5100 - take SPI ownership (1/2)
by frederic.temporelli＠bull.net 01 Aug '11

01 Aug '11

Hello, Here's a patch for using SPI from AMD SouthBridge (SB700, SP5100, ...) without having issue with Integrated MicroControler (IMC) . This issue has been reported by Carl-Daniel Hailfinger in ChangeSet 1173 http://flashrom.org/trac/flashrom/changeset/1173 AMD is now providing details about SP5100 register in document 44413: http://support.amd.com/us/Embedded_TechDocs/44413.pdf In this document (rev 3.02), we can see that a register is in charge of managing access to LPC (p 271 and 283) => with this patch, we take LPC ownership before each set of commands to SPI. Ownership is released when command is done. I did a test by reading BIOS in flash, and this is working nicely (without this patch, I wasn't able to read the BIOS). Now, I don't have components to restore the BIOS in case of failure, so write test hasn't been done (yet)... Note: this patch doesn't remove the write protection, I'll sent a second patch which will remove this protection Best regards -- Fred

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flashrom August 2011