AAI on SST25VF016B

[Noé Rubinstein]

Hi,

I was looking for some way to decrease the flashing time with Flashrom
for a 2MB SST SST25VF016B chip with a Dediprog SF100 programmer. After
taking a look at the datasheet, stefanct suggested to try to change the
write function for SST25VF016B to spi_aai_write, instead of
spi_chip_write_1.

(I had tried changing it to spi_chip_write_256 some time ago.
Unsurprisingly, the results were not so good)

I did some benchmark by writing random data on a chip already filled
with random data. I attached the results. I've run the benchmark two
times and got similar results on the two runs.

In short: 
- with spi_aai_write, writing takes 56 minutes and seems to work reliably
- with spi_chip_write_1, writing takes 143 minutes

I also ran the test with -VV but the log is so big I can't possibly
send it to the mailing list. Here it is:
http://neetwork.net/up/misc/bench_vv

I also attached the patch I applied to Flashrom's trunk.

-- 
Noé Rubinstein
Proformatique (groupe Avencall) - XiVO IPBX OpenHardware
10 bis, rue Lucien VOILIN - 92800 Puteaux

[Stefan Tauner]

On Fri, 29 Jul 2011 17:26:30 +0200
Noé Rubinstein <[e-mail]> wrote:
> Hi,
>
> I was looking for some way to decrease the flashing time with Flashrom
> for a 2MB SST SST25VF016B chip with a Dediprog SF100 programmer. After
> taking a look at the datasheet, stefanct suggested to try to change the
> write function for SST25VF016B to spi_aai_write, instead of
> spi_chip_write_1.
>
> (I had tried changing it to spi_chip_write_256 some time ago.
> Unsurprisingly, the results were not so good)
>
> I did some benchmark by writing random data on a chip already filled
> with random data. I attached the results. I've run the benchmark two
> times and got similar results on the two runs.
>
> In short: 
> - with spi_aai_write, writing takes 56 minutes and seems to work reliably
> - with spi_chip_write_1, writing takes 143 minutes
>
> I also ran the test with -VV but the log is so big I can't possibly
> send it to the mailing list. Here it is:
> http://neetwork.net/up/misc/bench_vv
>
> I also attached the patch I applied to Flashrom's trunk.

hello and thanks for the patch and testing!

great improvement, in relative terms at least ;)
regarding your patch... i just noticed that joshua has already posted a
patch for this and also some other sst chips:
http://patchwork.coreboot.org/patch/2065/

it would be great if you could look at the datasheets of all those
chips touched in the patch and verify what joshua did. to do this you
need to check if the chips support aai and if the opcode listed for
this is 0xad. if everything is correct please reply with an acked-by
like it is usually done (see other threads).

be aware though that applying this old patch most probably will either
fail (i.e. "patch" will bail out) or change the wrong lines. so an
updated patch would even be cooler, but is not necessary for the ack.

-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner

[PATCH] AAI on SST chips (was: Re: AAI on SST25VF016B)

[Noé Rubinstein]

Use AAI for some SST chips

Patch updated, based on Joshua Roys' patch
http://patchwork.coreboot.org/patch/2065/
I double checked against the datasheets. Also wrapped the comments to
respect 80-columns line width.

Use AAI:
SST25VF016B
SST25VF040B{,.REMS}
SST25VF080B

Datasheets say AAI is supported, but via a different opcode:
SST25VF040.REMS
SST25LF040A.RES

Signed-off-by: Noé Rubinstein <[e-mail]>
---
Index: flashchips.c
===================================================================
--- flashchips.c	(revision 1401)
+++ flashchips.c	(working copy)
@@ -5606,7 +5606,7 @@
 			},
 		},
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_1,
+		.write		= spi_aai_write,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
 	},
@@ -5708,7 +5708,8 @@
 			},
 		},
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_1,
+		.write		= spi_chip_write_1, /* datasheet says AAI using
+						       0xAF ? */
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
 	},
@@ -5744,7 +5745,7 @@
 			},
 		},
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_1,
+		.write		= spi_aai_write,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
 	},
@@ -5774,7 +5775,8 @@
 			},
 		},
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_1,
+		.write		= spi_chip_write_1, /* datasheet says AAI using
+						       0xAF ? */
 		.read		= spi_chip_read,
 		.voltage	= {3000, 3600},
 	},
@@ -5810,7 +5812,7 @@
 			},
 		},
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_1,
+		.write		= spi_aai_write,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
 	},
@@ -5846,7 +5848,7 @@
 			},
 		},
 		.unlock		= spi_disable_blockprotect,
-		.write		= spi_chip_write_1,
+		.write		= spi_aai_write,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
 	},

[PATCH] AAI on SST chips

[Joshua Roys]

On 08/01/2011 06:10 AM, Noé Rubinstein wrote:
> Use AAI for some SST chips
>
> Patch updated, based on Joshua Roys' patch
> http://patchwork.coreboot.org/patch/2065/
> I double checked against the datasheets. Also wrapped the comments to
> respect 80-columns line width.
>
> Use AAI:
> SST25VF016B
> SST25VF040B{,.REMS}
> SST25VF080B
>
> Datasheets say AAI is supported, but via a different opcode:
> SST25VF040.REMS
> SST25LF040A.RES
>
> Signed-off-by: Noé Rubinstein <[e-mail]>

Signed-off-by: Joshua Roys <[e-mail]>
> ---
> Index: flashchips.c
> ===================================================================
> --- flashchips.c	(revision 1401)
> +++ flashchips.c	(working copy)
> @@ -5606,7 +5606,7 @@
>       	},
>       },
>       .unlock		= spi_disable_blockprotect,
> -		.write		= spi_chip_write_1,
> +		.write		= spi_aai_write,
>       .read		= spi_chip_read,
>       .voltage	= {2700, 3600},
>   },
> @@ -5708,7 +5708,8 @@
>       	},
>       },
>       .unlock		= spi_disable_blockprotect,
> -		.write		= spi_chip_write_1,
> +		.write		= spi_chip_write_1, /* datasheet says AAI using
> +						       0xAF ? */
>       .read		= spi_chip_read,
>       .voltage	= {2700, 3600},
>   },
> @@ -5744,7 +5745,7 @@
>       	},
>       },
>       .unlock		= spi_disable_blockprotect,
> -		.write		= spi_chip_write_1,
> +		.write		= spi_aai_write,
>       .read		= spi_chip_read,
>       .voltage	= {2700, 3600},
>   },
> @@ -5774,7 +5775,8 @@
>       	},
>       },
>       .unlock		= spi_disable_blockprotect,
> -		.write		= spi_chip_write_1,
> +		.write		= spi_chip_write_1, /* datasheet says AAI using
> +						       0xAF ? */
>       .read		= spi_chip_read,
>       .voltage	= {3000, 3600},
>   },
> @@ -5810,7 +5812,7 @@
>       	},
>       },
>       .unlock		= spi_disable_blockprotect,
> -		.write		= spi_chip_write_1,
> +		.write		= spi_aai_write,
>       .read		= spi_chip_read,
>       .voltage	= {2700, 3600},
>   },
> @@ -5846,7 +5848,7 @@
>       	},
>       },
>       .unlock		= spi_disable_blockprotect,
> -		.write		= spi_chip_write_1,
> +		.write		= spi_aai_write,
>       .read		= spi_chip_read,
>       .voltage	= {2700, 3600},
>   },
>
> _______________________________________________
> flashrom mailing list
> [e-mail]
> http://www.flashrom.org/mailman/listinfo/flashrom

[PATCH] AAI on SST chips

[Stefan Tauner]

On Mon, 01 Aug 2011 07:43:38 -0400
Joshua Roys <[e-mail]> wrote:
> On 08/01/2011 06:10 AM, Noé Rubinstein wrote:
> > Use AAI for some SST chips
> >
> > Patch updated, based on Joshua Roys' patch
> > http://patchwork.coreboot.org/patch/2065/
> > I double checked against the datasheets. Also wrapped the comments to
> > respect 80-columns line width.
> >
> > Use AAI:
> > SST25VF016B
> > SST25VF040B{,.REMS}
> > SST25VF080B
> >
> > Datasheets say AAI is supported, but via a different opcode:
> > SST25VF040.REMS
> > SST25LF040A.RES
> >
> > Signed-off-by: Noé Rubinstein <[e-mail]>
>
> Signed-off-by: Joshua Roys <[e-mail]>

hello you two,

of course joshua deserves the signed-off for his initial patch. i have
reverted the line wrapping, because we dont use that in flashchips.c
afaics (and it does not make sense anyway imo :)

i have now committed the result in r1402 as
Signed-off-by: Joshua Roys <[e-mail]>
Rebased and
Acked-by: Noé Rubinstein <[e-mail]>

i hope that is ok for both of you (it has to ;) and want to thank you
both for your work of digging through the datasheets!

-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner

[PATCH] AAI on SST chips

[Tim Small]

On 01/08/11 11:10, Noé Rubinstein wrote:
> +		.write		= spi_chip_write_1, /* datasheet says AAI using
> +						       0xAF ? */
> +		.write		= spi_chip_write_1, /* datasheet says AAI using
> +						       0xAF ? */

These (SST25LF020A / SST25LF040A and SST25VF040) have an "AAI" mode
which only writes a single byte at a time, not two.

The AT26F004 has what looks like the same mode to me (same 0xAF opcode
too), and I wrote (and have tested) code to support that (
spi_at26_write_sequential ) in my AT26F004 patch (currently in the patch
queue - http://patchwork.coreboot.org/patch/3186/ ).

Googling for

+spi 0xAF

shows up a few other implementations (including one in the Linux kernel,
by the look of it).

Tim.