ck804 enable improvement

[Jonathan A. Kollasch]

Hi,

Attached is a proposed patch for improving the ck804 chipset enable.

Comments?

	Jonathan Kollasch

[Jonathan A. Kollasch]

Ensure all read and write locks are disabled on ck804.

Signed-off-by: Jonathan Kollasch <[e-mail]>

[Stefan Reinauer]

* Jonathan A. Kollasch <[e-mail]> [110120 20:04]:
> Ensure all read and write locks are disabled on ck804.
>
> Signed-off-by: Jonathan Kollasch <[e-mail]>
> Index: chipset_enable.c
> ===================================================================
> --- chipset_enable.c	(revision 1253)
> +++ chipset_enable.c	(working copy)
> @@ -764,8 +764,50 @@
>
> static int enable_flash_ck804(struct pci_dev *dev, const char *name)
>  {
> +	uint32_t segctrl;
> +	int segreg;
>   uint8_t old, new;
>
> +	for (segreg = 0x8c; segreg <= 0x97; segreg += 4) {

In steps of 4 this would be 8c, 90 and 94. So it would make sense to
write <= 0x94 or < 0x98 as that would be the next offset that's reached.

Otherwise:
Acked-by: Stefan Reinauer <[e-mail]>

But you might want to wait for some final words from Carl-Daniel.

Stefan

[PATCH 1/2] Nvidia CK804 enable improvement

[Stefan Tauner]

Ensure all read and write locks are disabled on ck804 (and MCP51).

Currently the same chipset enable is used for MCP51 (nForce 430) too.
There have been reports of successful writes with its variations
(e.g. A8N-LA (Nagami-GL8E)), but the chipset enables were not tagged as OK.
Due to the new "unsupported chipset"-message we will get success reports in
the case this patch does not break anything on the MCP51-based boards.

Tested on CK804 and
Signed-off-by: Jonathan Kollasch <[e-mail]>
which was previously
Acked-by: Stefan Reinauer <[e-mail]>

Rebasing, rephrasing and making errors non-fatal is
Signed-off-by: Stefan Tauner <[e-mail]>
---
 chipset_enable.c |   50 ++++++++++++++++++++++++++++++++++++++++++++++----
 1 files changed, 46 insertions(+), 4 deletions(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 97001a7..294007d 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -799,14 +799,56 @@ static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
 
 static int enable_flash_ck804(struct pci_dev *dev, const char *name)
 {
+	uint32_t segctrl;
+	int segreg;
 	uint8_t old, new;
 
-	pci_write_byte(dev, 0x92, 0x00);
-	if (pci_read_byte(dev, 0x92) != 0x00) {
-		msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
-			  "(WARNING ONLY).\n", 0x92, 0x00, name);
+	for (segreg = 0x8c; segreg < 0x98; segreg += 4) {
+		segctrl = pci_read_long(dev, segreg);
+		if ((segctrl & 0x33333333) != 0x00000000) {
+			/* reads or writes are locked */
+			if ((segctrl & 0xCCCCCCCC) == 0x00000000) {
+				/* we can unlock */
+				msg_pdbg("Unlocking in 0x%02x.\n", segreg);
+				pci_write_long(dev, segreg, 0x00000000);
+			} else {
+				msg_pinfo("Can't unlock in 0x%02x, disabling "
+					  "writes (reads may also fail).\n",
+					  segreg);
+				programmer_may_write = 0;
+				goto ck804_lockbits_done;
+			}
+		}
+		segctrl = pci_read_long(dev, segreg);
+		if ((segctrl & 0x33333333) != 0x00000000) {
+			msg_pinfo("Still locked in 0x%02x (0x%08x), disabling "
+				  "writes (reads may also fail).\n",
+				  segreg, segctrl);
+			programmer_may_write = 0;
+			goto ck804_lockbits_done;
+		}
+	}
+	segctrl = pci_read_byte(dev, 0x8a);
+	if ((segctrl & 0x3) != 0x0) {
+		if ((segctrl & 0xc) == 0x0) {
+			msg_pdbg("Unlocking in 0x%02x\n", 0x8a);
+			pci_write_byte(dev, 0x8a, segctrl & 0xf0);
+		} else {
+			msg_pinfo("Can't unlock in 0x%02x, disabling writes "
+				  "(reads may also fail).\n", 0x8a);
+			programmer_may_write = 0;
+			goto ck804_lockbits_done;
+		}
+	}
+	segctrl = pci_read_byte(dev, 0x8a);
+	if ((segctrl & 0x3) != 0x0) {
+		msg_pinfo("Still locked in 0x%02x (0x%08x), disabling "
+			  "writes (reads may also fail).\n", segreg, segctrl);
+		programmer_may_write = 0;
+		goto ck804_lockbits_done;
 	}
 
+ck804_lockbits_done:
 	old = pci_read_byte(dev, 0x88);
 	new = old | 0xc0;
 	if (new != old) {
-- 
1.7.1