flashrom August 2010

flashrom@flashrom.org

77 participants
209 discussions

ASUS P5GD2 Premium
by Roberto Malinverni 14 Sep '10

14 Sep '10

Base Board Information from DMIDECODE: Manufacturer: ASUSTeK Computer INC. Product Name: P5GD2-Premium Version: Rev 1.xx Link to official firmware: I can't provide it due to the way Asus's site works... (I can upload my copy somewhere if you want) You have to search here http://support.asus.com/download/download.aspx?SLanguage=en-us filling the 3 search fields with: "motherboard" "socket 775" "p5gd2 premium" Attached are the requested logs.

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ASUS P4SC-E Board Enable / IT8707F support
by Mattias Mattsson 13 Sep '10

13 Sep '10

Hi, The attached patch adds board enable for the ASUS P4SC-E board. It does this by setting bits 3..2 of register 0x24 on the super i/o chip, while keeping bit 3 of register 0x23 set while manipulating the first register. I have no idea what this actually means since no public datasheet is available, but this is how the vendor BIOS does it. Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write all work. Matching on NB/SB. lspci/superio output: http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html The ITE IT8707F chip seems to have been manufactured exclusively for ASUS: http://lists.lm-sensors.org/pipermail/lm-sensors/2002-October/001260.html In the past (before it's release) the IT8707F was listed on the ITE website: http://web.archive.org/web/20000510121435/http://www.ite.com.tw/productInfo… By looking through some ASUS manuals I have found that at least 17 ASUS boards is using this chip: P4S133/-VM P4S333/-FX/-M/-VF/-VM P4S533/-E/-VM P4SC/-E/-EA ("Terminator P4" barebone series) P4SDR-VM P4SE/U2 P4SGL-VM The vendor BIOS of these boards all use the same super i/o flash enable code described above. The following boards additionally clears bit 6 of IDX F4, LDN 7 in the flash enabling routine: P4S133, P4S333, P4S533, P4S533-E, P4SE, P4SE/U2. (Not included in this patch since I don't own any of these.) Many thanks to Reinder de Haan for help with reverse engineering this! Signed-off-by: Mattias Mattsson <vitplister(a)gmail.com>

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[PATCH] Fix a bitmask in it87spi_probe.
by Joshua Roys 13 Sep '10

13 Sep '10

Hello, I think the first shift should be a 0 since the one below it is 1, then 2, then 3, etc. Signed-off-by: Joshua Roys <roysjosh(a)gmail.com> Thanks, Josh

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Re: [flashrom] [PATCH] Board enable for GA-8PE667 Ultra 2
by Thomas Kalka 10 Sep '10

10 Sep '10

Acked-by: Thomas Kalka <thomas.kalka(a)googlemail.com> On Fri, Aug 13, 2010 at 12:39 PM, Michael Karcher < flashrom(a)mkarcher.dialup.fu-berlin.de> wrote: > I had to use the USB controller in the board enable because all other > subsystem IDs are having vendor: Gigabyte but mostly copy the Intel > product IDs. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > --- > board_enable.c | 2 ++ > print.c | 1 + > 2 files changed, 3 insertions(+), 0 deletions(-) > > diff --git a/board_enable.c b/board_enable.c > index 307feeb..0f72110 100644 > --- a/board_enable.c > +++ b/board_enable.c > @@ -1381,6 +1381,7 @@ static int intel_ich_gpio26_raise(void) > /* > * Suited for: > * - P4SD-LA (HP OEM): i865 + ICH5 > + * - GIGABYTE GA-8PE667 Ultra 2: socket 478 + i845PE + ICH4 > */ > static int intel_ich_gpio32_raise(void) > { > @@ -1779,6 +1780,7 @@ const struct board_pciid_enable board_pciid_enables[] > = { > {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, > NULL, "epox", "ep-bx3", "EPoX", "EP-BX3", > 0, OK, board_epox_ep_bx3}, > {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, > NULL, NULL, NULL, "GIGABYTE", "GA-7ZM", > 512, OK, NULL}, > {0x8086, 0x244b, 0x8086, 0x2442, 0x8086, 0x2445, 0x1458, 0xa002, > NULL, NULL, NULL, "GIGABYTE", "GA-8IRML", > 0, OK, intel_ich_gpio25_raise}, > + {0x8086, 0x24c3, 0x1458, 0x24c2, 0x8086, 0x24cd, 0x1458, 0x5004, > NULL, NULL, NULL, "GIGABYTE", "GA-8PE667 Ultra > 2", 0, OK, intel_ich_gpio32_raise}, > {0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, > NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", > 0, OK, nvidia_mcp_gpio21_raise}, > {0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1678, 0x103c, 0x703e, > NULL, "hp", "dl145_g3", "HP", "DL145 G3", > 0, OK, board_hp_dl145_g3_enable}, > {0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1648, 0x103c, 0x310f, > NULL, "hp", "dl165_g6", "HP", "DL165 G6", > 0, OK, board_hp_dl165_g6_enable}, > diff --git a/print.c b/print.c > index 5946a6c..32aba44 100644 > --- a/print.c > +++ b/print.c > @@ -393,6 +393,7 @@ const struct board_info boards_known[] = { > B("GIGABYTE", "GA-7VT600", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=1666", NULL), > B("GIGABYTE", "GA-7ZM", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine > if you remove jumper JP9 on the board and disable the flash protection BIOS > option."), > B("GIGABYTE", "GA-8IRML", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL), > + B("GIGABYTE", "GA-8PE667 Ultra 2", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL), > B("GIGABYTE", "GA-965P-DS4", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), > B("GIGABYTE", "GA-EP35-DS3L", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=2778", NULL), > B("GIGABYTE", "GA-EX58-UD4P", 1, " > http://www.gigabyte.com/products/product-page.aspx?pid=2986", NULL), > -- > 1.7.1 > >

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Gigabyte ga-k8n51gmf-9
by Tefnet Developers 07 Sep '10

07 Sep '10

Hi, as suggested on IRC, I am sending here information about a motherboard with bios that cannot be atm flashed with flashrom. Motherboard manufacturer: Gigabyte Motherboard model: ga-k8n51gmf-9 Motherboard rev: not specified BIOS update URI: http://download.gigabyte.us/FileList/BIOS/motherboard_bios_ga-k8n51gmf-9(rh… Output of flashrom -w n51gmf9.f8: This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF004A/B" (512 KB, FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x24, failed byte count from 0x00000000-0x0000ffff: 0xfefa ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! I have attached output of commands as suggested on the IRC channel. thanks and bye, Filip Zyzniewski Tefnet

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Successful flash of Powerspec 8731
by Steven Zakulec 05 Sep '10

05 Sep '10

Hi, I was successfully able to probe, read, erase, and write the Powerspec 8731 machine I have (temporarily anyway). I can't remember where the manufacturer BIOS updates are (not the same place as the drivers), so I just read the current BIOS, erased it, and then wrote it back successfully. If this isn't sufficient, please tell me and I'll track down an actual BIOS update instead. The site for the machine is here: http://www.powerspec.com/systems/archives/system_archive.phtml?selection=87…

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[PATCH] Mark SST39SF040 as TEST_OK_PREW
by David Borg 05 Sep '10

05 Sep '10

Mark the SST39SF040 as tested ok for all operations. (Tested on Asus P4S800-MX) Sorry for spam. Kindly ignore the previous email. Signed-off-by: David Borg <borg.db(a)gmail.com> Regards, David Index: flashchips.c =================================================================== --- flashchips.c (revision 1145) +++ flashchips.c (working copy) @@ -5183,7 +5183,7 @@ .total_size = 512, .page_size = 4096, .feature_bits = FEATURE_EITHER_RESET, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_jedec, .probe_timing = 1, /* 150 ns */ .block_erasers =

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SST39SF512 confirmed working for all functions
by Alec Wright 05 Sep '10

05 Sep '10

Logs attached, and also available at http://alecjw.no-ip.org/SST39SF512.tar.gz

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Successful flash
by Ed Driesen 05 Sep '10

05 Sep '10

Dear, I managed to flash a shuttle X50 barebone with chipset "Eon EN25F80" Reading probing writing & verifieing seems to work. Since this chiset still has some "?" , I'm letting you know. If you like any additional info, just let me know. Regards, Ed -- ------------------------------------------------------------------------ /Open Minded Technology & Services/ Ed Driesen No-nonsense informatica voor thuis en kantoor GSM 0478 26 72 93 ed(a)OMTS.be BTW BE 0897 866 147* * ------------------------------------------------------------------------

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[Fwd: Update Board Testing List]
by Michael Karcher 05 Sep '10

05 Sep '10

[This message has been edited by a list moderator to include text instead of photographic screen shots, the flash chip image has been deleted, it shows the flash chip mentioned in the body] -------- Forwarded message -------- > Von: Pendic Peter <nigma(a)bluewin.ch> > An: flashrom(a)flashrom.org > Betreff: Update Board Testing List > Datum: Thu, 5 Aug 2010 20:46:46 +0200 > > Hello > > Board: Asus K8N4-E SE > Board-Ver: 1.02G > Flash-Chip: SST 49LF080A (from Tyan Thunder S2933) > All done without Problems, see pictures. > Thank you for your wonderful software. > > > > Regards > Peter [flashrom-verify.jpg] root@grml /tmp/bios # flashrom --verify 2933V203.ROM flashrom v0.9.1-r946 No coreboot table found. Found ITE Super I/O id 8712 Found chipset "NVIDIA CK804", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000root@grml /tmp/bios # flashrom --verify 2933V203.ROM flashrom v0.9.1-r946 No coreboot table found. Found ITE Super I/O id 8712 Found chipset "NVIDIA CK804", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. root@grml /tmp/bios # [flashrom-without-options.jpg] root@grml /tmp/bios # flashrom flashrom v0.9.1-r946 No coreboot table found. Found ITE Super I/O id 8712 Found chipset "NVIDIA CK804", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000root@grml /tmp/bios # flashrom --verify 2933V203.ROM flashrom v0.9.1-r946 No coreboot table found. Found ITE Super I/O id 8712 Found chipset "NVIDIA CK804", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. root@grml /tmp/bios # [flashrom-write.jpg] root@grml /tmp/bios # flashrom --write 2933V203.ROM flashrom v0.9.1-r946 No coreboot table found. Found ITE Super I/O id 8712 Found chipset "NVIDIA CK804", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000root@grml /tmp/bios # flashrom --verify 2933V203.ROM flashrom v0.9.1-r946 No coreboot table found. Found ITE Super I/O id 8712 Found chipset "NVIDIA CK804", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... SUCCESS. Programming page: address: 0x000ff000 COMPLETE. Verifying flash... VERIFIED. flashrom --write 2933V203.ROM 27.07s user 0.06s system 99% cpu 27.300 total root@grml /tmp/bios #

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flashrom August 2010