July 2010 - flashrom - mail.coreboot.org

Re: [flashrom] [PATCH] Don't ignore wait_82802ab() return value
by Stefan Reinauer June 19, 2011

June 19, 2011

On 5/14/10 3:06 PM, Michael Karcher wrote: > Am Freitag, den 14.05.2010, 14:48 +0200 schrieb Stefan Reinauer: > >> On 4/16/10 6:21 PM, Stefan Reinauer wrote: >> >>> Look at the return value of wait_82802ab() >>> Index: sst49lfxxxc.c >>> =================================================================== >>> --- sst49lfxxxc.c (revision 993) >>> +++ sst49lfxxxc.c (working copy) >>> @@ -84,6 +84,7 @@ >>> chip_writeb(0xD0, bios + address); >>> >>> status = wait_82802ab(bios); >>> + print_status_82802ab(status); >>> > [...] > basically a good idea, but printing one status dump per erased block > seems a bit excessive, even in verbose mode, as there are some chips > with 4K sector size. Could you limit status printing to "status != > 0x80", as this is "ready, no error bits"? > That's what the 82802ab and sharp lhf00l04 do, too. So if you think the behavior should be changed, you should change it in all three places. Stefan

4 4

[PATCH] flashchips.c: Typo. s/don't/doesn't/
by Paul Menzel June 19, 2011

June 19, 2011

Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- flashchips.c | 52 ++++++++++++++++++++++++++-------------------------- 1 files changed, 26 insertions(+), 26 deletions(-) diff --git a/flashchips.c b/flashchips.c index a82c373..70a4ff1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -155,7 +155,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -181,7 +181,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -233,7 +233,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -259,7 +259,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -1230,7 +1230,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -1261,7 +1261,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRW, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -1292,7 +1292,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -2280,7 +2280,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -2311,7 +2311,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -2931,7 +2931,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -2963,7 +2963,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -2995,7 +2995,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -3026,7 +3026,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_OK_PRW, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -3057,7 +3057,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (mx29f002.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (mx29f002.c) */ .block_erasers = { { @@ -3917,7 +3917,7 @@ struct flashchip flashchips[] = { .feature_bits = 0, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst28sf040.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst28sf040.c) */ .block_erasers = { { @@ -4368,7 +4368,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -4431,7 +4431,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -4463,7 +4463,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -4640,7 +4640,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PRW, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -5040,7 +5040,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_2AA | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_jedec, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (am29f040b.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (am29f040b.c) */ .block_erasers = { { @@ -5067,7 +5067,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_ADDR_SHIFTED | FEATURE_EITHER_RESET, .tested = TEST_UNTESTED, .probe = probe_m29f400bt, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (m29f400bt.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (m29f400bt.c) */ .block_erasers = { { @@ -5313,7 +5313,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (sst49lfxxxc.c) */ .block_erasers = { { @@ -5345,7 +5345,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_UNTESTED, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -5372,7 +5372,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -5399,7 +5399,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_REGISTERMAP, .tested = TEST_OK_PR, .probe = probe_82802ab, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (82802ab.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (82802ab.c) */ .block_erasers = { { @@ -6010,7 +6010,7 @@ struct flashchip flashchips[] = { .feature_bits = FEATURE_LONG_RESET, .tested = TEST_OK_PRW, .probe = probe_w29ee011, - .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (w29ee011.c) */ + .probe_timing = TIMING_IGNORED, /* routine doesn't use probe_timing (w29ee011.c) */ .block_erasers = { { -- 1.7.1

3 3

[PATCH][FIXME] Add missing Intel/VIA chipset IDs
by Carl-Daniel Hailfinger June 13, 2011

June 13, 2011

This patch is unfinished, and _you_ can finish it! Reorder chipset entries by PCI ID instead of by name. Makes it easier to keep track of what's already there. Add VIA VX855. Add countless Intel IDs (unfinished). If you have some spare time, please take a look at all the new Intel entries which have no name and no chipset enable function. They all represent LPC bridges I found in the PCI ID database. Intel may have deleted the names for some of the IDs in the database because these chips were "Engineering samples", but I know of at least one engineering sample which was used in production boards. You can add a comment to the entry or use a name that contains "ICH... Engineering Sample". Your choice. Patch does not compile because the Intel entries are unfinished. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-chipset_support_intel_via/chipset_enable.c =================================================================== --- flashrom-chipset_support_intel_via/chipset_enable.c (Revision 987) +++ flashrom-chipset_support_intel_via/chipset_enable.c (Arbeitskopie) @@ -1285,69 +1285,51 @@ return 0; } -/* Please keep this list alphabetically sorted by vendor/device. */ +/* Please keep this list numerically sorted by vendor/device. */ const struct penable chipset_enables[] = { - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, + {0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600}, + {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750", enable_flash_sb600}, + {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, + {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, + {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, + {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, + {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, + {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, + {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, + {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, + {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, + {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, + {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, + {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, + {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, + {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, + {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, + {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, + {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, + {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, + {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, + {0x1039, 0x0745, NT, "SiS", "745", enable_flash_sis540}, + {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, + {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, + {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, + {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, + {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, + {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, + {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, + {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, + {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, - {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750", enable_flash_sb600}, - {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, - {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, - {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, - {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, - {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, - {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, - {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, - {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, - {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, - {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, - {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, - {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, - {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, - {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, - {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, - {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, - {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, - {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, - {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, - {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, - {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x10b9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, {0x10de, 0x0030, OK, "NVIDIA", "nForce4/MCP4", enable_flash_nvidia_nforce2}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ {0x10de, 0x0060, OK, "NVIDIA", "NForce2", enable_flash_nvidia_nforce2}, - /* Slave, should not be here, to fix known bug for A01. */ {0x10de, 0x00d3, OK, "NVIDIA", "CK804", enable_flash_ck804}, {0x10de, 0x0260, NT, "NVIDIA", "MCP51", enable_flash_ck804}, {0x10de, 0x0261, NT, "NVIDIA", "MCP51", enable_flash_ck804}, @@ -1377,46 +1359,105 @@ {0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, {0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, {0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp7x}, - {0x1039, 0x0496, NT, "SiS", "85C496+497", enable_flash_sis85c496}, - {0x1039, 0x0406, NT, "SiS", "501/5101/5501", enable_flash_sis501}, - {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, - {0x1039, 0x5596, NT, "SiS", "5596", enable_flash_sis5511}, - {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, - {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, - {0x1039, 0x5597, NT, "SiS", "5597/5598/5581/5120", enable_flash_sis530}, - {0x1039, 0x0530, NT, "SiS", "530", enable_flash_sis530}, - {0x1039, 0x5600, NT, "SiS", "600", enable_flash_sis530}, - {0x1039, 0x0620, NT, "SiS", "620", enable_flash_sis530}, - {0x1039, 0x0540, NT, "SiS", "540", enable_flash_sis540}, - {0x1039, 0x0630, NT, "SiS", "630", enable_flash_sis540}, - {0x1039, 0x0635, NT, "SiS", "635", enable_flash_sis540}, - {0x1039, 0x0640, NT, "SiS", "640", enable_flash_sis540}, - {0x1039, 0x0645, NT, "SiS", "645", enable_flash_sis540}, - {0x1039, 0x0646, NT, "SiS", "645DX", enable_flash_sis540}, - {0x1039, 0x0648, NT, "SiS", "648", enable_flash_sis540}, - {0x1039, 0x0650, NT, "SiS", "650", enable_flash_sis540}, - {0x1039, 0x0651, NT, "SiS", "651", enable_flash_sis540}, - {0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540}, - {0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540}, - {0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540}, - {0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540}, - {0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540}, - {0x1039, 0x0745, NT, "SiS", "745", enable_flash_sis540}, - {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, - {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, - {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, - {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, + {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, + {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, {0x1106, 0x3074, NT, "VIA", "VT8233", enable_flash_vt823x}, {0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x}, {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, - {0x1106, 0x8353, OK, "VIA", "VX800", enable_flash_vt8237s_spi}, - {0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111}, - {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, + {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, + {0x1106, 0x8353, OK, "VIA", "VX800/VX820", enable_flash_vt8237s_spi}, + {0x1106, 0x8409, NT, "VIA", "VX855/VX875", enable_flash_vt8237s_spi}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c42, NT, "Intel", "", enable_flash_}, + {0x8086, 0x1c43, NT, "Intel", "", enable_flash_}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, + {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, + {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, + {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x2450, NT, "Intel", "", enable_flash_}, + {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, + {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, + {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, + {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x24dc, NT, "Intel", "", enable_flash_}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, + {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, + {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, + {0x8086, 0x2642, NT, "Intel", "", enable_flash_}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, + {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, + {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, + {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, + {0x8086, 0x27bc, OK, "Intel", "NM10", enable_flash_ich7}, + {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, + {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, + {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, + {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9}, + {0x8086, 0x2911, NT, "Intel", "", enable_flash_}, + {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, + {0x8086, 0x2913, NT, "Intel", "", enable_flash_}, + {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2915, NT, "Intel", "", enable_flash_}, + {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, + {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, + {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, + {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x3a10, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, + {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a1e, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b02, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b03, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b04, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b05, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b06, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b07, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b08, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b09, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b0a, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b0b, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b0c, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, + {0x8086, 0x3b0e, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b0f, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b10, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b11, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b12, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b13, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b14, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b15, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b16, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b17, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b18, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b19, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b1a, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b1b, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b1c, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b1d, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b1e, NT, "Intel", "", enable_flash_}, + {0x8086, 0x3b1f, NT, "Intel", "", enable_flash_}, + {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, + {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, + {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, + {0x8086, 0x7600, NT, "Intel", "", enable_flash_}, + {0x8086, 0x8119, OK, "Intel", "Poulsbo", enable_flash_poulsbo}, + {0x8086, 0x8186, NT, "Intel", "", enable_flash_}, {}, }; -- http://www.hailfinger.org/

3 4

Re: [flashrom] new bios to support
by Joe Tym May 17, 2011

May 17, 2011

hi, thanks for your help in the irc channel with my hosed bios, my motherboard is an aopen i975xa-ydg, drivers are here: http://download.aopen.com.tw/Default.aspx ( no direct link i'm afraid ) i've attached the bin which i was trying to install + txt files containing the output you requested, if you could get it working that would be fantastic thanks, Joe Tym A non-text attachment has been removed: ICA1AC.BIN

6 9

[PATCH] ICH SPI paranoid error handling
by Carl-Daniel Hailfinger April 24, 2011

April 24, 2011

Some people have reported that running flashrom on Ibex Peak (after patching in the PCI ID 0x8086:0x3b02) will not only hang flashrom during the first RES/REMS command issued, it may even cause the machine to lock up or issue a hard reset. We suspect this is because RES/REMS are commands with an address, whereas RDID does not take an address and works fine. Our current ICH SPI code doesn't really follow the datasheets and uses lots of hope instead of error checking in the wrong places. This patch will fail early and fail often if something is odd. As such, merge is not recommended, but running it should definitely generating interesting results on all Intel chipsets with SPI, and especially on Ibex Peak. It probably won't fix the hang, but it should be pretty good at spewing an error before the machine dies. Untested. Highly likely to explode on VIA chipsets which use the same interface but have docs only under NDA. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-ich_spi_fcerr_fcdone_paranoia/chipset_enable.c =================================================================== --- flashrom-ich_spi_fcerr_fcdone_paranoia/chipset_enable.c (Revision 1052) +++ flashrom-ich_spi_fcerr_fcdone_paranoia/chipset_enable.c (Arbeitskopie) @@ -579,8 +579,20 @@ mmio_readl(spibar + 0x80)); msg_pdbg("0x84: 0x%08x (PR4)\n", mmio_readl(spibar + 0x84)); - msg_pdbg("0x90: 0x%08x (SSFS, SSFC)\n", - mmio_readl(spibar + 0x90)); + + tmp = mmio_readl(spibar + 0x90); + msg_pdbg("0x90: 0x%02x (SSFS)\n", tmp & 0xff); + msg_pdbg("AEL %i, ", (tmp >> 4) & 1); + msg_pdbg("FCERR %i, ", (tmp >> 3) & 1); + msg_pdbg("FDONE %i, ", (tmp >> 2) & 1); + msg_pdbg("SCIP %i\n", (tmp >> 0) & 1); + if (tmp & (1 << 3)) { + msg_pdbg("Clearing SSFS.FCERR\n"); + mmio_writeb(1 << 3, spibar + 0x90); + } + tmp >>= 8; + msg_pdbg("0x91: 0x%06x (SSFC)\n", tmp); + msg_pdbg("0x94: 0x%04x (PREOP)\n", mmio_readw(spibar + 0x94)); msg_pdbg("0x96: 0x%04x (OPTYPE)\n", Index: flashrom-ich_spi_fcerr_fcdone_paranoia/ichspi.c =================================================================== --- flashrom-ich_spi_fcerr_fcdone_paranoia/ichspi.c (Revision 1052) +++ flashrom-ich_spi_fcerr_fcdone_paranoia/ichspi.c (Arbeitskopie) @@ -413,6 +413,12 @@ write_cmd = 1; } + /* FIXME: This should be a time-limited while loop. */ + if (REGREAD16(ICH7_REG_SPIS) & SPIS_SCIP) { + msg_perr("Error: Totally unhandled SCIP condition!\n"); + return 1; + } + /* Programm Offset in Flash into FADDR */ REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ @@ -486,18 +492,22 @@ /* write it */ REGWRITE16(ICH7_REG_SPIC, temp16); - /* wait for cycle complete */ - timeout = 100 * 1000 * 60; // 60s is a looong timeout. - while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { + /* Wait for Cycle Done Status or Flash Cycle Error. */ + timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */ + while (((REGREAD16(ICH7_REG_SPIS) & (SPIS_CDS | SPIS_FCERR)) == 0) && + --timeout) { programmer_delay(10); } if (!timeout) { msg_perr("timeout\n"); + return 1; } /* FIXME: make sure we do not needlessly cause transaction errors. */ - if ((REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) != 0) { - msg_pdbg("Transaction error!\n"); + if (REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) { + msg_perr("Transaction error for opcode 0x%02x!\n", + op.opcode); + REGWRITE16(ICH7_REG_SPIS, SPIS_FCERR); return 1; } @@ -532,6 +542,12 @@ write_cmd = 1; } + /* FIXME: This should be a time-limited while loop. */ + if (REGREAD16(ICH9_REG_SSFS) & SSFS_SCIP) { + msg_perr("Error: Totally unhandled SCIP condition!\n"); + return 1; + } + /* Programm Offset in Flash into FADDR */ REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ @@ -605,18 +621,23 @@ /* write it */ REGWRITE32(ICH9_REG_SSFS, temp32); - /*wait for cycle complete */ - timeout = 100 * 1000 * 60; // 60s is a looong timeout. - while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { + /* Wait for Cycle Done Status or Flash Cycle Error. */ + timeout = 100 * 60; /* 60 ms are 9.6 million cycles at 16 MHz. */ + while (((REGREAD32(ICH9_REG_SSFS) & (SSFS_CDS | SSFS_FCERR)) == 0) && + --timeout) { programmer_delay(10); } if (!timeout) { msg_perr("timeout\n"); + return 1; } /* FIXME make sure we do not needlessly cause transaction errors. */ - if ((REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) != 0) { - msg_pdbg("Transaction error!\n"); + if (REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) { + msg_perr("Transaction error for opcode 0x%02x!\n", + op.opcode); + //FIXME: Really REGWRITE8? + REGWRITE8(ICH9_REG_SSFS, SSFS_FCERR); return 1; } -- http://www.hailfinger.org/

5 12

Ibex Peak hangs
by John Nov. 15, 2010

Nov. 15, 2010

Here is my lspci: http://flashrom.pastebin.com/4zVD3z7S When attempting to read, the chipset is not detected. After editing chipset_enable.c, changing the "3b00" in '{0x8086, 0x3b02, NT, "Intel", "3400 Desktop", enable_flash_ich10}' to "3b02", the following is output, followed immediately by a hard freeze: http://flashrom.pastebin.com/jNBdZ4YC "sudo ./flashrom -VV -c SST25VF016B" output: http://flashrom.pastebin.com/UA4vBm52 After applying this patch: http://patchwork.coreboot.org/patch/1532/ the output of "sudo ./flashrom -VV -c SST25VF016B" is: http://flashrom.pastebin.com/rCEgShPk And the output of "sudo ./flashrom -VV" was another freeze and output identical to: http://flashrom.pastebin.com/jNBdZ4YC Carldani said to mention that "flashrom hangs the machine on RES/REMS probe after you add an ich10 chipset enable for PCI ID 8086:3b02". -- http://www.fastmail.fm - mmm... Fastmail...

2 3

#1: flashRom doesn't work on MotherBoard with ICH9 + MP2532
by flashrom Oct. 26, 2010

Oct. 26, 2010

#1: flashRom doesn't work on MotherBoard with ICH9 + MP2532 --------------------------------------------------+------------------------- Reporter: annyvonne.le_coq@… | Owner: hailfinger Type: defect | Status: new Priority: major | Milestone: flashrom 0.9.1 Component: flashrom | Version: Keywords: | Dependencies: Patchstatus: there is no patch | --------------------------------------------------+------------------------- Hi all, I have a mother board equipped with ICH9 chipset and M25P32 flash device. I can't use flashrom to re-program my BIOS. 1) The ICH9 is not recognized. So, I add its device ID (2910) in chipset_enable.c file. 2) Then, M25P32 flash device is recognized, but OPCODE 06 is not in the list OPCODESS OS_ST_M25P. ich_spi_command try to find the command 06 in the list, The list contains only following values: 2, 3, 216, 5, 171, 1, 159, 199. The M25P32 has been tested with flashrom. So, I imagine that the problem is due to the caller. Have you got an idea about this issue. Thanks Anne -- Ticket URL: <http://www.flashrom.org/trac/flashrom/ticket/1> flashrom <http://www.flashrom.org/>

2 14

[PATCH] Reset before reading Chip ID
by Sean Nelson Oct. 20, 2010

Oct. 20, 2010

Add a reset to probe_jedec before we read the Chip's IDs. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

4 6

[PATCH] Move implicit erase out of chip drivers, clean up
by Carl-Daniel Hailfinger Oct. 8, 2010

Oct. 8, 2010

flashrom had an implicit erase-on-write for most flash chip and programmer drivers, but it was not entirely consistent. Some drivers had their own hand-rolled partial update functionality which made handling partial updates from generic code impossible. Move implicit erase out of chip drivers, clean up the chip write functions at the same time. A full chip erase is now performed in the generic code for all flash chips on write, and after that the whole chip is written. This is needed before we can change write function signature of the write functions to take start+len. Side note: With this patch and one or two followup patches, more functions will be easily recognizable as duplicates and can be eliminated. Compile tested and proofread, but that's it. The patch may cause flashrom to eat your dog or it may cause your dog to eat burned flash chips. Please test on real hardware. Thanks! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-partial_write_no_autoerase/flash.h =================================================================== --- flashrom-partial_write_no_autoerase/flash.h (Revision 1005) +++ flashrom-partial_write_no_autoerase/flash.h (Arbeitskopie) @@ -676,7 +676,7 @@ int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); -int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf); +int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf); extern uint8_t *sb600_spibar; /* wbsio_spi.c */ Index: flashrom-partial_write_no_autoerase/spi25.c =================================================================== --- flashrom-partial_write_no_autoerase/spi25.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/spi25.c (Arbeitskopie) @@ -875,6 +875,7 @@ /* * Read a part of the flash chip. + * FIXME: Use the chunk code from Michael Karcher instead. * Each page is read separately in chunks with a maximum size of chunksize. */ int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) @@ -914,6 +915,7 @@ /* * Write a part of the flash chip. + * FIXME: Use the chunk code from Michael Karcher instead. * Each page is written separately in chunks with a maximum size of chunksize. */ int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize) @@ -964,20 +966,13 @@ * and for chips where memory mapped programming is impossible * (e.g. due to size constraints in IT87* for over 512 kB) */ +/* real chunksize is 1, logical chunksize is 1 */ int spi_chip_write_1(struct flashchip *flash, uint8_t *buf) { - int total_size = 1024 * flash->total_size; int i, result = 0; spi_disable_blockprotect(); - /* Erase first */ - msg_cinfo("Erasing flash before programming... "); - if (erase_flash(flash)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - msg_cinfo("done.\n"); - for (i = 0; i < total_size; i++) { + for (i = 0; i < flash->total_size * 1024; i++) { result = spi_byte_program(i, buf[i]); if (result) return 1; @@ -988,6 +983,7 @@ return 0; } +/* FIXME: Unused function, not easily convertable to partial write. */ int spi_aai_write(struct flashchip *flash, uint8_t *buf) { uint32_t pos = 2, size = flash->total_size * 1024; @@ -1004,10 +1000,6 @@ default: break; } - if (erase_flash(flash)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } /* FIXME: This will fail on ICH/VIA SPI. */ result = spi_write_enable(); if (result) Index: flashrom-partial_write_no_autoerase/it87spi.c =================================================================== --- flashrom-partial_write_no_autoerase/it87spi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/it87spi.c (Arbeitskopie) @@ -326,25 +326,19 @@ int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf) { - int total_size = 1024 * flash->total_size; int i; /* * IT8716F only allows maximum of 512 kb SPI chip size for memory * mapped access. */ - if ((programmer == PROGRAMMER_IT87SPI) || (total_size > 512 * 1024)) { + if ((programmer == PROGRAMMER_IT87SPI) || (flash->total_size * 1024 > 512 * 1024)) { spi_chip_write_1(flash, buf); } else { spi_disable_blockprotect(); - /* Erase first */ - msg_pinfo("Erasing flash before programming... "); - if (erase_flash(flash)) { - msg_perr("ERASE FAILED!\n"); - return -1; - } - msg_pinfo("done.\n"); - for (i = 0; i < total_size / 256; i++) { + + /* FIXME: Handle chips which have max writechunk size >1 and <256. */ + for (i = 0; i < flash->total_size * 1024 / 256; i++) { it8716f_spi_page_program(flash, i, buf); } } Index: flashrom-partial_write_no_autoerase/buspirate_spi.c =================================================================== --- flashrom-partial_write_no_autoerase/buspirate_spi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/buspirate_spi.c (Arbeitskopie) @@ -318,16 +318,6 @@ int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf) { - int total_size = 1024 * flash->total_size; - spi_disable_blockprotect(); - /* Erase first. */ - msg_pinfo("Erasing flash before programming... "); - if (erase_flash(flash)) { - msg_perr("ERASE FAILED!\n"); - return -1; - } - msg_pinfo("done.\n"); - - return spi_write_chunked(flash, buf, 0, total_size, 12); + return spi_write_chunked(flash, buf, 0, flash->total_size * 1024, 12); } Index: flashrom-partial_write_no_autoerase/jedec.c =================================================================== --- flashrom-partial_write_no_autoerase/jedec.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/jedec.c (Arbeitskopie) @@ -393,6 +393,7 @@ } } +/* real chunksize is page_size, logical chunksize is page_size */ int write_jedec(struct flashchip *flash, uint8_t *buf) { int mask; @@ -402,52 +403,23 @@ mask = getaddrmask(flash); - if (erase_chip_jedec(flash)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - - msg_cinfo("Programming page: "); for (i = 0; i < total_size / page_size; i++) { - msg_cinfo("%04d at address: 0x%08x", i, i * page_size); - if (write_page_write_jedec_common(flash, buf + i * page_size, - i * page_size, page_size, mask)) + if (write_page_write_jedec_common(flash, buf + i * page_size, i * page_size, page_size, mask)) failed = 1; - msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } - msg_cinfo("DONE!\n"); return failed; } +/* real chunksize is 1, logical chunksize is 1 */ int write_jedec_1(struct flashchip *flash, uint8_t * buf) { - int i; - chipaddr bios = flash->virtual_memory; - chipaddr dst = bios; + chipaddr dst = flash->virtual_memory; int mask; mask = getaddrmask(flash); - programmer_delay(10); - if (erase_flash(flash)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - - msg_cinfo("Programming page: "); - for (i = 0; i < flash->total_size; i++) { - if ((i & 0x3) == 0) - msg_cinfo("address: 0x%08lx", (unsigned long)i * 1024); - - write_sector_jedec_common(flash, buf + i * 1024, dst + i * 1024, 1024, mask); - - if ((i & 0x3) == 0) - msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); - } - - msg_cinfo("DONE!\n"); - return 0; + return write_sector_jedec_common(flash, buf, dst, flash->total_size * 1024, mask); } /* erase chip with block_erase() prototype */ Index: flashrom-partial_write_no_autoerase/bitbang_spi.c =================================================================== --- flashrom-partial_write_no_autoerase/bitbang_spi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/bitbang_spi.c (Arbeitskopie) @@ -141,8 +141,5 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf) { - int total_size = 1024 * flash->total_size; - - msg_pdbg("total_size is %d\n", total_size); - return spi_write_chunked(flash, buf, 0, total_size, 256); + return spi_write_chunked(flash, buf, 0, flash->total_size * 1024, 256); } Index: flashrom-partial_write_no_autoerase/sst49lfxxxc.c =================================================================== --- flashrom-partial_write_no_autoerase/sst49lfxxxc.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/sst49lfxxxc.c (Arbeitskopie) @@ -92,6 +92,7 @@ return 0; } +/* real chunksize is 1, logical chunksize is page_size */ int write_49lfxxxc(struct flashchip *flash, uint8_t *buf) { int i; @@ -100,21 +101,10 @@ chipaddr bios = flash->virtual_memory; write_lockbits_49lfxxxc(flash, 0); - msg_cinfo("Programming page: "); for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - if (erase_sector_49lfxxxc(flash, i * page_size, flash->page_size)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - /* write to the sector */ - msg_cinfo("%04d at address: 0x%08x", i, i * page_size); - write_page_82802ab(bios, buf + i * page_size, - bios + i * page_size, page_size); - msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); + write_page_82802ab(bios, buf + i * page_size, bios + i * page_size, page_size); } - msg_cinfo("\n"); chip_writeb(0xFF, bios); Index: flashrom-partial_write_no_autoerase/spi.c =================================================================== --- flashrom-partial_write_no_autoerase/spi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/spi.c (Arbeitskopie) @@ -67,7 +67,7 @@ .command = sb600_spi_send_command, .multicommand = default_spi_send_multicommand, .read = sb600_spi_read, - .write_256 = sb600_spi_write_1, + .write_256 = sb600_spi_write_256, }, { /* SPI_CONTROLLER_VIA */ @@ -194,6 +194,7 @@ * Program chip using page (256 bytes) programming. * Some SPI masters can't do this, they use single byte programming instead. */ +/* real chunksize is up to 256, logical chunksize is 256 */ int spi_chip_write_256(struct flashchip *flash, uint8_t *buf) { if (!spi_programmer[spi_controller].write_256) { Index: flashrom-partial_write_no_autoerase/ft2232_spi.c =================================================================== --- flashrom-partial_write_no_autoerase/ft2232_spi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/ft2232_spi.c (Arbeitskopie) @@ -287,18 +287,8 @@ int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf) { - int total_size = 1024 * flash->total_size; - spi_disable_blockprotect(); - /* Erase first. */ - msg_pinfo("Erasing flash before programming... "); - if (erase_flash(flash)) { - msg_perr("ERASE FAILED!\n"); - return -1; - } - msg_pinfo("done.\n"); - msg_pdbg("total_size is %d\n", total_size); - return spi_write_chunked(flash, buf, 0, total_size, 256); + return spi_write_chunked(flash, buf, 0, flash->total_size * 1024, 256); } #endif Index: flashrom-partial_write_no_autoerase/sst28sf040.c =================================================================== --- flashrom-partial_write_no_autoerase/sst28sf040.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/sst28sf040.c (Arbeitskopie) @@ -111,6 +111,7 @@ return 0; } +/* real chunksize is 1, logical chunksize is page_size */ int write_28sf040(struct flashchip *flash, uint8_t *buf) { int i; @@ -120,21 +121,9 @@ unprotect_28sf040(bios); - msg_cinfo("Programming page: "); for (i = 0; i < total_size / page_size; i++) { - /* erase the page before programming */ - if (erase_sector_28sf040(flash, i * page_size, page_size)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - - /* write to the sector */ - msg_cinfo("%04d at address: 0x%08x", i, i * page_size); - write_sector_28sf040(bios, buf + i * page_size, - bios + i * page_size, page_size); - msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); + write_sector_28sf040(bios, buf + i * page_size, bios + i * page_size, page_size); } - msg_cinfo("\n"); protect_28sf040(bios); Index: flashrom-partial_write_no_autoerase/sb600spi.c =================================================================== --- flashrom-partial_write_no_autoerase/sb600spi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/sb600spi.c (Arbeitskopie) @@ -47,25 +47,10 @@ return spi_read_chunked(flash, buf, start, len, 8); } -/* FIXME: SB600 can write 5 bytes per transaction. */ -int sb600_spi_write_1(struct flashchip *flash, uint8_t *buf) +int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf) { - int total_size = flash->total_size * 1024; - int result = 0; - spi_disable_blockprotect(); - /* Erase first */ - msg_pinfo("Erasing flash before programming... "); - if (erase_flash(flash)) { - msg_perr("ERASE FAILED!\n"); - return -1; - } - msg_pinfo("done.\n"); - - msg_pinfo("Programming flash"); - result = spi_write_chunked(flash, buf, 0, total_size, 5); - msg_pinfo(" done.\n"); - return result; + return spi_write_chunked(flash, buf, 0, flash->total_size * 1024, 5); } static void reset_internal_fifo_pointer(void) Index: flashrom-partial_write_no_autoerase/flashrom.c =================================================================== --- flashrom-partial_write_no_autoerase/flashrom.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/flashrom.c (Arbeitskopie) @@ -1319,6 +1319,7 @@ /* This function signature is horrible. We need to design a better interface, * but right now it allows us to split off the CLI code. + * Besides that, the function itself is a textbook example of abysmal code flow. */ int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it) { @@ -1358,12 +1359,7 @@ programmer_shutdown(); return 1; } - } else { - struct stat image_stat; - - if (flash->unlock) - flash->unlock(flash); - + } else if (write_it) { if (flash->tested & TEST_BAD_ERASE) { msg_cerr("Erase is not working on this chip " "and erase is needed for write. "); @@ -1385,6 +1381,18 @@ msg_cerr("Continuing anyway.\n"); } } + if (!flash->write) { + msg_cerr("Error: flashrom has no write function for this flash chip.\n"); + programmer_shutdown(); + return 1; + } + if (flash->unlock) + flash->unlock(flash); + + } + if (write_it || verify_it) { + struct stat image_stat; + if ((image = fopen(filename, "rb")) == NULL) { perror(filename); programmer_shutdown(); @@ -1420,12 +1428,12 @@ // //////////////////////////////////////////////////////////// if (write_it) { - msg_cinfo("Writing flash chip... "); - if (!flash->write) { - msg_cerr("Error: flashrom has no write function for this flash chip.\n"); + if (erase_flash(flash)) { + emergency_help_message(); programmer_shutdown(); return 1; } + msg_cinfo("Writing flash chip... "); ret = flash->write(flash, buf); if (ret) { msg_cerr("FAILED!\n"); Index: flashrom-partial_write_no_autoerase/ichspi.c =================================================================== --- flashrom-partial_write_no_autoerase/ichspi.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/ichspi.c (Arbeitskopie) @@ -646,34 +646,13 @@ int ich_spi_write_256(struct flashchip *flash, uint8_t * buf) { - int i, ret = 0; - int total_size = flash->total_size * 1024; - int erase_size = 64 * 1024; int maxdata = 64; if (spi_controller == SPI_CONTROLLER_VIA) maxdata = 16; spi_disable_blockprotect(); - /* Erase first */ - msg_pinfo("Erasing flash before programming... "); - if (erase_flash(flash)) { - msg_perr("ERASE FAILED!\n"); - return -1; - } - msg_pinfo("done.\n"); - - msg_pinfo("Programming page: \n"); - for (i = 0; i < total_size / erase_size; i++) { - ret = spi_write_chunked(flash, buf + (i * erase_size), - i * erase_size, erase_size, maxdata); - if (ret) - break; - } - - msg_pinfo("\n"); - - return ret; + return spi_write_chunked(flash, buf, 0, flash->total_size * 1024, maxdata); } int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt, Index: flashrom-partial_write_no_autoerase/82802ab.c =================================================================== --- flashrom-partial_write_no_autoerase/82802ab.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/82802ab.c (Arbeitskopie) @@ -176,28 +176,16 @@ } } +/* real chunksize is 1, logical chunksize is 1024 */ int write_82802ab(struct flashchip *flash, uint8_t *buf) { int i; chipaddr bios = flash->virtual_memory; - if (erase_flash(flash)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - - msg_cinfo("Programming at: "); for (i = 0; i < flash->total_size; i++) { - if ((i & 0x3) == 0) - msg_cinfo("address: 0x%08lx", (unsigned long)i * 1024); - write_page_82802ab(bios, buf + i * 1024, bios + i * 1024, 1024); - - if ((i & 0x3) == 0) - msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } - msg_cinfo("DONE!\n"); return 0; } Index: flashrom-partial_write_no_autoerase/m29f400bt.c =================================================================== --- flashrom-partial_write_no_autoerase/m29f400bt.c (Revision 1005) +++ flashrom-partial_write_no_autoerase/m29f400bt.c (Arbeitskopie) @@ -39,8 +39,6 @@ /* transfer data from source to destination */ chip_writeb(*src, dst); - //chip_writeb(0xF0, bios); - //programmer_delay(5); toggle_ready_jedec(dst); msg_cerr("Value in the flash at address 0x%lx = %#x, want %#x\n", (dst - bios), chip_readb(dst), *src); @@ -113,7 +111,6 @@ chip_writeb(0xAA, bios + 0xAAA); chip_writeb(0x55, bios + 0x555); - //chip_writeb(0x10, bios + 0xAAA); chip_writeb(0x30, dst); programmer_delay(10); @@ -136,6 +133,7 @@ return erase_m29f400bt(flash); } +/* real chunksize is 1, logical chunksize is 8k-64k */ int write_m29f400bt(struct flashchip *flash, uint8_t *buf) { int i; @@ -143,117 +141,27 @@ int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; - //erase_m29f400bt (flash); - msg_cinfo("Programming page:\n "); - /********************************* - *Pages for M29F400BT: - * 16 0x7c000 0x7ffff TOP - * 8 0x7a000 0x7bfff - * 8 0x78000 0x79fff - * 32 0x70000 0x77fff - * 64 0x60000 0x6ffff - * 64 0x50000 0x5ffff - * 64 0x40000 0x4ffff - *--------------------------------- - * 64 0x30000 0x3ffff - * 64 0x20000 0x2ffff - * 64 0x10000 0x1ffff - * 64 0x00000 0x0ffff BOTTOM - *********************************/ - msg_cinfo("total_size/page_size = %d\n", total_size / page_size); for (i = 0; i < (total_size / page_size) - 1; i++) { - msg_cinfo("%04d at address: 0x%08x\n", i, i * page_size); - if (block_erase_m29f400bt(flash, i * page_size, page_size)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } - write_page_m29f400bt(bios, buf + i * page_size, - bios + i * page_size, page_size); - msg_cinfo("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); + write_page_m29f400bt(bios, buf + i * page_size, bios + i * page_size, page_size); } - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x70000); - if (block_erase_m29f400bt(flash, 0x70000, 32 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x70000, bios + 0x70000, 32 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 8, 0x78000); - if (block_erase_m29f400bt(flash, 0x78000, 8 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x78000, bios + 0x78000, 8 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 9, 0x7a000); - if (block_erase_m29f400bt(flash, 0x7a000, 8 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x7a000, bios + 0x7a000, 8 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 10, 0x7c000); - if (block_erase_m29f400bt(flash, 0x7c000, 16 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); - msg_cinfo("\n"); - return 0; } +/* real chunksize is 1, logical chunksize is 64k */ int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) { chipaddr bios = flash->virtual_memory; - msg_cinfo("Programming page:\n "); - /********************************* - *Pages for M29F400BT: - * 16 0x7c000 0x7ffff TOP - * 8 0x7a000 0x7bfff - * 8 0x78000 0x79fff - * 32 0x70000 0x77fff - * 64 0x60000 0x6ffff - * 64 0x50000 0x5ffff - * 64 0x40000 0x4ffff - *--------------------------------- - * 64 0x30000 0x3ffff - * 64 0x20000 0x2ffff - * 64 0x10000 0x1ffff - * 64 0x00000 0x0ffff BOTTOM - *********************************/ - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x00000); - if (block_erase_m29f400bt(flash, 0x00000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x00000, bios + 0x00000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x10000); - if (block_erase_m29f400bt(flash, 0x10000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x10000, bios + 0x10000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x20000); - if (block_erase_m29f400bt(flash, 0x20000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x20000, bios + 0x20000, 64 * 1024); - - msg_cinfo("%04d at address: 0x%08x\n", 7, 0x30000); - if (block_erase_m29f400bt(flash, 0x30000, 64 * 1024)) { - msg_cerr("ERASE FAILED!\n"); - return -1; - } write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); - msg_cinfo("\n"); - return 0; } -- http://www.hailfinger.org/

3 9

[PATCH] Mark SST49LF160C tested for erase
by Ed Swierk Oct. 5, 2010

Oct. 5, 2010

I have tested the erase operation with the SST49LF160C LPC flash chip. Signed-off-by: Ed Swierk <eswierk(a)aristanetworks.com> --- Index: flashrom-0.9.2-r1057/flashchips.c =================================================================== --- flashrom-0.9.2-r1057.orig/flashchips.c +++ flashrom-0.9.2-r1057/flashchips.c @@ -4582,7 +4582,7 @@ struct flashchip flashchips[] = { .total_size = 2048, .page_size = 4 * 1024, .feature_bits = FEATURE_REGISTERMAP, - .tested = TEST_OK_PRW, + .tested = TEST_OK_PREW, .probe = probe_82802ab, .probe_timing = TIMING_IGNORED, /* routine don't use probe_timing (sst49lfxxxc.c) */ .block_erasers =

2 1