flashrom June 2010

flashrom@flashrom.org

74 participants
219 discussions

Re: [flashrom] Porting flashrom to OpenBSD
by Carl-Daniel Hailfinger 02 Jul '10

02 Jul '10

On 28.06.2010 22:01, Stuart Henderson wrote: > On 2010/06/29 00:06, Ian McWilliam wrote: > >> On 28/06/2010, at 6:41 PM, Matthieu Herrb wrote: >> >> >>> On Sun, Jun 27, 2010 at 10:38:30PM +0200, Carl-Daniel Hailfinger wrote: >>> >>>> Could I ask you to write one or two short sentences which will be >>>> printed if flashrom detects insufficient permisions on OpenBSD? Maybe >>>> something like this (feel free to change it completely): >>>> >>>> "Error: Insufficient permissions to access hardware. Please set >>>> securelevel=-1 in /etc/rc.securelevel and reboot, or reboot into single >>>> user mode." >>>> >>> This message looks good to me. You could add "See the securelevel(7) >>> and init(8) manual pages for details". >>> >>> Thanks for your work on this port. >>> -- >>> Matthieu Herrb >>> > > I agree with both points :) > Thanks. >> I think in the port we could probably add a README.OpenBSD file where >> we could explain the situation in more detail like we do for many other ports >> stored in the share/doc/flashrom directory as well. >> > > We could, but I think it's even better to have proper instructions > for OpenBSD in the main distribution. > I added the message to strategic places in the code and the man page. Add OpenBSD support. Add a requirements section to the man page which lists the needed access permissions for each programmer. This patch needs the libpci 8/16-bit write patch I sent earlier. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-openbsd/flashrom.8 =================================================================== --- flashrom-openbsd/flashrom.8 (revision 1063) +++ flashrom-openbsd/flashrom.8 (working copy) @@ -306,7 +306,7 @@ Example: .B "flashrom \-p dummy:lpc,fwh" .TP -.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " gfxnvidia" , " satasii\ +.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " gfxnvidia" , " satasii \ " and " atahpt " programmers These programmers have an option to specify the PCI address of the card your want to use, which must be specified if more than one card supported @@ -391,6 +391,51 @@ .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem (/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails. +.SH REQUIREMENTS +flashrom needs different access permissions for different programmers. +.sp +.B internal +needs raw memory access, PCI configuration space access, raw I/O port +access (x86) and MSR access (x86). +.sp +.B it87spi +needs raw I/O port access (x86). +.sp +.BR nic3com ", " nicrealtek ", " nicsmc1211 " and " nicnatsemi " +need PCI configuration space read access and raw I/O port access. +.sp +.B atahpt +needs PCI configuration space access and raw I/O port access. +.sp +.BR gfxnvidia " and " drkaiser +need PCI configuration space access and raw memory access. +.sp +.B satasii +needs PCI configuration space read access and raw memory access. +.sp +.B serprog +needs TCP access to the network or userspace access to a serial port. +.sp +.B buspirate_spi +needs userspace access to a serial port. +.sp +.BR dediprog " and " ft2232_spi +need access to the USB device via libusb. +.sp +.B dummy +needs no access permissions at all. +.sp +.BR internal ", " it87spi ", " nic3com ", " nicrealtek ", " nicsmc1211 ", " +.BR nicnatsemi ", " "gfxnvidia" ", " drkaiser ", " satasii " and " atahpt +have to be run as superuser/root, and need additional raw access permission. +.sp +.BR serprog ", " buspirate_spi ", " dediprog " and " ft2232_spi +can be run as normal user on most operating systems if appropriate device +permissions are set. +.sp +On OpenBSD, you can obtain raw access permission by setting +securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into single +user mode. .SH BUGS Please report any bugs at .sp Index: flashrom-openbsd/hwaccess.c =================================================================== --- flashrom-openbsd/hwaccess.c (revision 1063) +++ flashrom-openbsd/hwaccess.c (working copy) @@ -57,6 +57,11 @@ #endif msg_perr("ERROR: Could not get I/O privileges (%s).\n" "You need to be root.\n", strerror(errno)); +#if defined (__OpenBSD__) + msg_perr("Please set securelevel=-1 in /etc/rc.securelevel " + "and reboot, or reboot into \n"); + msg_perr("single user mode.\n"); +#endif exit(1); } #endif Index: flashrom-openbsd/hwaccess.h =================================================================== --- flashrom-openbsd/hwaccess.h (revision 1063) +++ flashrom-openbsd/hwaccess.h (working copy) @@ -228,17 +228,25 @@ #endif #endif -#if defined(__NetBSD__) +#if defined(__NetBSD__) || defined (__OpenBSD__) #define off64_t off_t #define lseek64 lseek #if defined(__i386__) || defined(__x86_64__) #include <sys/types.h> #include <machine/sysarch.h> +#if defined(__NetBSD__) #if defined(__i386__) #define iopl i386_iopl #elif defined(__x86_64__) #define iopl x86_64_iopl #endif +#elif defined (__OpenBSD__) + #if defined(__i386__) + #define iopl i386_iopl + #elif defined(__amd64__) + #define iopl amd64_iopl + #endif +#endif #include <stdint.h> static inline void outb(uint8_t value, uint16_t port) Index: flashrom-openbsd/physmap.c =================================================================== --- flashrom-openbsd/physmap.c (revision 1063) +++ flashrom-openbsd/physmap.c (working copy) @@ -229,6 +229,10 @@ msg_perr("You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but\n"); msg_perr("disabling the other option unfortunately requires a kernel recompile. Sorry!\n"); } +#elif defined (__OpenBSD__) + msg_perr("Please set securelevel=-1 in /etc/rc.securelevel " + "and reboot, or reboot into \n"); + msg_perr("single user mode.\n"); #endif if (!mayfail) exit(3); Index: flashrom-openbsd/Makefile =================================================================== --- flashrom-openbsd/Makefile (revision 1063) +++ flashrom-openbsd/Makefile (working copy) @@ -48,6 +48,10 @@ CPPFLAGS += -I/usr/local/include LDFLAGS += -L/usr/local/lib endif +ifeq ($(OS_ARCH), OpenBSD) +CPPFLAGS += -I/usr/local/include +LDFLAGS += -L/usr/local/lib +endif ifeq ($(OS_ARCH), DOS) EXEC_SUFFIX := .exe CPPFLAGS += -I../libgetopt -I../libpci/include @@ -259,9 +263,13 @@ LIBS += ../libpci/lib/libpci.a else LIBS += -lpci +ifeq ($(OS_ARCH), OpenBSD) +# For (i386|amd64)_iopl(2). +LIBS += -l$(shell uname -m) endif endif endif +endif ifeq ($(CONFIG_PRINT_WIKI), yes) FEATURE_CFLAGS += -D'CONFIG_PRINT_WIKI=1' Index: flashrom-openbsd/README =================================================================== --- flashrom-openbsd/README (revision 1063) +++ flashrom-openbsd/README (working copy) @@ -55,6 +55,11 @@ * devel/gmake * devel/libpci +On OpenBSD, you need the following ports: + + * devel/gmake + * sysutils/pciutils + To compile on Linux, use: make @@ -76,6 +81,10 @@ ln -s /usr/pkg/include/pciutils pci gmake CPPFLAGS=-I. LDFLAGS="-L/usr/pkg/lib -Wl,-rpath-link,/usr/pkg/lib" +To compile on OpenBSD, use: + + gmake + To compile and run on Darwin/Mac OS X: Install DirectIO from coresystems GmbH. -- http://www.hailfinger.org/

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[PATCH] ICH9/10: display FRAP/FREGx access controls
by Joshua Roys 01 Jul '10

01 Jul '10

Hello, Attached is a patch to display the FRAP access controls on the FREGx regions of the flash chip. Also attached is the output from `flashrom -Vr foo.bin' on an ICH10 machine. Thanks, Josh

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[PATCH] Support for HP DL165 G6
by Arne Georg Gleditsch 01 Jul '10

01 Jul '10

Hi, Attached is a patch to board_enable.c for the HP DL165 board. Apparently, the PCI signature of the DL165 is identical to the DL145, but the enable pins are placed differently... :/ I'm not sure what the best way to handle that is. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> -- Arne.

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Re: [flashrom] [coreboot] [PATCH] superiotool: libsuperiodetect
by Carl-Daniel Hailfinger 30 Jun '10

30 Jun '10

On 30.06.2010 14:51, Stefan Reinauer wrote: > On 6/30/10 2:35 PM, Carl-Daniel Hailfinger wrote: > >> Using the superiotool code to detect SuperI/O chips can be really useful >> even for applications besides superiotool, e.g. flashrom. >> The biggest hurdle right now is the excessive size of the superiotool >> binary (>2.2 MB) which is still ~15 kB after lzma compression. That's >> simply unacceptable for a library. >> >> > Why? There is no size constraints on libraries in Unix like systems. > Yes, but if I proposed to increase the size of the flashrom binary by over 2 MBytes, various people would ask if I'm crazy. > Assuming we're talking about a static library > >From my system: > > 20M /usr/lib64/libbfd.a > 20M /usr/lib64/libc.a > 11M /usr/lib64/libcrypto.a > 19M /usr/lib64/libdb-4.5.a > 3.9M /usr/lib64/libfreetype.a > 5.1M /usr/lib64/libgio-2.0.a > 3.6M /usr/lib64/libglib-2.0.a > 3.3M /usr/lib64/libgmp.a > 2.8M /usr/lib64/libm.a > 2.8M /usr/lib64/libncurses.a > 3.2M /usr/lib64/libncursesw.a > 4.9M /usr/lib64/libopcodes.a > 4.2M /usr/lib64/libruby-static.a > 3.0M /usr/lib64/libssl.a > 6.9M /usr/lib64/libxml2.a > > Also, keep in mind that the size of the library in the filesystem is not > the size increase when linking it. > However, if all objects in the library are used, the size increase of the binary is correlated closely to the linked static library size. > 15kb lzma compressed is nothing. > 8 kB more or less in a recovery payload of a coreboot image are not negligible IMHO. In normal OS environments people don't use compressed binaries, and there a 2 MB size increase for flashrom (98% of it for dead code which can't be optimized away by the compiler/linker) is definitely something people will object to. >> This minimally invasive patch makes all dumping code optional and >> reduces binary size for the probe-only case (libsuperiodetect) a lot. >> Binary sizes: >> 2268258 (before) >> 31600 (after) 98.6% reduction >> LZMA compressed and stripped binary sizes: >> 14778 (before) >> 6709 (after) 54.6% reduction >> >> > Not worth the additional unreadability of the code in my opinion > > >> To test compilation of superiotool with probe-only functionality, run >> make CONFIG_LIB=yes >> >> This patch is the first step towards libsuperiodetect, and more will >> have to follow. >> >> > I think the idea for libsuperio is great. > > I'll gladly ack this without the very intrusive "we save 6700 bytes" > part of the patch. > The patch is a pure size reduction. If I remove the size reduction part, the patch will be empty. I can reduce the number of #ifdefs, but that won't make the patch prettier. Will send the patch with less #ifdefs in a separate mail. >> IMHO the {EOT} markers should be killed in libsuperiodetect, at least >> for the LDNs. Such an operation would have increased the size of the >> patch and would have reduced readability as well. Due to that, I skipped >> it, but I plan to do that in a later operation. >> >> > What would you use instead? The array members all have different sizes > as far as I can tell, so some kind of end marker will be needed. > The libsuperiodetect case doesn't care about LDNs at all. Having exactly one LDN definition per Super I/O which is always EOT looks like dead code to me, especially if nothing is looking at the LDN. >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> >> >> > > >> /* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. */ >> @@ -765,7 +803,9 @@ >> uint8_t revreg) >> { >> uint8_t id, rev; >> +#ifndef LIBSUPERIODETECT >> uint16_t runtime_base; >> +#endif /* ! LIBSUPERIODETECT */ >> >> > Maybe this could be moved downwards to where it is used, to save an ifndef? > IIRC this would break on some compilers which don't allow variable declarations in the middle of some code. >> Index: superiotool_libsuperiodetect/superiotool.h >> =================================================================== >> --- superiotool_libsuperiodetect/superiotool.h (Revision 5651) >> +++ superiotool_libsuperiodetect/superiotool.h (Arbeitskopie) >> @@ -98,12 +98,19 @@ >> struct superio_registers { >> int32_t superio_id; /* Signed, as we need EOT. */ >> const char *name; /* Super I/O name */ >> +#ifndef LIBSUPERIODETECT >> struct { >> int8_t ldn; >> const char *name; /* LDN name */ >> int16_t idx[IDXSIZE]; >> int16_t def[IDXSIZE]; >> } ldn[LDNSIZE]; >> +#else /* LIBSUPERIODETECT */ >> + /* Ugly hack to avoid messing with EOT markers. */ >> + struct { >> + int8_t dummy; >> + } dummy[1]; >> +#endif /* LIBSUPERIODETECT */ >> }; >> >> > hm ... the comment is very terse. > struct dummy is there to avoid putting all those LDN {EOT} markers inside #ifndef LIBSUPERIODETECT. It is a hack to allow compilation and make the patch less invasive than it would have been without struct dummy. Regards, Carl-Daniel -- http://www.hailfinger.org/

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[PATCH] superiotool: libsuperiodetect
by Carl-Daniel Hailfinger 30 Jun '10

30 Jun '10

Using the superiotool code to detect SuperI/O chips can be really useful even for applications besides superiotool, e.g. flashrom. The biggest hurdle right now is the excessive size of the superiotool binary (>2.2 MB) which is still ~15 kB after lzma compression. That's simply unacceptable for a library. This minimally invasive patch makes all dumping code optional and reduces binary size for the probe-only case (libsuperiodetect) a lot. Binary sizes: 2268258 (before) 31600 (after) 98.6% reduction LZMA compressed and stripped binary sizes: 14778 (before) 6709 (after) 54.6% reduction To test compilation of superiotool with probe-only functionality, run make CONFIG_LIB=yes This patch is the first step towards libsuperiodetect, and more will have to follow. IMHO the {EOT} markers should be killed in libsuperiodetect, at least for the LDNs. Such an operation would have increased the size of the patch and would have reduced readability as well. Due to that, I skipped it, but I plan to do that in a later operation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: superiotool_libsuperiodetect/fintek.c =================================================================== --- superiotool_libsuperiodetect/fintek.c (Revision 5651) +++ superiotool_libsuperiodetect/fintek.c (Arbeitskopie) @@ -31,6 +31,7 @@ static const struct superio_registers reg_table[] = { {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */ +#ifndef LIBSUPERIODETECT /* We assume reserved bits are read as 0. */ {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, @@ -75,11 +76,13 @@ {0xa, "PME, ACPI", {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT}, {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */ {EOT}}}, {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */ /* We assume reserved bits are read as 0. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, 0x2b,0x2c,0x2d,EOT}, @@ -121,9 +124,11 @@ {0xa, "PME, ACPI", {0x30,0xf0,0xf1,0xf4,0xf5,EOT}, {0x00,0x00,0x01,0x06,0x1c,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0604, "F71805F/FG", { /* We assume reserved bits are read as 0. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT}, {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}}, @@ -150,6 +155,7 @@ {0xa, "PME", {0x30,0xf0,0xf1,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0581, "F8000", { /* Fintek/ASUS F8000 */ {EOT}}}, @@ -181,7 +187,9 @@ get_superio_name(reg_table, did), vid, did, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("Fintek", reg_table, port, did, LDN_SEL); +#endif /* ! LIBSUPERIODETECT */ exit_conf_mode_winbond_fintek_ite_8787(port); } Index: superiotool_libsuperiodetect/winbond.c =================================================================== --- superiotool_libsuperiodetect/winbond.c (Revision 5651) +++ superiotool_libsuperiodetect/winbond.c (Arbeitskopie) @@ -40,6 +40,7 @@ {0x527, "W83977CTF", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x52f, "W83977EF/EG", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -78,10 +79,12 @@ 0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,0xfe,0xff,EOT}, {0x00,0x00,0x00,0x00,MISC,MISC,MISC,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,RSVD,RSVD,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x595, "W83627SF", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x601, "W83697HF/F/HG", { /* No G version? */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29, 0x2a,EOT}, @@ -126,12 +129,14 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x610, "W83L517D/D-F", { {EOT}}}, {0x708, "W83637HF/HG", { {EOT}}}, {0x828, "W83627THF/THG", { /* We assume rev is bits 3..0 of 0x21. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -175,12 +180,14 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, #if 0 {0x85x, "W83687THF", { /* TODO: sensors-detect: 0x85 */ {EOT}}}, #endif {0xa02, "W83627DHG", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -232,6 +239,7 @@ EOT}, {0x00,0x48,0x48,0x48,0x48,0x00,0x00,0x48,0x00,0x00, EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xa23, "W83627UHG", {/* TODO: Not yet in sensors-detect */ {EOT}}}, @@ -250,6 +258,7 @@ */ {EOT}}}, {0x9773, "W83977TF", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x2a,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -294,12 +303,14 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, NANA,MISC,RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,RSVD,RSVD,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x9774, "W83977ATF", { {EOT}}}, /* ID only */ {0x52, "W83627HF/F/HG/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29, 0x2a,0x2b,0x2c,0x2e,0x2f,EOT}, @@ -342,6 +353,7 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x68, "W83697SF/UF/UG", { /* ID: 0x68 (for W83697SF/UF/UG) @@ -349,6 +361,7 @@ * 0x0X (for W83697SF) -- sic! * 0x1X (for W83697UF/UG) */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,0x2a, 0x2b,0x2c,EOT}, @@ -405,6 +418,7 @@ {0xf, "GPIO 8", {0x30,0x60,0x61,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0xff,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x88, "W83627EHF/EF/EHG/EG", { /* @@ -414,6 +428,7 @@ * (W83627EHF) has an ID of 0x8854 (verified on hardware). * So we now assume all 0x88?? IDs to mean W83627EHF/EF/EHG/EG. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -460,12 +475,14 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, {0x00,0x00,0x00,0x00,0xc1,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, /* ID[3..0] */ {0xa, "W83877F", { {EOT}}}, {0xb, "W83877AF", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -475,6 +492,7 @@ 0x1f,0x0c,0x28,0xa3,RSVD,RSVD,0x00,0x00,0x00,0x00, 0x00,0x00,0x0e,0x00,MISC,MISC,MISC,MISC,MISC,MISC, MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xc, "W83877TF", { {EOT}}}, @@ -483,6 +501,7 @@ {EOT} }; +#ifndef LIBSUPERIODETECT static const struct superio_registers hwm_table[] = { {0x828, "W83627THF/THG", { {NOLDN, NULL, @@ -531,6 +550,7 @@ {EOT}}}, {EOT} }; +#endif /* ! LIBSUPERIODETECT */ static void enter_conf_mode_winbond_88(uint16_t port) { @@ -550,7 +570,10 @@ static void probe_idregs_winbond_helper(const char *init, uint16_t port) { - uint16_t id, hwmport; + uint16_t id; +#ifndef LIBSUPERIODETECT + uint16_t hwmport; +#endif /* LIBSUPERIODETECT */ uint8_t devid, rev, olddevid; probing_for("Winbond", init, port); @@ -586,6 +609,7 @@ get_superio_name(reg_table, id), devid, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("Winbond", reg_table, port, id, LDN_SEL); if (extra_dump) { @@ -607,6 +631,7 @@ dump_superio("Winbond-HWM", hwm_table, hwmport, id, WINBOND_HWM_SEL); } +#endif /* ! LIBSUPERIODETECT */ } void probe_idregs_winbond(uint16_t port) @@ -631,5 +656,7 @@ void print_winbond_chips(void) { print_vendor_chips("Winbond", reg_table); +#ifndef LIBSUPERIODETECT print_vendor_chips("Winbond-HWM", hwm_table); +#endif /* ! LIBSUPERIODETECT */ } Index: superiotool_libsuperiodetect/ite.c =================================================================== --- superiotool_libsuperiodetect/ite.c (Revision 5651) +++ superiotool_libsuperiodetect/ite.c (Arbeitskopie) @@ -30,6 +30,7 @@ {0x8228, "IT8228E", { {EOT}}}, {0x8502, "IT8502E/TE/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, @@ -67,10 +68,12 @@ {0x17, "Power Channel 3", {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, {0x00,0x00,0x6a,0x00,0x6e,0x01,0x01,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8510, "IT8510E/TE/G", { {EOT}}}, {0x8511, "IT8511E/TE/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, @@ -101,8 +104,10 @@ {0x12, "Power Channel 2", {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8512, "IT8512E/F/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, @@ -133,10 +138,12 @@ {0x12, "Power Channel 2", {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8513, "IT8513E/F/G", { {EOT}}}, {0x8661, "IT8661F/IT8770F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22, 0x23,0x24,EOT}, @@ -168,10 +175,12 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8673, "IT8673F", { {EOT}}}, {0x8681, "IT8671F/IT8687R", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22, 0x23,0x24,0x25,0x26,0x2e,0x2f,EOT}, @@ -211,8 +220,10 @@ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8701, "IT8703F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x26,0x29,0x2a,0x2b,EOT}, {0x87,0x00,0x00,0x80,0x00,0x00,0x7c,0xc0,EOT}}, @@ -253,10 +264,12 @@ {0xc, "GPIO set 5, 6 and 7", {0x30,0x60,0x61,0xf0,0xf3,0xf6,EOT}, {0x00,0x03,0x70,0x00,0xff,0xff,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8702, "IT8702F", { {EOT}}}, {0x8705, "IT8705F/AF / IT8700F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,EOT}, {0x87,0x05,0x00,0x00,NANA,EOT}}, @@ -303,11 +316,15 @@ {0x8, "MIDI port", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x00,0x0a,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8706, "IT8706R", { /* TODO: Not yet in sensors-detect */ +#ifndef LIBSUPERIODETECT /* This is a "Special General Purpose I/O chip". */ +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8708, "IT8708F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2a,0x2e,0x2f,EOT}, @@ -361,12 +378,14 @@ {0xa, "MIDI port", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x00,0x0a,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8710, "IT8710F", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x8711, "IT8711F", { /* 0x8711 is a guess, not found in datasheet. */ {EOT}}}, {0x8712, "IT8712F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x12,0x08,0x00,0x00,0x00,EOT}}, @@ -416,8 +435,10 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8716, "IT8716F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x16,0x01,0x00,0x00,0x00,EOT}}, @@ -466,8 +487,10 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8718, "IT8718F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x18,0x01,0x00,0x00,0x00,EOT}}, @@ -514,6 +537,7 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8720, "IT8720F", { /* From sensors-detect */ {EOT}}}, @@ -521,6 +545,7 @@ {EOT}}}, {0x8726, "IT8726F", { /* Datasheet wrongly says that the ID is 0x8716. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x26,0x01,0x00,MISC,0x00,EOT}}, @@ -571,6 +596,7 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8761, "IT8761E", { {EOT}}}, @@ -579,6 +605,7 @@ {EOT} }; +#ifndef LIBSUPERIODETECT static const struct superio_registers ec_table[] = { {0x8716, "IT8716F", { {NOLDN, NULL, @@ -636,6 +663,7 @@ {EOT}}}, {EOT} }; +#endif /* ! LIBSUPERIODETECT */ /* Works for: IT8661F/IT8770F */ static const uint8_t initkey_it8661f[][4] = { @@ -712,7 +740,10 @@ static void probe_idregs_ite_helper(const char *init, uint16_t port) { - uint16_t id, chipver, ecport; + uint16_t id, chipver; +#ifndef LIBSUPERIODETECT + uint16_t ecport; +#endif /* ! LIBSUPERIODETECT */ probing_for("ITE", init, port); @@ -730,6 +761,7 @@ get_superio_name(reg_table, id), id, chipver, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("ITE", reg_table, port, id, LDN_SEL); if (extra_dump) { @@ -745,6 +777,7 @@ printf("Environment controller (0x%04x)\n", ecport); dump_superio("ITE-EC", ec_table, ecport, id, LDN_SEL); } +#endif /* ! LIBSUPERIODETECT */ } void probe_idregs_ite(uint16_t port) @@ -783,5 +816,7 @@ void print_ite_chips(void) { print_vendor_chips("ITE", reg_table); +#ifndef LIBSUPERIODETECT print_vendor_chips("ITE-EC", ec_table); +#endif /* ! LIBSUPERIODETECT */ } Index: superiotool_libsuperiodetect/nsc.c =================================================================== --- superiotool_libsuperiodetect/nsc.c (Revision 5651) +++ superiotool_libsuperiodetect/nsc.c (Arbeitskopie) @@ -26,6 +26,7 @@ static const struct superio_registers reg_table[] = { {0xcf, "PC97307", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x27,EOT}, {0xcf,MISC,MISC,0x00,0x00,NANA,EOT}}, @@ -60,8 +61,10 @@ {0x8, "Power management", {0x30,0x31,0x60,0x61,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xd0, "PC87317", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,EOT}, {0xd0,MISC,MISC,0x00,0x00,0x00,EOT}}, @@ -96,8 +99,10 @@ {0x8, "Power management", {0x30,0x31,0x60,0x61,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xdf, "PC97317", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x27,EOT}, {0xdf,MISC,MISC,0x00,0x00,0x00,NANA,EOT}}, @@ -132,8 +137,10 @@ {0x8, "Power management", {0x30,0x31,0x60,0x61,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe0, "PC87309", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x27,0x2e,EOT}, {0xe0,MISC,0x00,NANA,RSVD,EOT}}, @@ -162,8 +169,10 @@ 0xf0,EOT}, {0x01,0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04, 0x40,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe1, "PC87360", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,EOT}, @@ -206,8 +215,10 @@ {0xa, "Watchdog timer", {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe2, "PC87351", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x27,0x2e,EOT}, {0xe2,0x11,0xa1,0x00,MISC,NANA,RSVD,EOT}}, @@ -240,6 +251,7 @@ {0x8, "Fan speed control", {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe4, "PC87364", { {EOT}}}, @@ -248,6 +260,7 @@ {0xe8, "PC87363", { {EOT}}}, {0xe9, "PC87366", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x27,0x28,0x2a,0x2b, 0x2c,0x2d,0x2e,EOT}, @@ -304,10 +317,12 @@ {0xe, "Temperature sensor (TMS)", {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */ {0xea, "PC8739x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -344,12 +359,14 @@ 0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,EOT}, {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xec, "PC87591x", { /* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */ {EOT}}}, {0xee, "PC8741x", { /* SRID[7..5] is marked as "not applicable for the PC8741x". */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -397,10 +414,12 @@ 0xf1,0xf2,0xf3,EOT}, {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x04,0x04,0x00, 0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xf0, "PC87372", { {EOT}}}, {0x0f1, "PC8374L", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26, 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -441,8 +460,10 @@ {0x8, "Health management", {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8f1, "WPCD376I", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26, 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -480,9 +501,11 @@ 0xf2,0xf3,0xf8,EOT}, {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC, 0x00,MISC,0x01,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xf2, "PC87427", { /* SRID[7..5] is marked as "not applicable for the PC87427". */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x10,0x12,0x13,0x1d,0x20,0x21,0x22,0x23,0x24,0x25, 0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f, @@ -542,6 +565,7 @@ 0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04, 0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xf3, "PC87373", { {EOT}}}, @@ -592,8 +616,10 @@ get_superio_name(reg_table, magic), id, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio(magic == 0x8f1 ? "Winbond" : "NSC", reg_table, port, magic, LDN_SEL); +#endif /* ! LIBSUPERIODETECT */ } void print_nsc_chips(void) Index: superiotool_libsuperiodetect/superiotool.c =================================================================== --- superiotool_libsuperiodetect/superiotool.c (Revision 5651) +++ superiotool_libsuperiodetect/superiotool.c (Arbeitskopie) @@ -81,6 +81,7 @@ return "<unknown>"; } +#ifndef LIBSUPERIODETECT static void dump_regs(const struct superio_registers reg_table[], int i, int j, uint16_t port, uint8_t ldn_sel) { @@ -170,6 +171,7 @@ printf("%02x ", INB(iobase + i)); printf("\n"); } +#endif /* ! LIBSUPERIODETECT */ void probing_for(const char *vendor, const char *info, uint16_t port) { @@ -189,9 +191,11 @@ for (i = 0; reg_table[i].superio_id != EOT; i++) { printf("%s %s", vendor, reg_table[i].name); +#ifndef LIBSUPERIODETECT /* Unless the ldn is empty, assume this chip has a dump. */ if (reg_table[i].ldn[0].ldn != EOT) printf(" (dump available)"); +#endif /* ! LIBSUPERIODETECT */ printf("\n"); } Index: superiotool_libsuperiodetect/ali.c =================================================================== --- superiotool_libsuperiodetect/ali.c (Revision 5651) +++ superiotool_libsuperiodetect/ali.c (Arbeitskopie) @@ -28,6 +28,7 @@ static const struct superio_registers reg_table[] = { /* TODO: M5113 doesn't seem to have ID registers? */ {0x5315, "M1535/M1535D/M1535+/M1535D+", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x1f,0x20,0x21,0x22,0x23,0x2c,0x2d,0x2e,EOT}, {NANA,0x53,0x15,0x00,0x00,RSVD,RSVD,RSVD,EOT}}, @@ -52,6 +53,7 @@ {0xc, "Hotkey", {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,EOT}, {0x00,0x35,0x14,0x11,0x71,RSVD,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x2351, "M512x", { {EOT}}}, @@ -95,7 +97,9 @@ get_superio_name(reg_table, id), id, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("ALi", reg_table, port, id, LDN_SEL); +#endif /* ! LIBSUPERIODETECT */ exit_conf_mode_ali(port); } Index: superiotool_libsuperiodetect/smsc.c =================================================================== --- superiotool_libsuperiodetect/smsc.c (Revision 5651) +++ superiotool_libsuperiodetect/smsc.c (Arbeitskopie) @@ -30,6 +30,7 @@ static const struct superio_registers reg_table[] = { /* The following Super I/Os use the 0x20/0x21 ID registers. */ {0x02, "FDC37C932", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x2d,0x2e, 0x2f,EOT}, @@ -68,11 +69,13 @@ {0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01, 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00, 0x00,0x00,0x00,MISC,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x03, "FDC37C93xFR", { /* FIXME: There's another 0x03 but found on port 0x0d/0x0e! */ {EOT}}}, {0x0a, "FDC37N971", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -109,8 +112,10 @@ {0x9, "Mailbox", {0x30,0x60,0x61,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0b, "FDC37N972", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -147,8 +152,10 @@ {0x9, "Mailbox", {0x30,0x60,0x61,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0e, "LPC47N252", { /* From sensors-detect */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -188,12 +195,14 @@ {0xa, "LPC/8051 addressable GPIO (LGPIO)", {0x30,0x60,0x61,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x14, "LPC47M172", { {EOT}}}, {0x30, "FDC37C93xAPM", { {EOT}}}, {0x40, "FDC37C67x", { /* E.g. FDC37C672. Chiprev: 0x01 */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c, 0x2d,0x2e,0x2f,EOT}, @@ -225,10 +234,12 @@ {0x00,NANA,NANA,NANA,NANA,0x06,0x03,NANA,NANA,NANA, 0x00,0x00,0x00,MISC,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD, EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x42, "FDC37B80x/FDC37M707", { {EOT}}}, {0x09, "FDC37N958FR", { /* Found in e.g. Dell Latitude CPi A366XT. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -270,10 +281,12 @@ {0xa, "ACPI", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x43, "FDC37B77x", { {EOT}}}, {0x44, "FDC37B78x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -315,12 +328,14 @@ {0xa, "ACPI", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x46, "FDC37M602", { /* Found in Biostar M6TLD. */ {EOT}}}, {0x47, "FDC37M60x", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x4c, "FDC37B72x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -357,8 +372,10 @@ {0xa, "ACPI", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x4d, "FDC37M81x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c, 0x2d,0x2e,0x2f,EOT}, @@ -389,8 +406,10 @@ {0x00,NANA,NANA,NANA,NANA,0x02,0x01,NANA,NANA,NANA, NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,RSVD,RSVD, RSVD,RSVD,RSVD,RSVD,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x51, "LPC47B27x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -424,10 +443,12 @@ {0xb, "MIDI port (MPU-401)", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x52, "LPC47B37x", { {EOT}}}, {0x54, "LPC47U33x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2a,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -459,12 +480,14 @@ {0xb, "SMBus", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x56, "LPC47B34x", { {EOT}}}, {0x57, "LPC47S42x", { {EOT}}}, {0x59, "LPC47M10x/112/13x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -498,12 +521,14 @@ {0xb, "MPU-401", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x5d, "LPC47B357", { /* From sensors-detect (no datasheet) */ {EOT}}}, {0x5f, "LPC47M14x", { {EOT}}}, {0x60, "LPC47M15x/192/997", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -535,6 +560,7 @@ {0xb, "MPU-401", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x62, "LPC47S45x", { {EOT}}}, @@ -550,6 +576,7 @@ {0x6f, "LPC47B397", { {EOT}}}, {0x74, "LPC47M182", { /* Only for LD_NUM = 0 */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27, 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -584,10 +611,12 @@ {0xa, "Runtime registers", {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x76, "LPC47M584", { /* From sensors-detect (no datasheet) */ {EOT}}}, {0x77, "A8000", { /* ASUS A8000, a rebranded DME1737(?) */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -613,8 +642,10 @@ {0xa, "Runtime registers", {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x78, "DME1737", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -640,6 +671,7 @@ {0xa, "Runtime registers", {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x79, "SCH5504", { /* From sensors-detect (no datasheet) */ {EOT}}}, @@ -682,6 +714,7 @@ {EOT}}}, {0x28, "FDC37N769", { /* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -693,12 +726,14 @@ NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD, 0x80,0x00,0x3c,RSVD,RSVD,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,RSVD,0x00,0x00,0x03,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x29, "FDC37N3869/FDC37N869", { /* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ {EOT}}}, {0x5a, "LPC47N227", { /* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -712,9 +747,11 @@ RSVD,0x00,0x3c,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x80,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x5b, "SIO10N268", { /* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -734,6 +771,7 @@ 0x00,0x00,0x00,0x00,NANA,NANA,NANA,NANA,NANA,0x50, NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x01, 0x00,0x01,0x00,0x8c,MISC,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x65, "FDC37C665GT/IR", { /* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. */ @@ -765,7 +803,9 @@ uint8_t revreg) { uint8_t id, rev; +#ifndef LIBSUPERIODETECT uint16_t runtime_base; +#endif /* ! LIBSUPERIODETECT */ const char *info = (idreg == 0x20) ? "(idregs=0x20/0x21) " : "(idregs=0x0d/0x0e) "; @@ -788,6 +828,7 @@ id, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio((id == 0x77 ? "ASUS" : "SMSC"), reg_table, port, id, LDN_SEL); @@ -804,6 +845,7 @@ printf("No extra registers known for this chip.\n"); } } +#endif /* ! LIBSUPERIODETECT */ exit_conf_mode_smsc(port); } Index: superiotool_libsuperiodetect/superiotool.h =================================================================== --- superiotool_libsuperiodetect/superiotool.h (Revision 5651) +++ superiotool_libsuperiodetect/superiotool.h (Arbeitskopie) @@ -98,12 +98,19 @@ struct superio_registers { int32_t superio_id; /* Signed, as we need EOT. */ const char *name; /* Super I/O name */ +#ifndef LIBSUPERIODETECT struct { int8_t ldn; const char *name; /* LDN name */ int16_t idx[IDXSIZE]; int16_t def[IDXSIZE]; } ldn[LDNSIZE]; +#else /* LIBSUPERIODETECT */ + /* Ugly hack to avoid messing with EOT markers. */ + struct { + int8_t dummy; + } dummy[1]; +#endif /* LIBSUPERIODETECT */ }; /* pci.c */ Index: superiotool_libsuperiodetect/Makefile =================================================================== --- superiotool_libsuperiodetect/Makefile (Revision 5651) +++ superiotool_libsuperiodetect/Makefile (Arbeitskopie) @@ -32,6 +32,10 @@ CFLAGS = -O2 -Wall -Werror -Wstrict-prototypes -Wundef -Wstrict-aliasing \ -Werror-implicit-function-declaration -ansi -pedantic $(SVNDEF) +ifeq ($(CONFIG_LIB), yes) +CFLAGS += -D'LIBSUPERIODETECT=1' +endif + OBJS = superiotool.o ali.o fintek.o ite.o nsc.o smsc.o winbond.o OS_ARCH = $(shell uname) -- http://www.hailfinger.org/

2 3

Re: [flashrom] Support of COM/LPT bit-bang SPI programmers in flashrom
by Carl-Daniel Hailfinger 30 Jun '10

30 Jun '10

On 29.06.2010 20:13, Andrew wrote: > 29.06.2010 20:18, Carl-Daniel Hailfinger пишет: >> would it be OK with you if I move this discussion to the flashrom >> mailing list? >> > Yes, it'll be good. Thanks. >> On 29.06.2010 19:11, Andrew wrote: >>> Is it possible to add support of some low-cost serial (for ex., >>> SI-Prog) >>> and parallel (for ex., Altera Byteblaster) SPI programming/interfacing >>> >> Yes. I have code for SPI bitbanging on the parallel port, but nobody has >> time to test. >> > I can test it in near future - I have some SPI flashes, and I have > 'universal' programmer (bunch of wires with protection resistors, 3.3V > power stabilizer and separate pins to connect to LPT holes - I use it > with SPIPGM; I assembled it when I need to program one SPI flash from MB) Oh, nice. I will update the SPIPGM support patch for flashrom and it would be great if you could test it. >>> devices? It'll be very useful (due to it's very simple schematic), and >>> IMHO it won't be much work to add them... >>> >> Sure. If someone sends me those devices, I can implement support for >> them. Or someone else uses my RayeR SPIPGM patch for flashrom and >> extends/changes it so it works with the Altera Byteblaster. >> > SPIPGM differs from ByteBlaster only by some LPT pins. + buffer. > Pinout for ByteBlasterMV: > JTAG (SPI) pins: > D0 -> TCK (SCK) > D1 -> TMS (CS-? or NC) > D6 -> TDI (SI) > Busy -> TDO (SO) > > Programmer pins (hardware detection): > D5 -> nACK > D7 -> PE (PaperEnd) via buffer (checking if buffer powered and > working) > nAutoFd -> buffer on (active in low) > nError -> pull-up to Vcc This can be supported easily by duplicating my SPIPGM driver. > For SI-Prog connection is also very simple: > SPI pins: > DSR -> SCK > DTR -> SI > CTS -> SO > > Programmer pins (hardware detection): > DSR -> RTS How does the SI-Prog handle CS? > About programmer detection pins - IMHO it'll be good to make hardware > detection, but just report hardware failure, not to break programming > process. Yes, a sanity check makes sense. Regards, Carl-Daniel -- http://www.hailfinger.org/

1 0

Re: [flashrom] [PATCH] Check that the expected winbond Super I/O was found
by Carl-Daniel Hailfinger 29 Jun '10

29 Jun '10

On 29.06.2010 14:01, Michael Karcher wrote: > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

2 1

[commit] r1064 - trunk
by repository service 29 Jun '10

29 Jun '10

Author: mkarcher Date: Tue Jun 29 16:44:40 2010 New Revision: 1064 URL: http://flashrom.org/trac/coreboot/changeset/1064 Log: Check that the expected winbond Super I/O was found Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Jun 27 17:07:52 2010 (r1063) +++ trunk/board_enable.c Tue Jun 29 16:44:40 2010 (r1064) @@ -264,6 +264,11 @@ msg_perr("\nERROR: No supported Winbond Super I/O found\n"); return -1; } + if (chip->device_id != chipid) { + msg_perr("\nERROR: Found Winbond chip with ID 0x%x, " + "expected %x\n", chip->device_id, chipid); + return -1; + } if (bit >= 8 || port == 0 || port > chip->gpio_port_count) { msg_perr("\nERROR: winbond_gpio_set: Invalid GPIO number %d\n", pin);

1 0

[PATCH] Check that the expected winbond Super I/O was found
by Michael Karcher 29 Jun '10

29 Jun '10

Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> --- board_enable.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/board_enable.c b/board_enable.c index 940ecb9..9c88f0b 100644 --- a/board_enable.c +++ b/board_enable.c @@ -264,6 +264,11 @@ static int winbond_gpio_set(uint16_t base, enum winbond_id chipid, msg_perr("\nERROR: No supported Winbond Super I/O found\n"); return -1; } + if (chip->device_id != chipid) { + msg_perr("\nERROR: Found Winbond chip with ID 0x%x, " + "expected %x\n", chip->device_id, chipid); + return -1; + } if (bit >= 8 || port == 0 || port > chip->gpio_port_count) { msg_perr("\nERROR: winbond_gpio_set: Invalid GPIO number %d\n", pin); -- 1.7.1

1 0

Re: [flashrom] Porting flashrom to OpenBSD
by Brynet 29 Jun '10

29 Jun '10

There is no sense having a port until the libpci/pci(4) issue is fixed, flashrom still doesn't work yet.. it compiles and runs, but AFAIK it always errors out. -Bryan.

2 1

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flashrom June 2010