flashrom June 2010

flashrom@flashrom.org

74 participants
219 discussions

Bios Flash | K8m800-M2 v1.0
by Ray Marr 29 Jul '10

29 Jul '10

The attached file is the information requested from the irc channel. -- Knatchwa Ubuntu101 | www.raymondmarr.com Bicycling | www.bikejourneys.wordpress.com Personal Growth | www.homeofknatchwa.net

3 3

Flashing on ASUS P6T SE works
by Sinisa Dukanovic 29 Jul '10

29 Jul '10

I have successfully read, verified and updated my BIOS with flashrom.

2 1

P5GC-MX/1333 Motherboard is Supported.please add this to flashrom mediawiki
by Prakash J Kokkatt 29 Jul '10

29 Jul '10

Hello , Subject Title is Misleading. P5GC-MX/1333 Motherboard is Supported.please add this to flashrom mediawiki Sorry for the trouble, On Mon, Jun 14, 2010 at 2:33 AM, Prakash J Kokkatt <pjkonweb(a)gmail.com>wrote: > Hello , > I am sending this report after successful flashing to latest BIOS with > flashrom tool and as per carldani(irc name) recommendation. > > <carldani> debianguy: To add your board to the list, we need some more > info (just to make sure we can exactly identify the board later). > [20:28] <debianguy> <carldani> :What info is needed. > [20:28] <carldani> debianguy: Could you send the output of "lspci > -nnvvvxxx" and a short success report (preferably also with the logs you > posted here), and exact name/revision/vendor of your mainboard to > flashrom(a)flashrom.org > > [20:29] <carldani> debianguy: Oh, and if you have superiotool installed, > "superiotool -deV" output would be really nice to have as well. > > -- > I have a 2.5 year Old Desktop PC with Asus P5GC-MX/1333 Motherboard(Intel > 945GC Chipset).Asus website verifies this Motherboard By asking to Check the > Motherboard Physically(on the Centre) to Read "Version 3.xx" For > P5GC-MX/1333 Board.There is another board *P5GC-MX* which may not be > confused with *P5GC-MX/1333*. > The Version of BIOS was 0312 Which was pretty old.the latest Version is > 0413 to which I successfully Updated. > BIOS Source: > http://support.asus.com/download/download.aspx?SLanguage=en-us > > My PC's MAC Address has changed after the flashing Procedure ,resulting in > renaming of eth0 to eth1 .This warning was also shown: > > Flash image seems to be a legacy BIOS. Disabling checks. > Writing flash chip... Erasing flash before programming... Erasing flash > chip... *spi_block_erase_20 failed during command execution at address 0x0 > * > but ,showed: > >> SUCCESS. >> >> done. >> >> Programming page: >> >> COMPLETE. >> >> Verifying flash... VERIFIED. >> > > Apart from that Flashing Procedure went fine. > > Since there are few other BIOS releases between 0312 and 0413 ,I have > updated to intermediate version(0317) ,later on to Update to 0413(and I > think this step is not really needed). > Flashrom Version in Debian Repo is not the latest.So ,I built a debian > package for My use to get latest version*0.9.2-r1043 .* > -- > Here are the Outputs, Logs of the Flashing Procedure ,Hoping this > Motherboard Enters the supported list. > *flashrom Logs:* > http://flashrom.pastebin.com/aXDL9CgX > flashing: > http://flashrom.pastebin.com/Vk9rzb9S > -- > *Output of "lspci -nnvvxxx" :* > http://flashrom.pastebin.com/vDq4SWgJ > *Output of :**"superiotool -deV":* > http://flashrom.pastebin.com/wwf0E5xg > > > flashrom version used: *flashrom_0.9.2-r1043* (latest snapshot debian > package custom built) > > superiotool on Debian: > Package: superiotool > Priority: extra > Section: utils > Installed-Size: 2196 > Maintainer: Uwe Hermann <uwe(a)debian.org> > Architecture: amd64 > *Version: 0.0+r5050-1* > > And I want to Convey My Thanks to This Project.I was contemplating on using > AFUDOS utility with freedos and memdisk(syslinux) and was not really > sure.flashrom turned out to be a great tool.Appreciations and Respect. > > Regards, > Prakash Jose Kokkatt > >

2 1

Successfully flashed Biostar M7NCD Pro (NVIDIA NForce2, Winbond W49V002A)
by David 29 Jul '10

29 Jul '10

flashrom v0.9.1-r946 No coreboot table found. DMI string system-manufacturer: " " DMI string system-product-name: " " DMI string system-version: " " DMI string baseboard-manufacturer: " " DMI string baseboard-product-name: "nVidia-nForce" DMI string baseboard-version: " " DMI string chassis-type: "Desktop" Found chipset "NVIDIA NForce2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 772M loops per second, 100 myus = 202 us. OK. Found chip "Winbond W49V002A" (256 KB, LPC) at physical address 0xfffc0000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash chip... Looking at blockwise erase function 0... trying... 0x000000-0x00ffff, 0x010000-0x01ffff, 0x020000-0x02ffff, 0x030000-0x037fff, 0x038000-0x039fff, 0x03a000-0x03bfff, 0x03c000-0x03ffff, SUCCESS. Programming page: address: COMPLETE. Verifying flash... VERIFIED.

2 1

HP Compaq nx9005
by Jagt og Fiskerimagasinet 29 Jul '10

29 Jul '10

HP Compaq nx9005 can be added as a Not supported laptops (shuts down when probing). -Anders

2 1

Working Motherboard (out of the box): ASUS P6T Deluxe
by Konstantin Matuschek 29 Jul '10

29 Jul '10

Hi :-) I was told to send this email on irc, so here it comes ;-) Yesterday I flashed my Motherboard with Flashrom (first backed up with -r, then flashed with -w), it worked out of the box. Note that the V2 Version of this Board, that is already listed on your support list, is a different board and not just a revision (missing SAS, more SATA, different Audio afaik). Motherboard Name: ASUS P6T Deluxe Motherboard Revision: (unknown, my graphics card hides the text and it's quite difficult to remove it - probably there is only one revision) Product Link: http://www.asus.com/product.aspx?P_ID=vXixf82co6Q5v0BZ&templete=2 Bios flashed from v1904 to v2101 Flashrom Version: 0.9.1 Operating System: Gentoo Linux, Vanilla Kernel 2.6.33 Notes: CONFIG_X86_PAT=y and CONFIG_STRICT_DEVMEM=y The output of flashrom -V, lspci -nnvvvxxx and superiotool -deV are linked below, I also attached a file for each of these. Thanks and greetings, Konstantin flashrom -V http://coreboot.pastebin.com/vsDvLvXA lspci -nnvvvxxx http://coreboot.pastebin.com/A0LJ45g4 superiotool -deV http://coreboot.pastebin.com/XkpiHgYH

2 1

[PATCH] Fix AAI code
by Carl-Daniel Hailfinger 29 Jul '10

29 Jul '10

The AAI code rewrite in r1052 introduced a bug: The writelen of AAI continuation is 3 bytes, but the code incorrectly had 6 bytes there. This causes all AAI writes (except the first two bytes of a chip) to fail. Thanks to den_m for reporting the bug and for testing the fix. Functional change: Fix AAI continuation command write length (was 6, should be 3). Cosmetic change: Change the whitespace of a few #defines in spi.h to have aligned values to improve readability (maybe someone would have spotted the AAI bug if the values had been aligned in the first place). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> If this patch works for you, please reply-to-all with the following text: Acked-by: Your Name <your@email> Index: flashrom-spi_aai_outsize_fix/spi.h =================================================================== --- flashrom-spi_aai_outsize_fix/spi.h (Revision 1058) +++ flashrom-spi_aai_outsize_fix/spi.h (Arbeitskopie) @@ -108,15 +108,15 @@ /* JEDEC_READ_INSIZE : any length */ /* Write memory byte */ -#define JEDEC_BYTE_PROGRAM 0x02 +#define JEDEC_BYTE_PROGRAM 0x02 #define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05 #define JEDEC_BYTE_PROGRAM_INSIZE 0x00 /* Write AAI word (SST25VF080B) */ -#define JEDEC_AAI_WORD_PROGRAM 0xad -#define JEDEC_AAI_WORD_PROGRAM_OUTSIZE 0x06 -#define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x06 -#define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 +#define JEDEC_AAI_WORD_PROGRAM 0xad +#define JEDEC_AAI_WORD_PROGRAM_OUTSIZE 0x06 +#define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x03 +#define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 /* Error codes */ #define SPI_GENERIC_ERROR -1 -- http://www.hailfinger.org/

2 2

[PATCH] 3x speedup for Bus Pirate, violate protocol
by Carl-Daniel Hailfinger 29 Jul '10

29 Jul '10

If we violate the raw SPI communication protocol requirements of the Bus Pirate (namely, waiting for the completion of one command before sending the next one), we can reduce the number of round trips by a factor of 3. The FT2232 chip present in the Bus Pirate has a big enough buffer (at least 128 bytes IIRC) to avoid overflows in the tiny buffer of the Bus Pirate PIC. Untested because I don't own the hardware. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-buspirate_speedup_protocolviolation/buspirate_spi.c =================================================================== --- flashrom-buspirate_speedup_protocolviolation/buspirate_spi.c (Revision 1048) +++ flashrom-buspirate_speedup_protocolviolation/buspirate_spi.c (Arbeitskopie) @@ -266,8 +266,8 @@ if (writecnt > 16 || readcnt > 16 || (readcnt + writecnt) > 16) return SPI_INVALID_LENGTH; - /* +2 is pretty arbitrary. */ - buf = realloc(buf, writecnt + readcnt + 2); + /* 3 bytes extra for CS#, len, CS#. */ + buf = realloc(buf, writecnt + readcnt + 3); if (!buf) { msg_perr("Out of memory!\n"); exit(1); // -1 @@ -275,39 +275,41 @@ /* Assert CS# */ buf[i++] = 0x02; - ret = buspirate_sendrecv(buf, 1, 1); - if (ret) - return SPI_GENERIC_ERROR; - if (buf[0] != 0x01) { - msg_perr("Protocol error while lowering CS#!\n"); - return SPI_GENERIC_ERROR; - } - i = 0; buf[i++] = 0x10 | (writecnt + readcnt - 1); memcpy(buf + i, writearr, writecnt); i += writecnt; memset(buf + i, 0, readcnt); - ret = buspirate_sendrecv(buf, i + readcnt, i + readcnt); - if (ret) + + i += readcnt; + /* De-assert CS# */ + buf[i++] = 0x03; + + ret = buspirate_sendrecv(buf, i, i); + + if (ret) { + msg_perr("Bus Pirate communication error!\n"); return SPI_GENERIC_ERROR; + } + if (buf[0] != 0x01) { + msg_perr("Protocol error while lowering CS#!\n"); + return SPI_GENERIC_ERROR; + } + + if (buf[1] != 0x01) { msg_perr("Protocol error while reading/writing SPI!\n"); return SPI_GENERIC_ERROR; } - memcpy(readarr, buf + i, readcnt); - i = 0; - /* De-assert CS# */ - buf[i++] = 0x03; - ret = buspirate_sendrecv(buf, 1, 1); - if (ret) - return SPI_GENERIC_ERROR; - if (buf[0] != 0x01) { + if (buf[i - 1] != 0x01) { msg_perr("Protocol error while raising CS#!\n"); return SPI_GENERIC_ERROR; } + /* Skip CS#, length, writearr. */ + memcpy(readarr, buf + 2 + writecnt, readcnt); + return ret; } -- http://www.hailfinger.org/

2 5

VERIFIED MOTHERBOARD ASUS K8V SE DELUXE
by tuerceroscas＠andaluciajunta.es 29 Jul '10

29 Jul '10

Today I flash Asus K8V SE DELUXE with last BIOS file without any problem. Thanks for this program!

2 1

Add URLs for three boards, fix a typo and add a note
by Idwer Vollering 27 Jul '10

27 Jul '10

Add URLs for boards ASUS K8V, ASUS K8V SE Deluxe, Elitegroup K7S5A. FIxes a typo, adds a note for ASUS M2N-E. Signed-off-by: Idwer Vollering <vidwer(a)gmail.com>

3 2

← Newer
1
2
3
4
5
6
7
8
9
...
22
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom June 2010