flashrom August 2009

flashrom@flashrom.org

28 participants
124 discussions

GA-MA780G-UD3H, SST25VF080B: read success report
by Andriy Gapon 06 Sep '09

06 Sep '09

Motherboard is GIGABYTE GA-MA780G-UD3H The rest is below: $ flashrom -r ma780g.f4.bios Calibrating delay loop... OK. No coreboot table found. Found chipset "ATI(AMD) SB700", enabling flash write... OK. Found board "GIGABYTE GA-MA78G-DS3H", enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. Found chip "SST SST25VF080B" (1024 KB) at physical address 0xfff00000. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Reading flash... done. -- Andriy Gapon

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[PATCH] Blockwise erase infrastructure
by Carl-Daniel Hailfinger 04 Sep '09

04 Sep '09

Blockwise erase infrastructure, 6th try. The description is pretty long and has not changed since last time. I can repost it if desired. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-eraseblocks/flash.h =================================================================== --- flashrom-eraseblocks/flash.h (Revision 664) +++ flashrom-eraseblocks/flash.h (Arbeitskopie) @@ -140,6 +140,17 @@ CHIP_BUSTYPE_UNKNOWN = CHIP_BUSTYPE_PARALLEL | CHIP_BUSTYPE_LPC | CHIP_BUSTYPE_FWH | CHIP_BUSTYPE_SPI, }; +/* + * How many different contiguous runs of erase blocks with one size each do + * we have for a given erase function? + */ +#define NUM_ERASEREGIONS 5 + +/* + * How many different erase functions do we have per chip? + */ +#define NUM_ERASEFUNCTIONS 5 + struct flashchip { const char *vendor; const char *name; @@ -168,6 +179,19 @@ /* Delay after "enter/exit ID mode" commands in microseconds. */ int probe_timing; int (*erase) (struct flashchip *flash); + + /* + * Erase blocks and associated erase function. The default entry is a + * chip-sized virtual block together with the chip erase function. + */ + struct block_eraser { + struct eraseblock{ + unsigned int size; /* Eraseblock size */ + unsigned int count; /* Number of contiguous blocks with that size */ + } eraseblocks[NUM_ERASEREGIONS]; + int (*block_erase) (struct flashchip *flash, unsigned int blockaddr, unsigned int blocklen); + } block_erasers[NUM_ERASEFUNCTIONS]; + int (*write) (struct flashchip *flash, uint8_t *buf); int (*read) (struct flashchip *flash, uint8_t *buf, int start, int len); @@ -383,6 +407,7 @@ #define printf_debug(x...) { if (verbose) printf(x); } void map_flash_registers(struct flashchip *flash); int read_memmapped(struct flashchip *flash, uint8_t *buf, int start, int len); +int erase_flash(struct flashchip *flash); int min(int a, int b); int max(int a, int b); int check_erased_range(struct flashchip *flash, int start, int len); Index: flashrom-eraseblocks/flashchips.c =================================================================== --- flashrom-eraseblocks/flashchips.c (Revision 664) +++ flashrom-eraseblocks/flashchips.c (Arbeitskopie) @@ -1220,7 +1220,30 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_52, + }, + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_d8, + }, + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1236,7 +1259,26 @@ .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, - .erase = spi_chip_erase_60_c7, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, + { + .eraseblocks = { {64 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, + { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, + }, .write = spi_chip_write_256, .read = spi_chip_read, }, Index: flashrom-eraseblocks/spi.c =================================================================== --- flashrom-eraseblocks/spi.c (Revision 664) +++ flashrom-eraseblocks/spi.c (Arbeitskopie) @@ -1006,7 +1006,7 @@ default: break; } - if (flash->erase(flash)) { + if (erase_flash(flash)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } Index: flashrom-eraseblocks/wbsio_spi.c =================================================================== --- flashrom-eraseblocks/wbsio_spi.c (Revision 664) +++ flashrom-eraseblocks/wbsio_spi.c (Arbeitskopie) @@ -197,7 +197,7 @@ return 1; } - if (flash->erase(flash)) { + if (erase_flash(flash)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } Index: flashrom-eraseblocks/w39v040c.c =================================================================== --- flashrom-eraseblocks/w39v040c.c (Revision 664) +++ flashrom-eraseblocks/w39v040c.c (Arbeitskopie) @@ -78,7 +78,7 @@ int page_size = flash->page_size; chipaddr bios = flash->virtual_memory; - if (flash->erase(flash)) { + if (erase_flash(flash)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } Index: flashrom-eraseblocks/sb600spi.c =================================================================== --- flashrom-eraseblocks/sb600spi.c (Revision 664) +++ flashrom-eraseblocks/sb600spi.c (Arbeitskopie) @@ -54,7 +54,7 @@ /* Erase first */ printf("Erasing flash before programming... "); - if (flash->erase(flash)) { + if (erase_flash(flash)) { fprintf(stderr, "ERASE FAILED!\n"); return -1; } Index: flashrom-eraseblocks/flashrom.c =================================================================== --- flashrom-eraseblocks/flashrom.c (Revision 664) +++ flashrom-eraseblocks/flashrom.c (Arbeitskopie) @@ -443,36 +443,66 @@ int erase_flash(struct flashchip *flash) { - uint32_t erasedbytes; - unsigned long size = flash->total_size * 1024; - unsigned char *buf = calloc(size, sizeof(char)); + int i, j, k, ret = 0, found = 0; + printf("Erasing flash chip... "); - if (NULL == flash->erase) { - printf("FAILED!\n"); + for (k = 0; k < NUM_ERASEFUNCTIONS; k++) { + unsigned long done = 0; + struct block_eraser eraser = flash->block_erasers[k]; + + printf_debug("Looking at blockwise erase function %i... ", k); + if (!eraser.block_erase && !eraser.eraseblocks[0].count) { + printf_debug("not defined. " + "Looking for another erase function.\n"); + continue; + } + if (!eraser.block_erase && eraser.eraseblocks[0].count) { + printf_debug("eraseblock layout is known, but no " + "matching block erase function found. " + "Looking for another erase function.\n"); + continue; + } + if (eraser.block_erase && !eraser.eraseblocks[0].count) { + printf_debug("block erase function found, but " + "eraseblock layout is unknown. " + "Looking for another erase function.\n"); + continue; + } + found = 1; + printf_debug("trying... "); + for (i = 0; i < NUM_ERASEREGIONS; i++) { + /* count==0 for all automatically initialized array + * members so the loop below won't be executed for them. + */ + for (j = 0; j < eraser.eraseblocks[i].count; j++) { + ret = eraser.block_erase(flash, done + eraser.eraseblocks[i].size * j, eraser.eraseblocks[i].size); + if (ret) + break; + } + if (ret) + break; + } + /* If everything is OK, don't try another erase function. */ + if (!ret) + break; + } + /* If no block erase function was found or block erase failed, retry. */ + if ((!found || ret) && (flash->erase)) { + found = 1; + printf_debug("Trying whole-chip erase function... "); + ret = flash->erase(flash); + } + if (!found) { fprintf(stderr, "ERROR: flashrom has no erase function for this flash chip.\n"); return 1; } - flash->erase(flash); - /* FIXME: The lines below are superfluous. We should check the result - * of flash->erase(flash) instead. - */ - if (!flash->read) { - printf("FAILED!\n"); - fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); - return 1; - } else - flash->read(flash, buf, 0, size); - - for (erasedbytes = 0; erasedbytes < size; erasedbytes++) - if (0xff != buf[erasedbytes]) { - printf("FAILED!\n"); - fprintf(stderr, "ERROR at 0x%08x: Expected=0xff, Read=0x%02x\n", - erasedbytes, buf[erasedbytes]); - return 1; - } - printf("SUCCESS.\n"); - return 0; + if (ret) { + fprintf(stderr, "FAILED!\n"); + } else { + printf("SUCCESS.\n"); + } + return ret; } void usage(const char *name) -- http://www.hailfinger.org/

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more flashchips.c .probe_timing updates ...
by Putlinuxonit 04 Sep '09

04 Sep '09

Hi All, Just found a datasheet for the PMC Pm49FL002 / 004 and updated the flaschips.c file . find attached, the full diff against r701. - Udu E. Ogah .~~~~~~~~~~.

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[PATCH] Reduce probe code duplication, fix 82802AB
by Carl-Daniel Hailfinger 04 Sep '09

04 Sep '09

Quite a few probe functions in flashrom are copies of probe_jedec with additional lock bit printing or other glue. Make them call probe_jedec instead. Use the correct reset sequence for 82802AB. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-call_probe_jedec/w39v040c.c =================================================================== --- flashrom-call_probe_jedec/w39v040c.c (Revision 674) +++ flashrom-call_probe_jedec/w39v040c.c (Arbeitskopie) @@ -23,8 +23,12 @@ int probe_w39v040c(struct flashchip *flash) { chipaddr bios = flash->virtual_memory; - uint8_t id1, id2, lock; + int result = probe_jedec(flash); + uint8_t lock; + if (!result) + return result; + chip_writeb(0xAA, bios + 0x5555); programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); @@ -32,8 +36,6 @@ chip_writeb(0x90, bios + 0x5555); programmer_delay(10); - id1 = chip_readb(bios); - id2 = chip_readb(bios + 1); lock = chip_readb(bios + 0xfff2); chip_writeb(0xAA, bios + 0x5555); @@ -43,17 +45,9 @@ chip_writeb(0xF0, bios + 0x5555); programmer_delay(40); - printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, id1, id2); - if (!oddparity(id1)) - printf_debug(", id1 parity violation"); - printf_debug("\n"); - if (flash->manufacture_id == id1 && flash->model_id == id2) { - printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n", - __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un"); - return 1; - } - - return 0; + printf("%s: Boot block #TBL is %slocked, rest of chip #WP is %slocked.\n", + __func__, lock & 0x4 ? "" : "un", lock & 0x8 ? "" : "un"); + return 1; } int erase_w39v040c(struct flashchip *flash) Index: flashrom-call_probe_jedec/stm50flw0x0x.c =================================================================== --- flashrom-call_probe_jedec/stm50flw0x0x.c (Revision 674) +++ flashrom-call_probe_jedec/stm50flw0x0x.c (Arbeitskopie) @@ -42,50 +42,11 @@ int probe_stm50flw0x0x(struct flashchip *flash) { - chipaddr bios = flash->virtual_memory; - uint8_t id1, id2; - uint32_t largeid1, largeid2; + int result = probe_jedec(flash); - /* Issue JEDEC Product ID Entry command */ - chip_writeb(0xAA, bios + 0x5555); - programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - programmer_delay(10); - chip_writeb(0x90, bios + 0x5555); - programmer_delay(40); + if (!result) + return result; - /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - largeid1 = id1; - largeid2 = id2; - - /* Check if it is a continuation ID, this should be a while loop. */ - if (id1 == 0x7F) { - largeid1 <<= 8; - id1 = chip_readb(bios + 0x100); - largeid1 |= id1; - } - if (id2 == 0x7F) { - largeid2 <<= 8; - id2 = chip_readb(bios + 0x101); - largeid2 |= id2; - } - - /* Issue JEDEC Product ID Exit command */ - chip_writeb(0xAA, bios + 0x5555); - programmer_delay(10); - chip_writeb(0x55, bios + 0x2AAA); - programmer_delay(10); - chip_writeb(0xF0, bios + 0x5555); - programmer_delay(40); - - printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, largeid1, - largeid2); - - if (largeid1 != flash->manufacture_id || largeid2 != flash->model_id) - return 0; - map_flash_registers(flash); return 1; Index: flashrom-call_probe_jedec/w39v080fa.c =================================================================== --- flashrom-call_probe_jedec/w39v080fa.c (Revision 674) +++ flashrom-call_probe_jedec/w39v080fa.c (Arbeitskopie) @@ -22,30 +22,11 @@ int probe_winbond_fwhub(struct flashchip *flash) { - chipaddr bios = flash->virtual_memory; - uint8_t id1, id2; + int result = probe_jedec(flash); - /* Product Identification Entry */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); - programmer_delay(10); + if (!result) + return result; - /* Read product ID */ - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - /* Product Identifixation Exit */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - programmer_delay(10); - - printf_debug("%s: id1 0x%x, id2 0x%x\n", __FUNCTION__, id1, id2); - - if (id1 != flash->manufacture_id || id2 != flash->model_id) - return 0; - map_flash_registers(flash); return 1; Index: flashrom-call_probe_jedec/82802ab.c =================================================================== --- flashrom-call_probe_jedec/82802ab.c (Revision 674) +++ flashrom-call_probe_jedec/82802ab.c (Arbeitskopie) @@ -47,14 +47,11 @@ chipaddr bios = flash->virtual_memory; uint8_t id1, id2; -#if 0 - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x90, bios + 0x5555); -#endif - - chip_writeb(0xff, bios); + /* Reset to get a clean state */ + chip_writeb(0xFF, bios); programmer_delay(10); + + /* Enter ID mode */ chip_writeb(0x90, bios); programmer_delay(10); @@ -62,9 +59,7 @@ id2 = chip_readb(bios + 0x01); /* Leave ID mode */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); + chip_writeb(0xFF, bios); programmer_delay(10); @@ -81,7 +76,6 @@ uint8_t wait_82802ab(chipaddr bios) { uint8_t status; - uint8_t id1, id2; chip_writeb(0x70, bios); if ((chip_readb(bios) & 0x80) == 0) { // it's busy @@ -90,19 +84,9 @@ status = chip_readb(bios); - // put another command to get out of status register mode + /* Reset to get a clean state */ + chip_writeb(0xFF, bios); - chip_writeb(0x90, bios); - programmer_delay(10); - - id1 = chip_readb(bios); - id2 = chip_readb(bios + 0x01); - - // this is needed to jam it out of "read id" mode - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xF0, bios + 0x5555); - return status; } -- http://www.hailfinger.org/

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Board enable for Asus A7V600-X.
by Luc Verhaegen 01 Sep '09

01 Sep '09

2 3

ACER ASPIRE L5100
by Gildas Le Nadan 01 Sep '09

01 Sep '09

Hi Here are the informations you asked for on #flashrom (I've added dmidecode as well). Cheers, Gildas aka mael_

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[PATCH] Easier release creation
by Carl-Daniel Hailfinger 31 Aug '09

31 Aug '09

With this patch, make tarball and make export still work as expected, but if you specify RELEASENAME=foo, then the directories and tarballs are named flashrom-foo instead of flashrom-0.9.0-r703. This makes release creation a lot easier. As an example, look at creating the 0.9.1 tarball: # make tarball RELEASENAME=0.9.1 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-releasepackaging/Makefile =================================================================== --- flashrom-releasepackaging/Makefile (Revision 703) +++ flashrom-releasepackaging/Makefile (Arbeitskopie) @@ -60,7 +60,9 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || echo unknown) -VERSION := 0.9.0-r$(SVNVERSION) +RELEASE := 0.9.0 +VERSION := $(RELEASE)-r$(SVNVERSION) +RELEASENAME ?= $(VERSION) SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' @@ -146,16 +148,16 @@ $(INSTALL) -m 0644 $(PROGRAM).8 $(DESTDIR)$(MANDIR)/man8 export: - @rm -rf $(EXPORTDIR)/flashrom-$(VERSION) - @svn export -r BASE . $(EXPORTDIR)/flashrom-$(VERSION) - @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(VERSION)/Makefile - @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(VERSION)/ChangeLog - @echo Exported $(EXPORTDIR)/flashrom-$(VERSION)/ + @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) + @svn export -r BASE . $(EXPORTDIR)/flashrom-$(RELEASENAME) + @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(RELEASENAME)/Makefile + @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(RELEASENAME)/ChangeLog + @echo Exported $(EXPORTDIR)/flashrom-$(RELEASENAME)/ tarball: export - @tar cjf $(EXPORTDIR)/flashrom-$(VERSION).tar.bz2 -C $(EXPORTDIR)/ $(TAROPTIONS) flashrom-$(VERSION)/ - @rm -rf $(EXPORTDIR)/flashrom-$(VERSION) - @echo Created $(EXPORTDIR)/flashrom-$(VERSION).tar.bz2 + @tar cjf $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2 -C $(EXPORTDIR)/ $(TAROPTIONS) flashrom-$(RELEASENAME)/ + @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) + @echo Created $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2 .PHONY: all clean distclean dep compiler pciutils features export tarball -- http://www.hailfinger.org/

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[commit] r704 - trunk
by svn＠flashrom.org 31 Aug '09

31 Aug '09

Author: hailfinger Date: 2009-08-31 18:25:08 +0200 (Mon, 31 Aug 2009) New Revision: 704 Modified: trunk/Makefile Log: With this patch, make tarball and make export still work as expected, but if you specify RELEASENAME=foo, then the directories and tarballs are named flashrom-foo instead of flashrom-0.9.0-r703. This makes release creation a lot easier. As an example, look at creating the 0.9.1 tarball: # make tarball RELEASENAME=0.9.1 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-08-31 11:53:35 UTC (rev 703) +++ trunk/Makefile 2009-08-31 16:25:08 UTC (rev 704) @@ -60,7 +60,9 @@ # will not require subversion. The downloadable snapshots are already exported. SVNVERSION := $(shell LC_ALL=C svnversion -cn . | sed -e "s/.*://" -e "s/$[0-9]*$.*/\1/" | grep "[0-9]" || echo unknown) -VERSION := 0.9.0-r$(SVNVERSION) +RELEASE := 0.9.0 +VERSION := $(RELEASE)-r$(SVNVERSION) +RELEASENAME ?= $(VERSION) SVNDEF := -D'FLASHROM_VERSION="$(VERSION)"' @@ -146,16 +148,16 @@ $(INSTALL) -m 0644 $(PROGRAM).8 $(DESTDIR)$(MANDIR)/man8 export: - @rm -rf $(EXPORTDIR)/flashrom-$(VERSION) - @svn export -r BASE . $(EXPORTDIR)/flashrom-$(VERSION) - @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(VERSION)/Makefile - @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(VERSION)/ChangeLog - @echo Exported $(EXPORTDIR)/flashrom-$(VERSION)/ + @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) + @svn export -r BASE . $(EXPORTDIR)/flashrom-$(RELEASENAME) + @sed "s/^SVNVERSION.*/SVNVERSION := $(SVNVERSION)/" Makefile >$(EXPORTDIR)/flashrom-$(RELEASENAME)/Makefile + @LC_ALL=C svn log >$(EXPORTDIR)/flashrom-$(RELEASENAME)/ChangeLog + @echo Exported $(EXPORTDIR)/flashrom-$(RELEASENAME)/ tarball: export - @tar cjf $(EXPORTDIR)/flashrom-$(VERSION).tar.bz2 -C $(EXPORTDIR)/ $(TAROPTIONS) flashrom-$(VERSION)/ - @rm -rf $(EXPORTDIR)/flashrom-$(VERSION) - @echo Created $(EXPORTDIR)/flashrom-$(VERSION).tar.bz2 + @tar cjf $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2 -C $(EXPORTDIR)/ $(TAROPTIONS) flashrom-$(RELEASENAME)/ + @rm -rf $(EXPORTDIR)/flashrom-$(RELEASENAME) + @echo Created $(EXPORTDIR)/flashrom-$(RELEASENAME).tar.bz2 .PHONY: all clean distclean dep compiler pciutils features export tarball

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[PATCH] Clean up bad board list
by Carl-Daniel Hailfinger 31 Aug '09

31 Aug '09

Hi, while going through the bad board list, I noticed that some boards either have no public test reports, are classified incorrectly or have chipset instead of board problems. None of them should be listed. Chipset problem, not board related: "ASUS" "M3N78 Pro" Flashrom works with coreboot, fails only under factory BIOS: "MSI" "MS-7260 (K9N Neo)" No report: "FIC" "VA-502" "PCCHIPS" "M537DMA33" "Soyo" "SY-5VD" Our 0.9.1 release should look good. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-badboard_cleanup/print.c =================================================================== --- flashrom-badboard_cleanup/print.c (Revision 694) +++ flashrom-badboard_cleanup/print.c (Arbeitskopie) @@ -420,7 +420,6 @@ /* Verified non-working boards (for now). */ { "Abit", "IS-10", "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…" }, - { "ASUS", "M3N78 Pro", "http://www.asus.com/product.aspx?P_ID=DVvm9CU0G1bCC4gp" }, { "ASUS", "MEW-AM", "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/" }, { "ASUS", "MEW-VM", "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm" }, { "ASUS", "P3B-F", "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/" }, @@ -429,11 +428,7 @@ { "Biostar", "M6TBA", "ftp://ftp.biostar-usa.com/manuals/M6TBA/" }, { "Boser", "HS-6637", "http://www.boser.com.tw/manual/HS-62376637v3.4.pdf" }, { "DFI", "855GME-MGF", "http://www.dfi.com.tw/portal/CM/cmproduct/XX_cmproddetail/XX_WbProdsWindow?…" }, - { "FIC", "VA-502", "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/" }, { "MSI", "MS-6178", "http://www.msi-technology.de/index.php?func=proddesc&prod_no=343&maincat_no…" }, - { "MSI", "MS-7260 (K9N Neo)", "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=255" }, - { "PCCHIPS", "M537DMA33", "http://motherboards.mbarron.net/models/pcchips/m537dma.htm" }, - { "Soyo", "SY-5VD", "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English" }, { "Sun", "Fire x4540", "http://www.sun.com/servers/x64/x4540/" }, { "Sun", "Fire x4150", "http://www.sun.com/servers/x64/x4150/" }, { "Sun", "Fire x4200", "http://www.sun.com/servers/entry/x4200/" }, @@ -466,9 +461,7 @@ { "Acer", "Aspire One", "See http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html." }, /* Verified non-working boards (for now). */ - { "ASUS", "M3N78 Pro", "SPI flash translation seems to be done in the NVIDIA MCP78 southbridge, but we don't have MCP78 datasheets." }, { "MSI", "MS-6178", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot." }, - { "MSI", "MS-7260 (K9N Neo)", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot." }, /* Verified working laptops. */ /* None which need comments, yet... */ Index: flashrom-badboard_cleanup/board_enable.c =================================================================== --- flashrom-badboard_cleanup/board_enable.c (Revision 694) +++ flashrom-badboard_cleanup/board_enable.c (Arbeitskopie) @@ -1054,7 +1054,6 @@ const struct board_info boards_bad[] = { /* Verified non-working boards (for now). */ { "Abit", "IS-10", }, - { "ASUS", "M3N78 Pro", }, { "ASUS", "MEW-AM", }, { "ASUS", "MEW-VM", }, { "ASUS", "P3B-F", }, @@ -1063,11 +1062,7 @@ { "Biostar", "M6TBA", }, { "Boser", "HS-6637", }, { "DFI", "855GME-MGF", }, - { "FIC", "VA-502", }, { "MSI", "MS-6178", }, - { "MSI", "MS-7260 (K9N Neo)", }, - { "PCCHIPS", "M537DMA33", }, - { "Soyo", "SY-5VD", }, { "Sun", "Fire x4150", }, { "Sun", "Fire x4200", }, { "Sun", "Fire x4540", }, -- http://www.hailfinger.org/

2 7

[commit] r703 - trunk
by svn＠flashrom.org 31 Aug '09

31 Aug '09

Author: hailfinger Date: 2009-08-31 13:53:35 +0200 (Mon, 31 Aug 2009) New Revision: 703 Modified: trunk/board_enable.c trunk/print.c Log: Update bad board list and remove boards where either the chipset is not supported (not a board issue) or where we have no report in the archives. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-08-30 14:14:59 UTC (rev 702) +++ trunk/board_enable.c 2009-08-31 11:53:35 UTC (rev 703) @@ -1063,8 +1063,6 @@ { "Abit", "IS-10", }, { "ASRock", "K7VT4A+", }, { "ASUS", "A7V600-X", }, - { "ASUS", "M2N68", }, - { "ASUS", "M3N78 Pro", }, { "ASUS", "MEW-AM", }, { "ASUS", "MEW-VM", }, { "ASUS", "P3B-F", }, @@ -1076,7 +1074,6 @@ { "FIC", "VA-502", }, { "MSI", "MS-6178", }, { "MSI", "MS-7260 (K9N Neo)", }, - { "PCCHIPS", "M537DMA33", }, { "Soyo", "SY-5VD", }, { "Sun", "Fire x4150", }, { "Sun", "Fire x4200", }, Modified: trunk/print.c =================================================================== --- trunk/print.c 2009-08-30 14:14:59 UTC (rev 702) +++ trunk/print.c 2009-08-31 11:53:35 UTC (rev 703) @@ -431,8 +431,6 @@ { "Abit", "IS-10", "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…" }, { "ASRock", "K7VT4A+", "http://www.asrock.com/mb/overview.asp?Model=K7VT4A%%2b&s=" }, { "ASUS", "A7V600-X", "http://www.asus.com/product.aspx?P_ID=L2XYS0rmtCjeOr4k" }, - { "ASUS", "M2N68", "http://www.asus.com/product.aspx?P_ID=iDZQ9yNK2CbKW6Zv"}, - { "ASUS", "M3N78 Pro", "http://www.asus.com/product.aspx?P_ID=DVvm9CU0G1bCC4gp" }, { "ASUS", "MEW-AM", "ftp://ftp.asus.com.tw/pub/ASUS/mb/sock370/810/mew-am/" }, { "ASUS", "MEW-VM", "http://www.elhvb.com/mboards/OEM/HP/manual/ASUS%20MEW-VM.htm" }, { "ASUS", "P3B-F", "ftp://ftp.asus.com.tw/pub/ASUS/mb/slot1/440bx/p3b-f/" }, @@ -444,7 +442,6 @@ { "FIC", "VA-502", "ftp://ftp.fic.com.tw/motherboard/manual/socket7/va-502/" }, { "MSI", "MS-6178", "http://www.msi-technology.de/index.php?func=proddesc&prod_no=343&maincat_no…" }, { "MSI", "MS-7260 (K9N Neo)", "http://www.msi.com/index.php?func=proddesc&maincat_no=1&prod_no=255" }, - { "PCCHIPS", "M537DMA33", "http://motherboards.mbarron.net/models/pcchips/m537dma.htm" }, { "Soyo", "SY-5VD", "http://www.soyo.com/content/Downloads/163/&c=80&p=464&l=English" }, { "Sun", "Fire x4540", "http://www.sun.com/servers/x64/x4540/" }, { "Sun", "Fire x4150", "http://www.sun.com/servers/x64/x4150/" }, @@ -478,7 +475,6 @@ { "Acer", "Aspire One", "See http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html." }, /* Verified non-working boards (for now). */ - { "ASUS", "M3N78 Pro", "SPI flash translation seems to be done in the NVIDIA MCP78 southbridge, but we don't have MCP78 datasheets." }, { "MSI", "MS-6178", "Immediately powers off if you try to hot-plug the chip. However, this does '''not''' happen if you use coreboot." }, { "MSI", "MS-7260 (K9N Neo)", "Interestingly flashrom does not work when the vendor BIOS is booted, but it ''does'' work flawlessly when the machine is booted with coreboot." },

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flashrom August 2009