ooops again. i missed that git send-email did not get the RCPT TO header correctly and did only send it to me last night. so here it is really. finally. please. :)
Stefan Tauner (8): whitespace, documentation and other small stuff The AT25F512B is quite different from the other (yet unsupported) chips in the AT25F* familiy, so rename 512B-specific stuff. generify spi_rdid to allow passing different opcodes. This is needed to add support for Atmel's AT25F series. Add support for Atmel's AT25F series of SPI flash chips. This includes a new probing method (probe_spi_rdid_at25f), block erase method (spi_block_erase_62), spi_prettyprint_status_register_at25f and spi_disable_blockprotect_at25f. add support for 8086:1076 (82541GI) to nicintel_spi.c use getpagesize() to determine physmap's length in nicintel_spi.c check if write enable is really set in nicintel_spi_init (and minor comment changes). Added (N) to the name of MX29F002B/T devices.
chipdrivers.h | 3 + chipset_enable.c | 4 +- drkaiser.c | 2 +- flash.h | 7 ++- flashchips.c | 93 ++++++++++++++++++++++++++++- flashchips.h | 18 +++--- flashrom.c | 4 +- nicintel_spi.c | 23 ++++++- print.c | 2 +- print_wiki.c | 2 +- spi.h | 14 +++- spi25.c | 177 ++++++++++++++++++++++++++++++++++++++++++++++------- wbsio_spi.c | 2 +- 13 files changed, 298 insertions(+), 53 deletions(-)
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- chipset_enable.c | 4 ++-- drkaiser.c | 2 +- flash.h | 7 ++++++- flashchips.h | 4 ++-- flashrom.c | 4 ++-- print.c | 2 +- print_wiki.c | 2 +- spi25.c | 7 ++++--- wbsio_spi.c | 2 +- 9 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/chipset_enable.c b/chipset_enable.c index 0896bce..838d321 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -558,8 +558,8 @@ static int enable_flash_cs5530(struct pci_dev *dev, const char *name) #define CS5530_ENABLE_SA20 (1 << 6)
buses_supported = CHIP_BUSTYPE_PARALLEL; - /* Decode 0x000E0000-0x000FFFFF (128 KB), not just 64 KB, and - * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 KB. + /* Decode 0x000E0000-0x000FFFFF (128 kB), not just 64 kB, and + * decode 0xFF000000-0xFFFFFFFF (16 MB), not just 256 kB. * FIXME: Should we really touch the low mapping below 1 MB? Flashrom * ignores that region completely. * Make the configured ROM areas writable. diff --git a/drkaiser.c b/drkaiser.c index 207c738..c2938dd 100644 --- a/drkaiser.c +++ b/drkaiser.c @@ -49,7 +49,7 @@ int drkaiser_init(void) rpci_write_word(pcidev_dev, PCI_MAGIC_DRKAISER_ADDR, PCI_MAGIC_DRKAISER_VALUE);
- /* Map 128KB flash memory window. */ + /* Map 128kB flash memory window. */ drkaiser_bar = physmap("Dr. Kaiser PC-Waechter flash memory", addr, 128 * 1024);
diff --git a/flash.h b/flash.h index 91c4cf3..a2380b5 100644 --- a/flash.h +++ b/flash.h @@ -107,7 +107,9 @@ struct flashchip { uint32_t manufacture_id; uint32_t model_id;
+ /* Total chip size in kilobytes */ int total_size; + /* Page chip size in bytes */ int page_size; int feature_bits;
@@ -125,7 +127,10 @@ struct flashchip { /* * Erase blocks and associated erase function. Any chip erase function * is stored as chip-sized virtual block together with said function. - */ + * The first one that fits will be chosen, there is currently no way to + * influence that behaviour. For testing just comment out the others elements or + * set the function pointer to NULL. + */ struct block_eraser { struct eraseblock{ unsigned int size; /* Eraseblock size */ diff --git a/flashchips.h b/flashchips.h index 1c5e841..3b2b94f 100644 --- a/flashchips.h +++ b/flashchips.h @@ -145,9 +145,9 @@ #define ATMEL_AT25FS040 0x6604 #define ATMEL_AT26DF041 0x4400 #define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */ -#define ATMEL_AT26DF081A 0x4501 +#define ATMEL_AT26DF081A 0x4501 #define ATMEL_AT26DF161 0x4600 -#define ATMEL_AT26DF161A 0x4601 +#define ATMEL_AT26DF161A 0x4601 #define ATMEL_AT26DF321 0x4700 /* Same as 25DF321 */ #define ATMEL_AT26F004 0x0400 #define ATMEL_AT29C040A 0xA4 diff --git a/flashrom.c b/flashrom.c index 34248ed..13ee129 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1142,7 +1142,7 @@ struct flashchip *probe_flash(struct flashchip *first_flash, int force) for (flash = first_flash; flash && flash->name; flash++) { if (chip_to_probe && strcmp(flash->name, chip_to_probe) != 0) continue; - msg_gdbg("Probing for %s %s, %d KB: ", + msg_gdbg("Probing for %s %s, %d kB: ", flash->vendor, flash->name, flash->total_size); if (!flash->probe && !force) { msg_gdbg("failed! flashrom has no probe function for " @@ -1193,7 +1193,7 @@ notfound: #endif snprintf(location, sizeof(location), "on %s", programmer_table[programmer].name);
- msg_cinfo("%s chip "%s %s" (%d KB, %s) %s.\n", + msg_cinfo("%s chip "%s %s" (%d kB, %s) %s.\n", force ? "Assuming" : "Found", flash->vendor, flash->name, flash->total_size, flashbuses_to_text(flash->bustype), location); diff --git a/print.c b/print.c index b939f67..a6591f9 100644 --- a/print.c +++ b/print.c @@ -100,7 +100,7 @@ static void print_supported_chips(void) for (i = strlen("Device"); i < maxchiplen; i++) printf(" ");
- printf("Tested Known Size/KB: Type:\n"); + printf("Tested Known Size/kB: Type:\n"); for (i = 0; i < okcol; i++) printf(" "); printf("OK Broken\n\n"); diff --git a/print_wiki.c b/print_wiki.c index 8b13f70..22d4a48 100644 --- a/print_wiki.c +++ b/print_wiki.c @@ -59,7 +59,7 @@ mainboards on the [[Mailinglist|mailing list]].\n";
static const char chip_th[] = "{| border="0" style="font-size: smaller" \ valign="top"\n|- bgcolor="#6699dd"\n! align="left" | Vendor\n\ -! align="left" | Device\n! align="left" | Size / KB\n\ +! align="left" | Device\n! align="left" | Size / kB\n\ ! align="left" | Type\n! align="left" colspan="4" | Status\n\n\ |- bgcolor="#6699ff"\n| colspan="4" | \n\ | Probe\n| Read\n| Erase\n| Write\n\n"; diff --git a/spi25.c b/spi25.c index c9e1ebf..c774032 100644 --- a/spi25.c +++ b/spi25.c @@ -314,13 +314,14 @@ uint8_t spi_read_status_register(void) /* Prettyprint the status register. Common definitions. */ static void spi_prettyprint_status_register_welwip(uint8_t status) { - msg_cdbg("Chip status register: Write Enable Latch (WEL) is " + msg_cdbg("Chip status register: Write Enable Latch (WEL/WEN) is " "%sset\n", (status & (1 << 1)) ? "" : "not "); - msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " + msg_cdbg("Chip status register: Write In Progress (WIP/BUSY/nRDY) is " "%sset\n", (status & (1 << 0)) ? "" : "not "); }
-/* Prettyprint the status register. Common definitions. */ +/* Prettyprint the status register. Common definitions. + TODO: parameterize number of protected blocks. */ static void spi_prettyprint_status_register_common(uint8_t status) { msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " diff --git a/wbsio_spi.c b/wbsio_spi.c index acf9cb2..5e08416 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -71,7 +71,7 @@ int wbsio_check_for_spi(void) buses_supported |= CHIP_BUSTYPE_SPI; spi_controller = SPI_CONTROLLER_WBSIO; msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is " - "1024 KB!\n", __func__); + "1024 kB!\n", __func__); max_rom_decode.spi = 1024 * 1024;
return 0;
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- chipdrivers.h | 3 +-- flashchips.c | 6 ++++-- spi25.c | 10 +--------- 3 files changed, 6 insertions(+), 13 deletions(-)
diff --git a/chipdrivers.h b/chipdrivers.h index c01ab7a..dc46fe1 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -45,13 +45,12 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_prettyprint_status_register_at25df(struct flashchip *flash); int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash); -int spi_prettyprint_status_register_at25f(struct flashchip *flash); +int spi_prettyprint_status_register_at25f512b(struct flashchip *flash); int spi_prettyprint_status_register_at25fs010(struct flashchip *flash); int spi_prettyprint_status_register_at25fs040(struct flashchip *flash); int spi_disable_blockprotect(struct flashchip *flash); int spi_disable_blockprotect_at25df(struct flashchip *flash); int spi_disable_blockprotect_at25df_sec(struct flashchip *flash); -int spi_disable_blockprotect_at25f(struct flashchip *flash); int spi_disable_blockprotect_at25fs010(struct flashchip *flash); int spi_disable_blockprotect_at25fs040(struct flashchip *flash); int spi_byte_program(int addr, uint8_t databyte); diff --git a/flashchips.c b/flashchips.c index 753a094..29a4da0 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1612,8 +1612,10 @@ struct flashchip flashchips[] = { .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_at25f, - .unlock = spi_disable_blockprotect_at25f, + .printlock = spi_prettyprint_status_register_at25f512b, + /* spi_disable_blockprotect_at25df is not really the right way to do + * this, but the side effects of said function work here as well. */ + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, diff --git a/spi25.c b/spi25.c index c774032..5d73411 100644 --- a/spi25.c +++ b/spi25.c @@ -394,7 +394,7 @@ int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash) return spi_prettyprint_status_register_at25df(flash); }
-int spi_prettyprint_status_register_at25f(struct flashchip *flash) +int spi_prettyprint_status_register_at25f512b(struct flashchip *flash) { uint8_t status;
@@ -1123,14 +1123,6 @@ int spi_disable_blockprotect_at25df_sec(struct flashchip *flash) return spi_disable_blockprotect_at25df(flash); }
-int spi_disable_blockprotect_at25f(struct flashchip *flash) -{ - /* spi_disable_blockprotect_at25df is not really the right way to do - * this, but the side effects of said function work here as well. - */ - return spi_disable_blockprotect_at25df(flash); -} - int spi_disable_blockprotect_at25fs010(struct flashchip *flash) { uint8_t status;
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- spi25.c | 24 ++++++++++++------------ 1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/spi25.c b/spi25.c index 5d73411..c4cd6b2 100644 --- a/spi25.c +++ b/spi25.c @@ -31,17 +31,17 @@
void spi_prettyprint_status_register(struct flashchip *flash);
-static int spi_rdid(unsigned char *readarr, int bytes) +static int spi_rdid(unsigned char *readarr, int bytes_in, unsigned char rdid_opcode) { - static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID }; + unsigned char cmd[] = { rdid_opcode }; int ret; int i;
- ret = spi_send_command(sizeof(cmd), bytes, cmd, readarr); + ret = spi_send_command(sizeof(cmd), bytes_in, cmd, readarr); if (ret) return ret; msg_cspew("RDID returned"); - for (i = 0; i < bytes; i++) + for (i = 0; i < bytes_in; i++) msg_cspew(" 0x%02x", readarr[i]); msg_cspew(". "); return 0; @@ -115,13 +115,13 @@ int spi_write_disable(void) return spi_send_command(sizeof(cmd), 0, cmd, NULL); }
-static int probe_spi_rdid_generic(struct flashchip *flash, int bytes) +static int probe_spi_rdid_generic(struct flashchip *flash, int bytes_in, unsigned char rdid_opcode) { - unsigned char readarr[4]; + unsigned char readarr[bytes_in]; uint32_t id1; uint32_t id2;
- if (spi_rdid(readarr, bytes)) + if (spi_rdid(readarr, bytes_in, rdid_opcode)) return 0;
if (!oddparity(readarr[0])) @@ -135,7 +135,7 @@ static int probe_spi_rdid_generic(struct flashchip *flash, int bytes) msg_cdbg("RDID byte 1 parity violation. "); id1 = (readarr[0] << 8) | readarr[1]; id2 = readarr[2]; - if (bytes > 3) { + if (bytes_in > 3) { id2 <<= 8; id2 |= readarr[3]; } @@ -170,7 +170,7 @@ static int probe_spi_rdid_generic(struct flashchip *flash, int bytes)
int probe_spi_rdid(struct flashchip *flash) { - return probe_spi_rdid_generic(flash, 3); + return probe_spi_rdid_generic(flash, JEDEC_RDID_INSIZE, JEDEC_RDID); }
int probe_spi_rdid4(struct flashchip *flash) @@ -189,7 +189,7 @@ int probe_spi_rdid4(struct flashchip *flash) #endif #endif default: - return probe_spi_rdid_generic(flash, 4); + return probe_spi_rdid_generic(flash, 4, JEDEC_RDID); }
return 0; @@ -242,8 +242,8 @@ int probe_spi_res1(struct flashchip *flash) /* Check if RDID is usable and does not return 0xff 0xff 0xff or * 0x00 0x00 0x00. In that case, RES is pointless. */ - if (!spi_rdid(readarr, 3) && memcmp(readarr, allff, 3) && - memcmp(readarr, all00, 3)) { + if (!spi_rdid(readarr, JEDEC_RDID_INSIZE, JEDEC_RDID) && memcmp(readarr, allff, 3) && + memcmp(readarr, all00, JEDEC_RDID_INSIZE)) { msg_cdbg("Ignoring RES in favour of RDID.\n"); return 0; }
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- chipdrivers.h | 4 ++ flashchips.c | 87 ++++++++++++++++++++++++++++++++++++ flashchips.h | 10 ++--- spi.h | 14 ++++-- spi25.c | 138 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 5 files changed, 242 insertions(+), 11 deletions(-)
diff --git a/chipdrivers.h b/chipdrivers.h index dc46fe1..09dd751 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -27,6 +27,7 @@
/* spi.c, should probably be in spi_chip.c */ int probe_spi_rdid(struct flashchip *flash); +int probe_spi_rdid_at25f(struct flashchip *flash); int probe_spi_rdid4(struct flashchip *flash); int probe_spi_rems(struct flashchip *flash); int probe_spi_res1(struct flashchip *flash); @@ -37,6 +38,7 @@ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d7(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_62(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen); int spi_chip_write_1(struct flashchip *flash, uint8_t *buf, int start, int len); @@ -45,12 +47,14 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_prettyprint_status_register_at25df(struct flashchip *flash); int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash); +int spi_prettyprint_status_register_at25f(struct flashchip *flash); int spi_prettyprint_status_register_at25f512b(struct flashchip *flash); int spi_prettyprint_status_register_at25fs010(struct flashchip *flash); int spi_prettyprint_status_register_at25fs040(struct flashchip *flash); int spi_disable_blockprotect(struct flashchip *flash); int spi_disable_blockprotect_at25df(struct flashchip *flash); int spi_disable_blockprotect_at25df_sec(struct flashchip *flash); +int spi_disable_blockprotect_at25f(struct flashchip *flash); int spi_disable_blockprotect_at25fs010(struct flashchip *flash); int spi_disable_blockprotect_at25fs040(struct flashchip *flash); int spi_byte_program(int addr, uint8_t databyte); diff --git a/flashchips.c b/flashchips.c index 29a4da0..7cb7d39 100644 --- a/flashchips.c +++ b/flashchips.c @@ -1583,6 +1583,63 @@ struct flashchip flashchips[] = {
{ .vendor = "Atmel", + .name = "AT25F512", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", + .name = "AT25F512A", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F512A, + .total_size = 64, + .page_size = 128, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + /* Not correct to use this one, because the BP1 bit is N/A. */ + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", .name = "AT25F512B", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ATMEL_ID, @@ -1622,6 +1679,36 @@ struct flashchip flashchips[] = {
{ .vendor = "Atmel", + /* The A suffix indicates 33MHz instead of 20MHz clock rate. + * All other properties seem to be the same.*/ + .name = "AT25F1024(A)", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25F1024, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid_at25f, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_62, + } + }, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", .name = "AT25FS010", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ATMEL_ID, diff --git a/flashchips.h b/flashchips.h index 3b2b94f..9b08d25 100644 --- a/flashchips.h +++ b/flashchips.h @@ -134,13 +134,11 @@ #define ATMEL_AT25DF321A 0x4701 #define ATMEL_AT25DF641 0x4800 #define ATMEL_AT25DQ161 0x8600 -#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F512 0x65 /* guessed, no device ID in datasheet. + * Vendor ID can be read with AT25F_RDID */ +#define ATMEL_AT25F512A 0x65 /* Needs AT25F_RDID */ #define ATMEL_AT25F512B 0x6500 -#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID - * can be read with AT25F512A_RDID */ -#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */ +#define ATMEL_AT25F1024 0x60 /* Needs AT25F_RDID */ #define ATMEL_AT25FS010 0x6601 #define ATMEL_AT25FS040 0x6604 #define ATMEL_AT26DF041 0x4400 diff --git a/spi.h b/spi.h index b908603..a5c3406 100644 --- a/spi.h +++ b/spi.h @@ -30,10 +30,11 @@ /* INSIZE may be 0x04 for some chips*/ #define JEDEC_RDID_INSIZE 0x03
-/* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */ -#define AT25F512A_RDID_OUTSIZE 0x01 -#define AT25F512A_RDID_INSIZE 0x02 +/* Some Atmel AT25F* models have bit 3 as don't care bit in commands */ +/* 0x15 or 0x1d */ +#define AT25F_RDID 0x15 +#define AT25F_RDID_OUTSIZE 0x01 +#define AT25F_RDID_INSIZE 0x02
/* Read Electronic Manufacturer Signature */ #define JEDEC_REMS 0x90 @@ -61,6 +62,11 @@ #define JEDEC_CE_60_OUTSIZE 0x01 #define JEDEC_CE_60_INSIZE 0x00
+/* Chip Erase 0x62 is supported by Atmel AT25F chips. */ +#define JEDEC_CE_62 0x62 +#define JEDEC_CE_62_OUTSIZE 0x01 +#define JEDEC_CE_62_INSIZE 0x00 + /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */ #define JEDEC_CE_C7 0xc7 #define JEDEC_CE_C7_OUTSIZE 0x01 diff --git a/spi25.c b/spi25.c index c4cd6b2..38037f1 100644 --- a/spi25.c +++ b/spi25.c @@ -141,7 +141,11 @@ static int probe_spi_rdid_generic(struct flashchip *flash, int bytes_in, unsigne } } else { id1 = readarr[0]; - id2 = (readarr[1] << 8) | readarr[2]; + /* Special case for AT25F chips. */ + if (bytes_in == 2) + id2 = readarr[1]; + else + id2 = (readarr[1] << 8) | readarr[2]; }
msg_cdbg("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); @@ -173,6 +177,11 @@ int probe_spi_rdid(struct flashchip *flash) return probe_spi_rdid_generic(flash, JEDEC_RDID_INSIZE, JEDEC_RDID); }
+int probe_spi_rdid_at25f(struct flashchip *flash) +{ + return probe_spi_rdid_generic(flash, AT25F_RDID_INSIZE, AT25F_RDID); +} + int probe_spi_rdid4(struct flashchip *flash) { /* Some SPI controllers do not support commands with writecnt=1 and @@ -394,6 +403,32 @@ int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash) return spi_prettyprint_status_register_at25df(flash); }
+int spi_prettyprint_status_register_at25f(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + /* The following 3 bits are undefined in AT25F512(A), AT25F1024(A): + msg_cdbg("Chip status register: Bit 6 is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 4 is " + "%sset\n", (status & (1 << 4)) ? "" : "not "); + */ + /* This is undefined for AT25F512A; will be refactored soonish anyway */ + msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n", + (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n", + (status & (1 << 2)) ? "" : "not "); + spi_prettyprint_status_register_welwip(status); + return 0; +} + int spi_prettyprint_status_register_at25f512b(struct flashchip *flash) { uint8_t status; @@ -592,6 +627,46 @@ int spi_chip_erase_60(struct flashchip *flash) return 0; }
+int spi_chip_erase_62(struct flashchip *flash) +{ + int result; + struct spi_command cmds[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_62_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_62 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(cmds); + if (result) { + msg_cerr("%s failed during command execution\n", + __func__); + return result; + } + /* Wait until the Write-In-Progress bit is cleared. + * This usually takes 2-5 s, so wait in 100 ms steps. + */ + /* FIXME: We assume spi_read_status_register will never fail. */ + while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) + programmer_delay(100 * 1000); + if (check_erased_range(flash, 0, flash->total_size * 1024)) { + msg_cerr("ERASE FAILED!\n"); + return -1; + } + return 0; +} + int spi_chip_erase_c7(struct flashchip *flash) { int result; @@ -826,6 +901,16 @@ int spi_block_erase_60(struct flashchip *flash, unsigned int addr, unsigned int return spi_chip_erase_60(flash); }
+int spi_block_erase_62(struct flashchip *flash, unsigned int addr, unsigned int blocklen) +{ + if ((addr != 0) || (blocklen != flash->total_size * 1024)) { + msg_cerr("%s called with incorrect arguments\n", + __func__); + return -1; + } + return spi_chip_erase_62(flash); +} + int spi_block_erase_c7(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { if ((addr != 0) || (blocklen != flash->total_size * 1024)) { @@ -1076,6 +1161,57 @@ int spi_disable_blockprotect(struct flashchip *flash) return 0; }
+int spi_disable_blockprotect_at25f(struct flashchip *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(); + /* If block protection is disabled (BP0 and BP1 are 0), stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Write Protect Enable (WPEN)\n"); + /* The following is used in spi_disable_blockprotect_at25df + * to check the state of the hardware lock pin. This is not + * possible with this chip, so we have to try. + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + */ + /* All bits except bit 7 (WPEN) are readonly. If the WP pin is + * low, WPEN is readonly and this will fail. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if (status & (1 << 7)) { + msg_cerr("WP# pin is probably active, disabling " + "write protection is impossible.\n"); + return 1; + } + + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0x8c); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} + int spi_disable_blockprotect_at25df(struct flashchip *flash) { uint8_t status;
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- nicintel_spi.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/nicintel_spi.c b/nicintel_spi.c index 3882e81..5a6e04d 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -64,6 +64,7 @@ const struct pcidev_status nics_intel_spi[] = { {PCI_VENDOR_ID_INTEL, 0x105e, OK, "Intel", "82571EB Gigabit Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"}, {PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"}, + {PCI_VENDOR_ID_INTEL, 0x1076, OK, "Intel", "82541GI Gigabit Ethernet Controller"},
{}, };
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- nicintel_spi.c | 7 +++++-- 1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/nicintel_spi.c b/nicintel_spi.c index 5a6e04d..811ed6e 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -26,11 +26,14 @@ */
#include <stdlib.h> +#include <unistd.h> #include "flash.h" #include "programmer.h"
#define PCI_VENDOR_ID_INTEL 0x8086
+#define MEMMAP_SIZE getpagesize() + #define EECD 0x10 #define FLA 0x1c
@@ -148,7 +151,7 @@ int nicintel_spi_init(void) io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi);
nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash", - io_base_addr, 4096); + io_base_addr, MEMMAP_SIZE); tmp = pci_mmio_readl(nicintel_spibar + EECD); tmp &= ~FLASH_WRITES_DISABLED; tmp |= FLASH_WRITES_ENABLED; @@ -173,7 +176,7 @@ int nicintel_spi_shutdown(void) tmp |= FLASH_WRITES_DISABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD);
- physunmap(nicintel_spibar, 4096); + physunmap(nicintel_spibar, MEMMAP_SIZE); pci_cleanup(pacc); release_io_perms();
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- nicintel_spi.c | 15 +++++++++++++-- 1 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/nicintel_spi.c b/nicintel_spi.c index 811ed6e..88d86af 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -34,11 +34,14 @@
#define MEMMAP_SIZE getpagesize()
+/* EEPROM/Flash Control & Data Register */ #define EECD 0x10 +/* Flash Access Register */ #define FLA 0x1c
/* * Register bits of EECD. + * Table 13-6 * * Bit 04, 05: FWE (Flash Write Enable Control) * 00b = not allowed @@ -49,8 +52,9 @@ #define FLASH_WRITES_DISABLED 0x10 /* FWE: 10000b */ #define FLASH_WRITES_ENABLED 0x20 /* FWE: 100000b */
-/* Flash Access register bits */ -/* Table 13-9 */ +/* Flash Access register bits + * Table 13-9 + */ #define FL_SCK 0 #define FL_CS 1 #define FL_SI 2 @@ -157,6 +161,13 @@ int nicintel_spi_init(void) tmp |= FLASH_WRITES_ENABLED; pci_mmio_writel(tmp, nicintel_spibar + EECD);
+ /* test if FWE is really set to allow writes */ + tmp = pci_mmio_readl(nicintel_spibar + EECD); + if ( (tmp & FLASH_WRITES_DISABLED) || !(tmp & FLASH_WRITES_ENABLED) ) { + msg_perr("Enabling flash write access failed.\n"); + return 1; + } + /* 1 usec halfperiod delay for now. */ if (bitbang_spi_init(&bitbang_spi_master_nicintel, 1)) return 1;
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at --- flashchips.c | 4 ++-- flashchips.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/flashchips.c b/flashchips.c index 7cb7d39..97aafef 100644 --- a/flashchips.c +++ b/flashchips.c @@ -4209,7 +4209,7 @@ struct flashchip flashchips[] = {
{ .vendor = "Macronix", - .name = "MX29F002B", + .name = "MX29F002(N)B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX29F002B, @@ -4240,7 +4240,7 @@ struct flashchip flashchips[] = {
{ .vendor = "Macronix", - .name = "MX29F002T", + .name = "MX29F002(N)T", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = MACRONIX_ID, .model_id = MACRONIX_MX29F002T, diff --git a/flashchips.h b/flashchips.h index 9b08d25..9782188 100644 --- a/flashchips.h +++ b/flashchips.h @@ -361,8 +361,8 @@ #define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */ #define MACRONIX_MX29F001B 0x19 #define MACRONIX_MX29F001T 0x18 -#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB */ -#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT */ +#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB; N has reset pin n/c. */ +#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT; N has reset pin n/c. */ #define MACRONIX_MX29F004B 0x46 #define MACRONIX_MX29F004T 0x45 #define MACRONIX_MX29F022T 0x36 /* Same as MX29F022NT */
-
Stefan Tauner