Author: stefanct Date: Sun Jun 16 12:30:08 2013 New Revision: 1678 URL: http://flashrom.org/trac/flashrom/changeset/1678
Log: sbxxx: spibar[0] debug print refinements.
Newer models support a 66 MHz clock and fast reads. We should probably distinguish the models better (as we do in ichspi) and add support for frequency selection etc. For now this has to suffice.
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at Acked-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at
Modified: trunk/flash.h trunk/sb600spi.c
Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Sun Jun 9 16:00:46 2013 (r1677) +++ trunk/flash.h Sun Jun 16 12:30:08 2013 (r1678) @@ -24,6 +24,7 @@ #ifndef __FLASH_H__ #define __FLASH_H__ 1
+#include <inttypes.h> #include <stdint.h> #include <stddef.h> #ifdef _WIN32
Modified: trunk/sb600spi.c ============================================================================== --- trunk/sb600spi.c Sun Jun 9 16:00:46 2013 (r1677) +++ trunk/sb600spi.c Sun Jun 16 12:30:08 2013 (r1678) @@ -211,7 +211,7 @@ uint32_t tmp; uint8_t reg; static const char *const speed_names[4] = { - "Reserved", "33", "22", "16.5" + "66/reserved", "33", "22", "16.5" };
/* Read SPI_BaseAddr */ @@ -250,9 +250,10 @@ * SB700 or later, reads and writes will be corrupted. Abort in this * case. Make sure to avoid this check on SB600. */ - msg_pdbg("SpiArbEnable=%i, SpiAccessMacRomEn=%i, " + msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", + tmp, (tmp >> 18) & 0x1, (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, (tmp >> 27) & 0x1, (tmp >> 28) & 0x1);