Author: stefanct Date: Sat Jun 18 20:45:56 2011 New Revision: 1344 URL: http://flashrom.org/trac/flashrom/changeset/1344
Log: add intel 6 series pci ids to chipset_enables
as defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-006, May 2011.
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at Acked-by: Uwe Hermann uwe@hermann-uwe.de
Modified: trunk/chipset_enable.c
Modified: trunk/chipset_enable.c ============================================================================== --- trunk/chipset_enable.c Sat Jun 18 20:45:50 2011 (r1343) +++ trunk/chipset_enable.c Sat Jun 18 20:45:56 2011 (r1344) @@ -1121,6 +1121,21 @@ {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e},
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