Hi!
The following patch adds support to configure Lattice iCE40 FPGAs (formerly Silicon Blue parts). The support is to add support for the SPI flash memories attached to the FPGA. iCE40 FPGAs read its configuration from an SPI memory. This patch should support the HW-USBN-2B Lattice cable, but I used a generic FTDI FT2232 cable. It works very well for the iCE40 Blink Evaluation Kit. This kit have an M25P10-A SPI flash.
Note that Lattice provides a tool for free, but I had problems with the command line version of the tool. Not to mention that the GUI version takes 1 minute, 6 seconds to configure the memory and flashrom 6 seconds ;-)
About the patch: - The patch is for ft2232_spi.c file, it adds a new cable type to the ft2232_spi driver. - The type is named ice40 - Lattice's cable used GPIOL0 as CS (named SS), for this reason the patch uses this pin. - During the flash configuration the FPGA must in reset state. GPIOL3 controls the RESET line (active low), this is the same line used by Lattice cable. - Before even trying to detect a memory you must wake-up it. This is because the FPGA puts the memory to sleep. I know it sound a little bit crazy to send a command to a memory that you don't even know is there, but you can't detect it (read ID commands are ignored when the memory is in deep power down mode). - At exit the patch puts the memory to sleep and disconnects the cable. This releases the reset and hence the FPGA boots from the memory. Ideally you should check if the FPGA successfully loaded the memory content. But for this you need to read the CDONE line, lamentably this line can't be accessed in the Blink kit.
Is this patch acceptable?
Regards, SET
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Salvador Eduardo Tropea