Good day, I have flashing problem.
The Pm49FL004T flash recognized automatically. I can read it no problem.
But I can't re-flash it.
Please help me...
root@AXP:/home/love# flashrom -E -V >dump_erase_Pm49FL004T_on_i865.txt ERASE FAILED at 0x00000000! Expected=0xff, Read=0x49, failed byte count from 0x00000000-0x0000ffff: 0x403 ERASE FAILED! ERASE FAILED! ERROR at 0x00000000: Expected=0xff, Read=0x49 Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom@flashrom.org
Am Sonntag, den 11.07.2010, 17:32 +0400 schrieb Alex Loktionoff:
Good day, I have flashing problem.
The Pm49FL004T flash recognized automatically. I can read it no problem.
But I can't re-flash it.
That's the typical symptom of a board needing a board enable. That's a small piece of code that tells the board to release the "write protect" pin from the flash chip to enable re-flashing.
If you send us the output of "lspci -nnvvvxxx", "superiotool -deV" (get superiotool from http://www.coreboot.org/Superiotool#Installation), and finally a link to an official BIOS update for your board, we can add support for that board to flashrom.
Regards, Michael Karcher
Am Sonntag, den 11.07.2010, 19:58 +0200 schrieb Michael Karcher:
If you send us the output of "lspci -nnvvvxxx", "superiotool -deV" (get superiotool from http://www.coreboot.org/Superiotool#Installation), and finally a link to an official BIOS update for your board, we can add support for that board to flashrom.
dumps received by private mail, attached.
Regards, Michael Karcher
lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-July/003889.html
Signed-off-by: Michael Karcher flashrom@mkarcher.dialup.fu-berlin.de --- board_enable.c | 2 ++ print.c | 1 + 2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/board_enable.c b/board_enable.c index 57745fc..d907404 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1250,6 +1250,7 @@ static int intel_ich_gpio19_raise(void) * - ASUS P4B266LM (Sony Vaio PCV-RX650): socket478 + 845D + ICH2. * - ASUS P4C800-E Deluxe: socket478 + 875P + ICH5. * - ASUS P4P800-E Deluxe: Intel socket478 + 865PE + ICH5R. + * - Samsung Polaris 32: socket478 + 865P + ICH5. */ static int intel_ich_gpio21_raise(void) { @@ -1700,6 +1701,7 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x10DE, 0x005E, 0x1462, 0x7135, 0x10DE, 0x0050, 0x1462, 0x7135, NULL, "msi", "k8n-neo3", "MSI", "MS-7135 (K8N Neo3)", 0, OK, w83627thf_gpio44_raise_4e}, {0x10DE, 0x0270, 0x1462, 0x7207, 0x10DE, 0x0264, 0x1462, 0x7207, NULL, NULL, NULL, "MSI", "MS-7207 (K8N GM2-L)", 0, NT, nvidia_mcp_gpio2_raise}, {0x1011, 0x0019, 0xaa55, 0xaa55, 0x8086, 0x7190, 0, 0, NULL, NULL, NULL, "Nokia", "IP530", 0, OK, fdc37b787_gpio50_raise_3f0}, + {0x8086, 0x24d3, 0x144d, 0xb025, 0x8086, 0x1050, 0x144d, 0xb025, NULL, NULL, NULL, "Samsung", "Polaris 32", 0, OK, intel_ich_gpio21_raise}, {0x1106, 0x3099, 0, 0, 0x1106, 0x3074, 0, 0, NULL, "shuttle", "ak31", "Shuttle", "AK31", 0, OK, w836xx_memw_enable_2e}, {0x1106, 0x3104, 0x1297, 0xa238, 0x1106, 0x3059, 0x1297, 0xc063, NULL, NULL, NULL, "Shuttle", "AK38N", 256, OK, NULL}, {0x10DE, 0x0050, 0x1297, 0x5036, 0x1412, 0x1724, 0x1297, 0x5036, NULL, NULL, NULL, "Shuttle", "FN25", 0, OK, board_shuttle_fn25}, diff --git a/print.c b/print.c index 65ff1e3..425beb8 100644 --- a/print.c +++ b/print.c @@ -399,6 +399,7 @@ const struct board_info boards_known[] = { B("PC Engines", "Alix.3d3", 1, "http://pcengines.ch/alix3d3.htm", NULL), B("PC Engines", "WRAP.2E", 1, "http://pcengines.ch/wrap2e1.htm", NULL), B("RCA", "RM4100", 1, "http://www.settoplinux.org/index.php?title=RCA_RM4100", NULL), + B("Samsung", "Polaris 32", 1, "", NULL), B("Shuttle", "AK31", 1, "http://www.motherboard.cz/mb/shuttle/AK31.htm", NULL), B("Shuttle", "AK38N", 1, "http://eu.shuttle.com/en/desktopdefault.aspx/tabid-36/558_read-9889/", NULL), B("Shuttle", "FD37", 1, "http://www.shuttle.eu/products/discontinued/barebones/sd37p2/", NULL),
-
Alex Loktionoff -
Michael Karcher