[commit] r1856 - trunk

[repository service]

Author: stefanct
Date: Fri Dec  5 23:56:13 2014
New Revision: 1856
URL: http://flashrom.org/trac/flashrom/changeset/1856

Log:
Add support for Intel 82599 10 GbE NICs.

The Intel 82599 series of 10 GbE controllers has a bit-banged SPI
interface that's register-compatible with the one in the 1 GbE
controllers, except the register addresses are shifted up by
0x10000, cf. Intel document 331520:
http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599...

This patch was tested with a board that has the 0x10fc device and a Micron
M25P40 SPI flash chip. The PCI IDs and names for the devices are per Intel document 331521
https://www-ssl.intel.com/content/dam/www/public/us/en/documents/specificati...
and the PCI SIG device ID registry with small refinements.

Signed-off-by: Ed Swierk 
Signed-off-by: Stefan Tauner 
Acked-by: Stefan Tauner

Modified:
   trunk/nicintel_spi.c

Modified: trunk/nicintel_spi.c
==============================================================================
--- trunk/nicintel_spi.c	Sun Nov 30 23:31:12 2014	(r1855)
+++ trunk/nicintel_spi.c	Fri Dec  5 23:56:13 2014	(r1856)
@@ -29,6 +29,9 @@
  *
  * Intel 82574 Gigabit Ethernet Controller Family Datasheet
  * http://www.intel.com/content/www/us/en/ethernet-controllers/82574l-gbe-contr...
+ *
+ * Intel 82599 10 GbE Controller Datasheet (331520)
+ * http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599...
  */

#include <stdlib.h>
@@ -50,7 +53,7 @@
  * Table 13-6
  *
  * Bit 04, 05: FWE (Flash Write Enable Control)
- * 00b = not allowed
+ * 00b = not allowed (on some cards this sends an erase command if bit 31 (FL_ER) of FLA is set)
  * 01b = flash writes disabled
  * 10b = flash writes enabled
  * 11b = not allowed
@@ -80,6 +83,18 @@
    {PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"},
    {PCI_VENDOR_ID_INTEL, 0x10d3, OK, "Intel", "82574L Gigabit Ethernet Controller"},

+	{PCI_VENDOR_ID_INTEL, 0x10d8, NT, "Intel", "82599 10 Gigabit Unprogrammed Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x10f7, NT, "Intel", "82599 10 Gigabit KX4 Dual Port Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x10f8, NT, "Intel", "82599 10 Gigabit Dual Port Backplane Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x10f9, NT, "Intel", "82599 10 Gigabit CX4 Dual Port Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x10fb, NT, "Intel", "82599 10-Gigabit SFI/SFP+ Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x10fc, OK, "Intel", "82599 10 Gigabit XAUI/BX4 Dual Port Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x1517, NT, "Intel", "82599 10 Gigabit KR Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x151c, NT, "Intel", "82599 10 Gigabit TN Network Controller"},
+	{PCI_VENDOR_ID_INTEL, 0x1529, NT, "Intel", "82599 10 Gigabit Dual Port Network Controller with FCoE"},
+	{PCI_VENDOR_ID_INTEL, 0x152a, NT, "Intel", "82599 10 Gigabit Dual Port Backplane Controller with FCoE"},
+	{PCI_VENDOR_ID_INTEL, 0x1557, NT, "Intel", "82599 10 Gigabit SFI Network Controller"},
+
    {0},
 };

@@ -183,7 +198,13 @@
    if (!io_base_addr)
    	return 1;

-	nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr, MEMMAP_SIZE);
+	if (dev->device_id < 0x10d8) {
+		nicintel_spibar = rphysmap("Intel Gigabit NIC w/ SPI flash", io_base_addr,
+					   MEMMAP_SIZE);
+	} else {
+		nicintel_spibar = rphysmap("Intel 10 Gigabit NIC w/ SPI flash", io_base_addr + 0x10000,
+					   MEMMAP_SIZE);
+	}
    if (nicintel_spibar == ERROR_PTR)
    	return 1;