On Sun, Nov 15, 2009 at 06:13:29PM +0100, svn@flashrom.org wrote:
Author: hailfinger Date: 2009-11-15 18:13:29 +0100 (Sun, 15 Nov 2009) New Revision: 759
static int enable_flash_sis630(struct pci_dev *dev, const char *name)
/* First probe for Super I/O on config port 0x2e. */
- OUTB(0x87, 0x2e);
- OUTB(0x01, 0x2e);
- OUTB(0x55, 0x2e);
- OUTB(0x55, 0x2e);
- siobase = 0x2e;
- enter_conf_mode_ite(siobase);
- if (INB(0x2f) != 0x87) {
- if (INB(siobase + 1) != 0x87) { /* If that failed, try config port 0x4e. */
OUTB(0x87, 0x4e);OUTB(0x01, 0x4e);OUTB(0x55, 0x4e);OUTB(0xaa, 0x4e);if (INB(0x4f) != 0x87) {printf("Can not access SiS 950\n");
siobase = 0x4e;enter_conf_mode_ite(siobase);if (INB(siobase + 1) != 0x87) {printf("Can not find SuperI/O.\n"); return -1;
OUTB(0x24, 0x4e);b = INB(0x4f) | 0xfc;OUTB(0x24, 0x4e);OUTB(b, 0x4f);OUTB(0x02, 0x4e);OUTB(0x02, 0x4f);}
OUTB(0x24, 0x2e);
printf_debug("2f is %#x\n", INB(0x2f));
b = INB(0x2f) | 0xfc;
OUTB(0x24, 0x2e);
OUTB(b, 0x2f);
- /* Enable flash mapping. Works for most old ITE style SuperI/O. */
- tmp = sio_read(siobase, 0x24);
- tmp |= 0xfc;
- sio_write(siobase, 0x24, tmp);
- OUTB(0x02, 0x2e);
- OUTB(0x02, 0x2f);
- exit_conf_mode_ite(siobase);
- return 0;
- return ret;
}
Superio code in the chipset enable... Needs to be moved out, some VT823x based boards also require the same stuff.
Maybe we need a superio_enable.c, which not only sets bits like that (some winbonds need the same) but which also contain the gpio specific routines.
Luc Verhaegen.
On Sun, Dec 06, 2009 at 07:46:32AM +0100, Luc Verhaegen wrote:
On Sun, Nov 15, 2009 at 06:13:29PM +0100, svn@flashrom.org wrote:
Author: hailfinger Date: 2009-11-15 18:13:29 +0100 (Sun, 15 Nov 2009) New Revision: 759
static int enable_flash_sis630(struct pci_dev *dev, const char *name)
/* First probe for Super I/O on config port 0x2e. */
- OUTB(0x87, 0x2e);
- OUTB(0x01, 0x2e);
- OUTB(0x55, 0x2e);
- OUTB(0x55, 0x2e);
- siobase = 0x2e;
- enter_conf_mode_ite(siobase);
- if (INB(0x2f) != 0x87) {
- if (INB(siobase + 1) != 0x87) { /* If that failed, try config port 0x4e. */
OUTB(0x87, 0x4e);OUTB(0x01, 0x4e);OUTB(0x55, 0x4e);OUTB(0xaa, 0x4e);if (INB(0x4f) != 0x87) {printf("Can not access SiS 950\n");
siobase = 0x4e;enter_conf_mode_ite(siobase);if (INB(siobase + 1) != 0x87) {printf("Can not find SuperI/O.\n"); return -1;
OUTB(0x24, 0x4e);b = INB(0x4f) | 0xfc;OUTB(0x24, 0x4e);OUTB(b, 0x4f);OUTB(0x02, 0x4e);OUTB(0x02, 0x4f);}
OUTB(0x24, 0x2e);
printf_debug("2f is %#x\n", INB(0x2f));
b = INB(0x2f) | 0xfc;
OUTB(0x24, 0x2e);
OUTB(b, 0x2f);
- /* Enable flash mapping. Works for most old ITE style SuperI/O. */
- tmp = sio_read(siobase, 0x24);
- tmp |= 0xfc;
- sio_write(siobase, 0x24, tmp);
- OUTB(0x02, 0x2e);
- OUTB(0x02, 0x2f);
- exit_conf_mode_ite(siobase);
- return 0;
- return ret;
}
Superio code in the chipset enable... Needs to be moved out, some VT823x based boards also require the same stuff.
Maybe we need a superio_enable.c, which not only sets bits like that (some winbonds need the same) but which also contain the gpio specific routines.
Luc Verhaegen.
This code has been there since the very first import into this tree, namely when Ron introduced flash_and_burn to coreboot_v2, from before the chipset/board split, from when there was still one bit of code in flash_on.c which existed purely for the sis630.
Sis950 seems to be just a rebadged it8705.
The superio code has no place in chipset_enable anymore :)
Luc Verhaegen.
On Sun, Dec 06, 2009 at 08:13:36AM +0100, Luc Verhaegen wrote:
This code has been there since the very first import into this tree, namely when Ron introduced flash_and_burn to coreboot_v2, from before the chipset/board split, from when there was still one bit of code in flash_on.c which existed purely for the sis630.
Sis950 seems to be just a rebadged it8705.
The superio code has no place in chipset_enable anymore :)
Luc Verhaegen.
For now, i suggest removing the code and then wait for the complaints to hit us. If superiotool tells us it8705, we know what we need to do.
Luc Verhaegen.
-
Luc Verhaegen