Add support for AMD's Bolton chipset. The SPI controller on the bolton chipset uses the same 3-bit speed settings as yangtze, but is otherwise the same as the hudson chips. Note that the Bolton RRG doesn't specify a speed setting for the bit setting of 0b111, so I'm assuming that it's the same setting as yangtze.
Signed-off-by: Martin Roth martin.roth@se-eng.com
Thanks for your patch! Although this is a small patch, I have to nag about some stuff...
On Mon, 09 Jun 2014 14:48:59 -0600 Martin Roth martin.roth@se-eng.com wrote:
Index: sb600spi.c
--- sb600spi.c (revision 1818) +++ sb600spi.c (working copy) @@ -137,7 +138,10 @@ if (rev >= 0x11 && rev <= 0x15) { amd_gen = CHIPSET_HUDSON234; msg_pdbg("Hudson-2/3/4 detected.\n");
} else if (rev >= 0x39 && rev <= 0x3A) {
} else if (rev == 0x16) {
^^ Move one space from here...
amd_gen = CHIPSET_BOLTON;
msg_pdbg("Bolton detected.\n");
}else if (rev >= 0x39 && rev <= 0x3A) {
to here. ^^
amd_gen = CHIPSET_YANGTZE; msg_pdbg("Yangtze detected.\n"); } else {
@@ -453,6 +457,29 @@ msg_pdbg("FastSpeedNew is %s\n", spispeeds[(tmp >> 8) & 0xf].name); msg_pdbg("AltSpeedNew is %s\n", spispeeds[(tmp >> 4) & 0xf].name); msg_pdbg("TpmSpeedNew is %s\n", spispeeds[(tmp >> 0) & 0xf].name);
- } else if (amd_gen == CHIPSET_BOLTON) {
static const char *spireadmodes[] = {
"Normal (up to 33 MHz)", /* 0 */
"Reserved", /* 1 */
"Dual IO (1-1-2)", /* 2 */
"Quad IO (1-1-4)", /* 3 */
"Dual IO (1-2-2)", /* 4 */
"Quad IO (1-4-4)", /* 5 */
"Normal (up to 66 MHz)", /* 6 */
"Fast Read", /* 7 (I'm Assuming... This value isn't in the bolton RRG) */
};
tmp = mmio_readl(sb600_spibar + 0x00);
uint8_t read_mode = ((tmp >> 28) & 0x6) | ((tmp >> 18) & 0x1);
msg_pdbg("SpiReadMode=%s (%i)\n", spireadmodes[read_mode], read_mode);
if (read_mode != 6) {
read_mode = 6; /* Default to "Normal (up to 66 MHz)" */
if (set_mode(dev, read_mode) != 0) {
msg_perr("Setting read mode to \"%s\" failed.\n", spireadmodes[read_mode]);
return 1;
}
msg_pdbg("Setting read mode to \"%s\" succeeded.\n", spireadmodes[read_mode]);
}
Apart from the FastSpeedNew etc. bits yangtze's and bolton's branches are equal here. If FastSpeedNew etc. is really only in yangtze (quite probable because that's an SPI 100 thing), then why not guard that with an additional "amd_gen >= CHIPSET_YANGTZE" but combine the rest with bolton by using(amd_gen >= CHIPSET_BOLTON)?
} else { if (amd_gen >= CHIPSET_SB89XX && amd_gen <= CHIPSET_HUDSON234) { bool fast_read = (mmio_readl(sb600_spibar + 0x00) >> 18) & 0x1;
Hello,
I have just committed a refined version of Martin's patch in r1830 that enables support for AMD Bolton-based chipsets. The addressees of this mail have reported different mainboards to be not working with flashrom because of its lack of Bolton support in the past. There might still be issues with individual board models but in general flashrom should work on Bolton-based devices from now on. If you test it on your board please report back any outcome (with a verbose log and the exact board model), thanks.
Hi,
I finally got to verify operation with the updated revision of flashrom. While it correctly detected the chipset now, it displayed some error messages about a nonexistant mapping. See the attached text files for the output. I also included a verbose output that might help as well as a fresh lspci output even though I'm fairly sure it didn't change from last time.
Best regards,
Marcus Pollice
On 15.07.2014 16:01, Stefan Tauner wrote:
Hello,
I have just committed a refined version of Martin's patch in r1830 that enables support for AMD Bolton-based chipsets. The addressees of this mail have reported different mainboards to be not working with flashrom because of its lack of Bolton support in the past. There might still be issues with individual board models but in general flashrom should work on Bolton-based devices from now on. If you test it on your board please report back any outcome (with a verbose log and the exact board model), thanks.
On Tue, 26 Aug 2014 11:47:30 +0200 Marcus Pollice marcus.pollice@gmail.com wrote:
Hi,
I finally got to verify operation with the updated revision of flashrom. While it correctly detected the chipset now, it displayed some error messages about a nonexistant mapping. See the attached text files for the output. I also included a verbose output that might help as well as a fresh lspci output even though I'm fairly sure it didn't change from last time.
Hello Marcus,
the message about the non-existent mappings was just a cosmetic issue and should be fixed now as well. The log looks fine.