On Mon, 20 Jun 2011 11:54:45 -0700 David Hendricks dhendrix@google.com wrote:
On Tue, Jun 7, 2011 at 7:55 PM, Stefan Tauner < stefan.tauner@student.tuwien.ac.at> wrote:
+static uint32_t ich_hwseq_get_erase_block_size(unsigned int addr) +{
REGWRITE32(ICH9_REG_FADDR, (addr & 0x00FFFFFF));
uint8_t enc_berase = (REGREAD16(ICH9_REG_HSFS) & HSFS_BERASE) >>
HSFS_BERASE_OFF;
const uint32_t dec_berase[4] = {
256,
4 * 1024,
8 * 1024,
64 * 1024
};
return dec_berase[enc_berase];
Others might want to comment, but I think you should avoid doing all that work in the variable declaration area.
no need. you are correct, i have revamped it. thanks
+}
+int ich_hwseq_probe(struct flashchip *flash) +{
uint32_t total_size, boundary;
uint32_t erase_size_low, size_low, erase_size_high, size_high;
struct block_eraser eraser;
This should be a pointer, right? I am assuming you intended to directly update the flash->block_erasers[0] member later in this function.
inderdaad! :)
thanks a lot, fixup! patch attached.
another patch: - dont trash hsfc in ich_hwseq_block_erase and ich_hwseq_write_256
this and the previous one belong to the 4.2 series... i will send a completely updated patch set when dhendrix gets erase+write to work.
On Mon, Jun 20, 2011 at 3:12 PM, Stefan Tauner < stefan.tauner@student.tuwien.ac.at> wrote:
another patch:
- dont trash hsfc in ich_hwseq_block_erase and ich_hwseq_write_256
this and the previous one belong to the 4.2 series... i will send a completely updated patch set when dhendrix gets erase+write to work.
Added the final minor fixup patch :-)
Logs attached. Long story short: Read/erase/write are all working now, at least for the single ROM configuration.
When you revise your patch set, please remember to remove the extra debug prints.
Patch is Signed-off-by: David Hendricks dhendrix@google.com