I found this in a Chinese router, read tested (twice, successful) but not yet write/erase tested. Based on information from the datasheet at http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1....
Signed-off-by: Steven Honeyman stevenhoneyman@gmail.com
Index: flashchips.c =================================================================== --- flashchips.c (revision 1888) +++ flashchips.c (working copy) @@ -9708,8 +9708,46 @@ .voltage = {2700, 3600}, /* 2.3-3.6V for Pm25LD040 */ },
-{ + { .vendor = "PMC", + .name = "Pm25LQ032", + .bustype = BUS_SPI, + .manufacture_id = PMC_ID, + .model_id = PMC_PM25LQ032, + .total_size = 4096, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, /* sector erase */ + }, { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_d7, /* sector erase */ + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, /* block erase */ + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_block_erase_60, /* chip erase */ + }, { + .eraseblocks = { {4096 * 1024, 1} }, + .block_erase = spi_block_erase_c7, /* chip erase */ + } + }, + .printlock = spi_prettyprint_status_register_bp3_srwd, + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ + .voltage = {2700, 3600}, /* 2.7-3.6V for Pm25Q032 */ + }, + + { + .vendor = "PMC", .name = "Pm25LV512(A)", .bustype = BUS_SPI, .manufacture_id = PMC_ID_NOPREFIX, Index: flashchips.h =================================================================== --- flashchips.h (revision 1888) +++ flashchips.h (working copy) @@ -560,6 +560,7 @@ #define PMC_PM25LD512 0x20 /* Same as Pm25LD512C, but the latter has more locking options. */ #define PMC_PM25LD010 0x21 /* Same as Pm25LD010C, but the latter has more locking options. */ #define PMC_PM25LD020 0x22 /* Same as Pm25LD020C, but the latter has more locking options. */ +#define PMC_PM25LQ032 0x46 #define PMC_PM25LV512 0x7B /* Same as Pm25LV512A */ #define PMC_PM25LV010 0x7C /* Same as Pm25LV010A, but the former does not support RDID but RES3 only. */ #define PMC_PM25LV020 0x7D