Hi,
here's the info for the GIGABYTE GA-8I945GZME-RH, doesn't seem to work with flashrom yet, logs below.
I got the board name from dmidecode, I have no physical access to the box so I cannot check the name on the PCB (or measure any pins etc).
flashrom v0.9.2-r1145 on Linux 2.6.25-2-686 (i686), built with libpci 3.1.2, GCC 4.2.4 (Debian 4.2.4-6), little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. No coreboot table found. Found ITE Super I/O, id 8718 Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. This chipset supports the following protocols: SPI. Found chip "SST SST25VF040.REMS" (512 KB, SPI) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... spi_block_erase_20 failed during command execution at address 0x0 spi_block_erase_52 failed during command execution at address 0x0 spi_chip_erase_60 failed during command execution FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net (channel #flashrom) or mail flashrom@flashrom.org! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF!
The chip was not altered, a verify against a previous backup was fine.
lspci, superiotool, and flashrom -V attached.
Uwe.
Hi Uwe,
On 25.08.2010 15:27, Uwe Hermann wrote:
here's the info for the GIGABYTE GA-8I945GZME-RH, doesn't seem to work with flashrom yet, logs below.
Thanks for the logs.
flashrom v0.9.2-r1145 on Linux 2.6.25-2-686 (i686), built with libpci 3.1.2, GCC 4.2.4 (Debian 4.2.4-6), little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. This chipset supports the following protocols: SPI. Found chip "SST SST25VF040.REMS" (512 KB, SPI) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... spi_block_erase_20 failed during command execution at address 0x0 spi_block_erase_52 failed during command execution at address 0x0 spi_chip_erase_60 failed during command execution
Looks like we need to merge the ICH SPI dynamic reprogramming patch by Helge Wagner. I'll try to review it later this week.
Regards, Carl-Daniel
On Wed, Aug 25, 2010 at 03:47:50PM +0200, Carl-Daniel Hailfinger wrote:
Hi Uwe,
On 25.08.2010 15:27, Uwe Hermann wrote:
here's the info for the GIGABYTE GA-8I945GZME-RH, doesn't seem to work with flashrom yet, logs below.
Thanks for the logs.
flashrom v0.9.2-r1145 on Linux 2.6.25-2-686 (i686), built with libpci 3.1.2, GCC 4.2.4 (Debian 4.2.4-6), little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. This chipset supports the following protocols: SPI. Found chip "SST SST25VF040.REMS" (512 KB, SPI) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... Erasing flash chip... spi_block_erase_20 failed during command execution at address 0x0 spi_block_erase_52 failed during command execution at address 0x0 spi_chip_erase_60 failed during command execution
Looks like we need to merge the ICH SPI dynamic reprogramming patch by Helge Wagner. I'll try to review it later this week.
I've tested the patch and it seems to work here (though it detected _two_ chips now instead of one; I commented out one of them as suggested by twice11 on IRC, then it worked fine). Not sure what the permanent fix is.
"flashrom -V -w" output attached.
Uwe.
-
Carl-Daniel Hailfinger -
Uwe Hermann