typo in SPI prettyprint?

[Pablo Cases]

Hi,

Browsed through the code and noticed a possible typo in sp25_statusreg.c: spi_prettyprint_status_register_bp (r1850)

Shouldn't Block Protect 4 bit be shifted 6 steps instead of 5?

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/* Common block protection (BP) bits. */
static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
{
        switch (bp) {
        /* Fall through. */
        case 4:
                msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
                         (status & (1 << 5)) ? "" : "not ");
        case 3:
                msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
                         (status & (1 << 5)) ? "" : "not ");
        case 2:
                msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
                         (status & (1 << 4)) ? "" : "not ");
        case 1:
                msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
                         (status & (1 << 3)) ? "" : "not ");
        case 0:
                msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
                         (status & (1 << 2)) ? "" : "not ");
        }
}

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Pablo Cases, M.Sc.
Senior Software Engineer
FlatFrog Laboratories AB
Traktorvägen 11