flashrom support for EP-9NPA7I

[Stefan Tauner]

hello clr!

you have missed carl-daniel or vice-versa one time and you never came
back after that.
i have dug up some info about the predecessor of your board i.e. 8NPA7I.
the board enable that was executed on your machine by mistake is not
complete (not even for the 8NPA7I) so it is expected to not work for
you.
i have not reverse engineered your bios (update tool), so i am not sure
at all that the attached patch would help and not reboot/ruin/ignite
your machine. but if you are brave you can try it.

PS: this patch is not for merge, because we have no idea what 0x92
really does imho. but we could incorporate this into a board enable
function, if it really works or do you (fellow flashrom dev) think it is
ok to just merge it as is?
PPS: this is just a port of http://patchwork.coreboot.org/patch/2125/

[Colin L. Rice]

Sorry for missing you guys earlier. It works.

Note that this is an EP-9NPa7I. But eh whatever.

Output:

flashrom v0.9.3-r1338 on Linux 2.6.38-8-generic (x86_64), built with libpci
3.1.7, GCC 4.5.2, little endian
flashrom is free software, get the source code at http://www.flashrom.org

Calibrating delay loop... delay loop is unreliable, trying to continue OK.
Found chipset "NVIDIA CK804", enabling flash write... OK.
This chipset supports the following protocols: Non-SP.
Disabling flash write protection for board "EPoX EP-8NPA7I"... OK.
Found chip "SST SST49LF004A/B" (512 kB, FWH) at physical address 0xfff80000.
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Erasing and writing flash chip... Done.
Verifying flash... VERIFIED.

On Sun, Jun 19, 2011 at 4:51 PM, Stefan Tauner <
[e-mail]> wrote:
> hello clr!
>
> you have missed carl-daniel or vice-versa one time and you never came
> back after that.
> i have dug up some info about the predecessor of your board i.e. 8NPA7I.
> the board enable that was executed on your machine by mistake is not
> complete (not even for the 8NPA7I) so it is expected to not work for
> you.
> i have not reverse engineered your bios (update tool), so i am not sure
> at all that the attached patch would help and not reboot/ruin/ignite
> your machine. but if you are brave you can try it.
>
> PS: this patch is not for merge, because we have no idea what 0x92
> really does imho. but we could incorporate this into a board enable
> function, if it really works or do you (fellow flashrom dev) think it is
> ok to just merge it as is?
> PPS: this is just a port of http://patchwork.coreboot.org/patch/2125/
> --
> Kind regards/Mit freundlichen Grüßen, Stefan Tauner

[Stefan Tauner]

On Sun, 19 Jun 2011 22:54:31 -0500
"Colin L. Rice"  wrote:
> Sorry for missing you guys earlier. It works.
>
> Note that this is an EP-9NPa7I. But eh whatever.

jup i am aware of that. i have a fix for the "misdetection", but it was
on purpose that i let you try the 0x92 patch without that fix.
thanks a lot for your testing! your board will be supported in one way
or another by the next release.
> Output:
>
> flashrom v0.9.3-r1338 on Linux 2.6.38-8-generic (x86_64), built with libpci
> 3.1.7, GCC 4.5.2, little endian
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... delay loop is unreliable, trying to continue OK.
> Found chipset "NVIDIA CK804", enabling flash write... OK.
> This chipset supports the following protocols: Non-SP.
> Disabling flash write protection for board "EPoX EP-8NPA7I"... OK.
> Found chip "SST SST49LF004A/B" (512 kB, FWH) at physical address 0xfff80000.
> Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> Erasing and writing flash chip... Done.
> Verifying flash... VERIFIED.

so. the patch from jonathan works for this board too (besides the
EP-8NPA7I and a bunch of others according to him).
the question now is if we want to enable it for all ck804 boards by
default (i.e. ack the patch as is), or if we wanna put it in a board
enable.
i think it is ok to apply it as is, even if we are not 100% sure it is
safe everywhere.
please speak out now if you differ before i ack it.

[Joshua Roys]

On 06/20/2011 03:45 PM, Stefan Tauner wrote:
> On Sun, 19 Jun 2011 22:54:31 -0500
> "Colin L. Rice"  wrote:
> > Sorry for missing you guys earlier. It works.
> >
> > Note that this is an EP-9NPa7I. But eh whatever.
>
> jup i am aware of that. i have a fix for the "misdetection", but it was
> on purpose that i let you try the 0x92 patch without that fix.
> thanks a lot for your testing! your board will be supported in one way
> or another by the next release.
> > Output:
> >
> > flashrom v0.9.3-r1338 on Linux 2.6.38-8-generic (x86_64), built with libpci
> > 3.1.7, GCC 4.5.2, little endian
> > flashrom is free software, get the source code at http://www.flashrom.org
> >
> > Calibrating delay loop... delay loop is unreliable, trying to continue OK.
> > Found chipset "NVIDIA CK804", enabling flash write... OK.
> > This chipset supports the following protocols: Non-SP.
> > Disabling flash write protection for board "EPoX EP-8NPA7I"... OK.
> > Found chip "SST SST49LF004A/B" (512 kB, FWH) at physical address 0xfff80000.
> > Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> > Erasing and writing flash chip... Done.
> > Verifying flash... VERIFIED.
>
> so. the patch from jonathan works for this board too (besides the
> EP-8NPA7I and a bunch of others according to him).
> the question now is if we want to enable it for all ck804 boards by
> default (i.e. ack the patch as is), or if we wanna put it in a board
> enable.
> i think it is ok to apply it as is, even if we are not 100% sure it is
> safe everywhere.
> please speak out now if you differ before i ack it.

I've seen this in at least 3 board enables recently, so:
Acked-by: Joshua Roys

Thanks Jonathan and Stefan!

Josh

[Stefan Tauner]

On Thu, 04 Aug 2011 08:49:13 -0400
Joshua Roys  wrote:
> On 06/20/2011 03:45 PM, Stefan Tauner wrote:
> > On Sun, 19 Jun 2011 22:54:31 -0500
> > "Colin L. Rice"  wrote:
> > > Sorry for missing you guys earlier. It works.
> > >
> > > Note that this is an EP-9NPa7I. But eh whatever.
> >
> > jup i am aware of that. i have a fix for the "misdetection", but it was
> > on purpose that i let you try the 0x92 patch without that fix.
> > thanks a lot for your testing! your board will be supported in one way
> > or another by the next release.
> > > Output:
> > >
> > > flashrom v0.9.3-r1338 on Linux 2.6.38-8-generic (x86_64), built with libpci
> > > 3.1.7, GCC 4.5.2, little endian
> > > flashrom is free software, get the source code at http://www.flashrom.org
> > >
> > > Calibrating delay loop... delay loop is unreliable, trying to continue OK.
> > > Found chipset "NVIDIA CK804", enabling flash write... OK.
> > > This chipset supports the following protocols: Non-SP.
> > > Disabling flash write protection for board "EPoX EP-8NPA7I"... OK.
> > > Found chip "SST SST49LF004A/B" (512 kB, FWH) at physical address 0xfff80000.
> > > Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
> > > Erasing and writing flash chip... Done.
> > > Verifying flash... VERIFIED.
> >
> > so. the patch from jonathan works for this board too (besides the
> > EP-8NPA7I and a bunch of others according to him).
> > the question now is if we want to enable it for all ck804 boards by
> > default (i.e. ack the patch as is), or if we wanna put it in a board
> > enable.
> > i think it is ok to apply it as is, even if we are not 100% sure it is
> > safe everywhere.
> > please speak out now if you differ before i ack it.
>
> I've seen this in at least 3 board enables recently, so:
> Acked-by: Joshua Roys

hm... last question hopefully:
can you remember any MCP51 boards that needed the 0x92 register cleared
too? because we use the ck808 init for those too...
we can test this with the last report from Márton Miklós, but if it
does not need it this patch, i would not know what to do... :)

[Stefan Tauner]

On Thu, 4 Aug 2011 22:24:36 +0200
Stefan Tauner  wrote:
> On Thu, 04 Aug 2011 08:49:13 -0400
> Joshua Roys  wrote:
> > I've seen this in at least 3 board enables recently, so:
> > Acked-by: Joshua Roys
>
> hm... last question hopefully:
> can you remember any MCP51 boards that needed the 0x92 register cleared
> too? because we use the ck808 init for those too...
> we can test this with the last report from Márton Miklós, but if it
> does not need it this patch, i would not know what to do... :)

since the MCP51 variations are all tagged as NT, i have committed this
anyway (r1405), thanks!

[Stefan Tauner]

> On Sun, 19 Jun 2011 22:54:31 -0500
> "Colin L. Rice" <dah4k0r at gmail.com> wrote:
> > Sorry for missing you guys earlier. It works.
> >
> > Note that this is an EP-9NPa7I. But eh whatever.
>
> jup i am aware of that. i have a fix for the "misdetection", but it was
> on purpose that i let you try the 0x92 patch without that fix.
> thanks a lot for your testing! your board will be supported in one way
> or another by the next release.

that was a lie, sorry. :) we did not include a real fix for this in the
0.9.4 release, but i have now committed one and the EP-9NPA7I should be
supported from now (r1406) on without any additional patches.
thanks again for your tests!