friend of mine allowed me to play with his dual fiber nic remotely.
it is an Intel PRO/1000 MF PCI-X card based on the 82545GM controller: http://geizhals.at/119043 http://download.intel.com/design/network/datashts/82545gm_ds.pdf http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf
i was able to probe the attached chip (SST39VF020) after adding the PCI ID, but reads returned all 0xFF. i need to verify that this is not correct, but i am quite certain that there is a working bootrom in there. i have not looked too much at the code, commit log, ml archive or the datasheet yet, maybe there is something obvious for you...?
why does flashrom detect the card twice although there is only one in there?
should we add a maximum size field to the pcidev_status arrays that hold pci programmers? i wanted to do something like that ever since i discovered that the 3com nic have a 128 kB limit (after borrowing a bunch of them to access a 256 kB chip...).
PS: i have also tried to add the other nic's PCI ID (82562EZ-based) to no avail.
On Mon, 1 Aug 2011 14:54:54 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
i was able to probe the attached chip (SST39VF020) after adding the PCI ID, but reads returned all 0xFF. i need to verify that this is not correct, but i am quite certain that there is a working bootrom in there.
i forgot to mention a small detail in my first mail. i started by adding the pci id to nicintel_spi.c instead of nicintel.c because i thought: gigabit - probably spi flash. but that was wrong.
that was a happenstance though, because i now discovered that it needs a write enable just like the one in nicintel_spi_init.
after adding the pci ids to both, trying to probe with the spi code (which would loop forever) to write enable the nic...
root@testink:~/flashrom/git-svn# dd if=/dev/urandom of=../256kb_rand.img bs=1k count=256 256+0 records in 256+0 records out 262144 bytes (262 kB) copied, 0.0576867 s, 4.5 MB/s root@testink:~/flashrom/git-svn# ./flashrom -p nicintel -VV -w ../256kb_rand.img flashrom v0.9.4-r1401 on Linux 2.6.38-10-generic (i686), built with libpci 3.1.7, GCC 4.5.2, little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OS timer resolution is 1 usecs, 1803M loops per second, 10 myus = 11 us, 100 myus = 106 us, 1000 myus = 999 us, 10000 myus = 10052 us, 4 myus = 5 us, OK. Initializing nicintel programmer Found "Intel 82545GM Gigabit Ethernet Controller (fiber)" (8086:1027, BDF 01:0b.0). PCI header type 0x00 Requested BAR is MEM, 64bit, not prefetchable === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom@flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Found "Intel 82545GM Gigabit Ethernet Controller (fiber)" (8086:1027, BDF 01:0b.0). PCI header type 0x00 Requested BAR is MEM, 64bit, not prefetchable === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom@flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Mapping Intel NIC control/status reg at 0xfe5c0000, unaligned size 0x10. […] Probing for SST SST39VF010, 128 kB: probe_jedec_common: id1 0xbf, id2 0xd6 Probing for SST SST39VF020, 256 kB: probe_jedec_common: id1 0xbf, id2 0xd6 Found SST flash chip "SST39VF020" (256 kB, Parallel) on nicintel. Probing for SST SST39VF040, 512 kB: probe_jedec_common: id1 0xbf, id2 0xd6 Probing for SST SST39VF080, 1024 kB: Chip size 1024 kB is bigger than supported size 512 kB of chipset/board/programmer for Parallel interface, probe/read/erase/write may fail. probe_jedec_common: id1 0xbf, id2 0xd6 […] === This flash part has status UNTESTED for operations: READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Reading old flash chip contents... done. Erasing and writing flash chip... Trying erase function 0... 0x000000-0x000fff:W, 0x001000-0x001fff:W, 0x002000-0x002fff:W, 0x003000-0x003fff:W, 0x004000-0x004fff:W, 0x005000-0x005fff:W, 0x006000-0x006fff:W, 0x007000-0x007fff:W, 0x008000-0x008fff:W, 0x009000-0x009fff:W, 0x00a000-0x00afff:W, 0x00b000-0x00bfff:W, 0x00c000-0x00cfff:W, 0x00d000-0x00dfff:W, 0x00e000-0x00efff:W, 0x00f000-0x00ffff:W, 0x010000-0x010fff:W, 0x011000-0x011fff:W, 0x012000-0x012fff:W, 0x013000-0x013fff:W, 0x014000-0x014fff:W, 0x015000-0x015fff:W, 0x016000-0x016fff:W, 0x017000-0x017fff:W, 0x018000-0x018fff:W, 0x019000-0x019fff:W, 0x01a000-0x01afff:W, 0x01b000-0x01bfff:W, 0x01c000-0x01cfff:W, 0x01d000-0x01dfff:W, 0x01e000-0x01efff:W, 0x01f000-0x01ffff:W, 0x020000-0x020fff:W, 0x021000-0x021fff:W, 0x022000-0x022fff:W, 0x023000-0x023fff:W, 0x024000-0x024fff:W, 0x025000-0x025fff:W, 0x026000-0x026fff:W, 0x027000-0x027fff:W, 0x028000-0x028fff:W, 0x029000-0x029fff:W, 0x02a000-0x02afff:W, 0x02b000-0x02bfff:W, 0x02c000-0x02cfff:W, 0x02d000-0x02dfff:W, 0x02e000-0x02efff:W, 0x02f000-0x02ffff:W, 0x030000-0x030fff:W, 0x031000-0x031fff:W, 0x032000-0x032fff:W, 0x033000-0x033fff:W, 0x034000-0x034fff:W, 0x035000-0x035fff:W, 0x036000-0x036fff:W, 0x037000-0x037fff:W, 0x038000-0x038fff:W, 0x039000-0x039fff:W, 0x03a000-0x03afff:W, 0x03b000-0x03bfff:W, 0x03c000-0x03cfff:W, 0x03d000-0x03dfff:W, 0x03e000-0x03efff:W, 0x03f000-0x03ffff:W Erase/write done. Verifying flash... VERIFIED. Restoring MMIO space at 0xb77f300c
i then flashed another random image and flashrom tried to erase too (instead of skipping it like above). that also succeeded, yay.
of course for full, mergeable support we need to hook up the nic enable somehow... any suggestions?