This patch set makes Flashrom a bit more ARM-friendly and adds raw Tegra2 SPI controller support. It isolates a few PCI-isms, adds some low-level hardware access stubs, adds Tegra2 processor detection, and adds Tegra2 raw SPI controller code.
I've attached some logfiles for read/erase/write operations. This particular patch set was tested using a board based off NVIDIA's Tegra2 reference board ("Seaboard"). Earlier revisions were tested on a Seaboard.
All three attached patches are: Signed-off-by: David Hendricks dhendrix@google.com
Much of the original U-Boot --> Flashrom porting work was done by Stefan Reinauer reinauer@google.com, and the FIFO code updated / fixed up by Louis Lo yjlou@google.com.
A few notes: 1. A few programmers must be disabled due to reliance on PCI. You can hack up your Makefile or compile with "CONFIG_RAYER_SPI=no CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_SATAMV=no".
2. Due to issues with libpci, you can't use the same binary on machines with PCI and without PCI. So for example, you can't program a SPI ROM onboard a PCI card that is connected to your ARM SoC.
3. For those who wish to try this code on Seaboard, please be aware that the UART is disabled during operation and then re-enabled afterward. This is because the MISO/MOSI are muxed with the UART (See comments in tegra2_spi.c). You will not see any Flashrom output on your serial console.
4. The tegra2_spi code was originally contributed by NVIDIA to the Chromium OS U-Boothttp://git.chromium.org/gitweb/?p=chromiumos/third_party/u-boot.git;a=blob;f=drivers/spi/tegra2_spi.c;h=15a23124027ecdad5fcec23206a0fc67b968872d;hb=HEAD branch and was later grafted into Flashrom so we could more easily perform SPI ROM updates from userspace. Please excuse minor style inconsistencies as we are trying to stay reasonably close to the code checked into the U-Boot tree ;-)
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David Hendricks