Hi there- I'm running a custom Thinkpad X210 motherboard, which has a Kaby Lake R on it. The default flash chip is 8MB, and is detected as "Opaque Flash Chip" with the correct size, and it flashes correctly. It's an MX25L64 When I replace it with a larger chip (32MB in this case), the detected chip is still the same as before (Opaque flash chip, size 8MB) but the new chip is a MX25L256. This actually works out great for using the same old images and swapping between chips, but I can't flash anything bigger if the size isn't detected correctly so it defeats the purpose of what I'm working on. What can I try to get the chips to be detected correctly? Alternatively, are there any logs or messages I can collect that would help folks on this list add chips or debug this? Thanks, Rafael
Hi Rafael, On 26.08.19 20:30, Rafael Send wrote:
When I replace it with a larger chip (32MB in this case), the detected chip is still the same as before (Opaque flash chip, size 8MB) but the new chip is a MX25L256.
the flash chip size is encoded in the Intel Firmware Descriptor (first 4KiB of the image). I don't think there is an open-source tool to update it, but if you dig into flashrom sources (ich_descriptor.[ch]), you should be able to figure out which bits to change. To make use of the additional space, you'll also have to update the partitioning (ifdtool of coreboot can do that, iirc). Alas, since Skylake, Intel doesn't allow to access the SPI bus directly anymore. So there is only the "opaque flash chip" and flashrom can't do its job with a wrong descriptor. Nico
Hi- So would the solution be to flash the larger chip with some external tool like a Raspberry Pi and adjust the size of the CBFS in coreboot (can do both, shouldn't be a problem). I guess I'll need some other payload with a SPI driver to access the remaining space (u-boot? No luck there so far..) right? Thanks, Rafael On Mon, Aug 26, 2019 at 11:43 AM Nico Huber <nico.h@gmx.de> wrote:
Hi Rafael,
On 26.08.19 20:30, Rafael Send wrote:
When I replace it with a larger chip (32MB in this case), the detected chip is still the same as before (Opaque flash chip, size 8MB) but the new chip is a MX25L256.
the flash chip size is encoded in the Intel Firmware Descriptor (first 4KiB of the image). I don't think there is an open-source tool to update it, but if you dig into flashrom sources (ich_descriptor.[ch]), you should be able to figure out which bits to change. To make use of the additional space, you'll also have to update the partitioning (ifdtool of coreboot can do that, iirc).
Alas, since Skylake, Intel doesn't allow to access the SPI bus directly anymore. So there is only the "opaque flash chip" and flashrom can't do its job with a wrong descriptor.
Nico
Hi Rafael,
So would the solution be to flash the larger chip with some external tool like a Raspberry Pi and adjust the size of the CBFS in coreboot (can do both, shouldn't be a problem).
That's part of it. However, you still need to update the flash descriptor contents (bottom 4KiB of the ROM image) so that it describes the larger flash chip you wish to use. Details about the flash descriptor layout can be found in "SPI Programming Guide" documents from Intel which may require registering an account on developer.intel.com and agreeing to their terms.
I guess I'll need some other payload with a SPI driver to access the remaining space (u-boot? No luck there so far..) right?
The limitation that Nico describes is due to the way the SPI controller works on modern Intel platforms. Software/firmware running on the CPU will not be able to access any ROM region that is not defined with appropriate parameters in the flash descriptor.
participants (3)
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David Hendricks -
Nico Huber -
Rafael Send