Hello,
I've pasted the output to:
http://paste.flashrom.org/view.php?id=1675
I tried a reboot after I've change the image and sometimes it worked as before, but in a few cases it fails. This also could be due to a faulty flashrom image.
Regards, Reiner
--
On 30.06.2013 18:12, Steven Zakulec wrote:
You'll need to provide more information than that- preferably logs. Add -o e350m1.log to your command, and paste the result on paste.flashrom.org http://paste.flashrom.org. Also, how do you know flashing seemed to work?
On Sun, Jun 30, 2013 at 10:41 AM, Reiner Luett <diffusae@yahoo.se mailto:diffusae@yahoo.se> wrote:
Hi, does anybody have a working flashrom version or could supply patches. I always get the Erase failed message, but flashing seems to work. Best regards, Reiner -- _______________________________________________ flashrom mailing list flashrom@flashrom.org <mailto:flashrom@flashrom.org> http://www.flashrom.org/mailman/listinfo/flashrom
flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
On Sun, 30 Jun 2013 19:24:57 +0200 Reiner Luett diffusae@yahoo.se wrote:
Hello,
I've pasted the output to:
http://paste.flashrom.org/view.php?id=1675
I tried a reboot after I've change the image and sometimes it worked as before, but in a few cases it fails. This also could be due to a faulty flashrom image.
Hi,
can you please upgrade flashrom to the latest development version? See http://flashrom.org/Downloads#Installation_from_source
That alone will probably not change much, but the verbose output would be more interesting to me. If my hypothesis is correct, then forcing a slower SPI clock might help. You can try the following patch to verify that: https://github.com/stefanct/flashrom/commit/480fca837b9a8b0711b8371d7ce7acf7...
On Sun, 30 Jun 2013 22:51:40 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
On Sun, 30 Jun 2013 19:24:57 +0200 Reiner Luett diffusae@yahoo.se wrote:
Hello,
I've pasted the output to:
http://paste.flashrom.org/view.php?id=1675
I tried a reboot after I've change the image and sometimes it worked as before, but in a few cases it fails. This also could be due to a faulty flashrom image.
Hi,
can you please upgrade flashrom to the latest development version? See http://flashrom.org/Downloads#Installation_from_source
That alone will probably not change much, but the verbose output would be more interesting to me. If my hypothesis is correct, then forcing a slower SPI clock might help. You can try the following patch to verify that: https://github.com/stefanct/flashrom/commit/480fca837b9a8b0711b8371d7ce7acf7...
Alternatively you can also try the attached patch, which does also change the SPI clock frequency but allows the user to specify the frequency. See commit note for details. This one is untested but similar to the other one and simple enough that i think it is quite safe for you to test. You seem to be able to recover from failing boots. Do you have an external programmer or spare chips?
Hello,
latest flashrom version failed with /dev/mem permission denied. I will try it later an send the error to you. I really like to use the patches.
I only have spare chips and the mainboard - no external programmer. :-(
Regards, Reiner
On 01.07.2013 01:17, Stefan Tauner wrote:
On Sun, 30 Jun 2013 22:51:40 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
On Sun, 30 Jun 2013 19:24:57 +0200 Reiner Luett diffusae@yahoo.se wrote:
Hello,
I've pasted the output to:
http://paste.flashrom.org/view.php?id=1675
I tried a reboot after I've change the image and sometimes it worked as before, but in a few cases it fails. This also could be due to a faulty flashrom image.
Hi,
can you please upgrade flashrom to the latest development version? See http://flashrom.org/Downloads#Installation_from_source
That alone will probably not change much, but the verbose output would be more interesting to me. If my hypothesis is correct, then forcing a slower SPI clock might help. You can try the following patch to verify that: https://github.com/stefanct/flashrom/commit/480fca837b9a8b0711b8371d7ce7acf7...
Alternatively you can also try the attached patch, which does also change the SPI clock frequency but allows the user to specify the frequency. See commit note for details. This one is untested but similar to the other one and simple enough that i think it is quite safe for you to test. You seem to be able to recover from failing boots. Do you have an external programmer or spare chips?
Hi,
with the developer version I get the following error:
Can't mmap memory using /dev/mem: Operation not permitted
Any suggestion?
Thanks a lot, Reiner
--
On 30.06.2013 22:51, Stefan Tauner wrote:
On Sun, 30 Jun 2013 19:24:57 +0200 Reiner Luett diffusae@yahoo.se wrote:
Hello,
I've pasted the output to:
http://paste.flashrom.org/view.php?id=1675
I tried a reboot after I've change the image and sometimes it worked as before, but in a few cases it fails. This also could be due to a faulty flashrom image.
Hi,
can you please upgrade flashrom to the latest development version? See http://flashrom.org/Downloads#Installation_from_source
That alone will probably not change much, but the verbose output would be more interesting to me. If my hypothesis is correct, then forcing a slower SPI clock might help. You can try the following patch to verify that: https://github.com/stefanct/flashrom/commit/480fca837b9a8b0711b8371d7ce7acf7...
On Mon, 01 Jul 2013 22:17:28 +0200 Reiner Luett diffusae@yahoo.se wrote:
Hi,
with the developer version I get the following error:
Can't mmap memory using /dev/mem: Operation not permitted
Any suggestion?
Please always post the complete log with at least -V verbosity (in this case I would prefer -VVV). You can create a log file with the -o parameter, if you like.
Oh, crap. I do not know how much we have tested with ubuntu. What verssion of ubuntu do you run? I know our flashrom owner favors ubuntu. Oh, wait a minute. su - (change to root) Ross
On Tue, Jul 2, 2013 at 3:15 PM, Stefan Tauner < stefan.tauner@student.tuwien.ac.at> wrote:
On Mon, 01 Jul 2013 22:17:28 +0200 Reiner Luett diffusae@yahoo.se wrote:
Hi,
with the developer version I get the following error:
Can't mmap memory using /dev/mem: Operation not permitted
Any suggestion?
Please always post the complete log with at least -V verbosity (in this case I would prefer -VVV). You can create a log file with the -o parameter, if you like.
-- Kind regards/Mit freundlichen Grüßen, Stefan Tauner
flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Hi Stefan,
sorry, I've forgotten the verbose option. :-)
On 02.07.2013 23:15, Stefan Tauner wrote:
Please always post the complete log with at least -V verbosity (in this case I would prefer -VVV). You can create a log file with the -o parameter, if you like.
I've done it and posted the log file:
http://paste.flashrom.org/view.php?id=1676
Hopefully that helps. The chip isn't autodetected, now. I've added the -c MX25L3206 option and it works. It's a Macronix MX25L3206EPI. I can use it with spispeed 33. Thanks a lot for the attached patch.
I've pasted the output here: http://paste.flashrom.org/view.php?id=1677
Thanks for your help.
Best regards, Reiner
--
On Wed, 03 Jul 2013 00:29:03 +0200 Reiner Luett diffusae@yahoo.se wrote:
I can use it with spispeed 33.
JFYI, you did use 16.5MHz actually because my patch was incomplete and always sets 16.5MHz although saying otherwise.
I have prepared a corrected patch, but it is rebased on another AMD-related patch (i.e. IMC shutdown) and hence is not applicable as is so I do not post it here. If anyone wants to give it a shot, please say so.
On 03.07.2013 11:43, Stefan Tauner wrote:
On Wed, 03 Jul 2013 00:29:03 +0200 Reiner Luett diffusae@yahoo.se wrote:
I can use it with spispeed 33.
JFYI, you did use 16.5MHz actually because my patch was incomplete and always sets 16.5MHz although saying otherwise.
I couldn't see this while flashing the chip. I only have this information in the log file:
Setting SPI clock to 33 MHz (0x1) and disabling fast reads... done (0x0cc08303) fastReadEnable=0, SpiArbEnable=0, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, ArbWaitCount=4, SpiBridgeDisable=1, DropOneClkOnRd=0 NormSpeed is 16.5 MHz
But it seem to write perfectly now.
I have prepared a corrected patch, but it is rebased on another AMD-related patch (i.e. IMC shutdown) and hence is not applicable as is so I do not post it here. If anyone wants to give it a shot, please say so.
Yes for sure, I like to try. But where could I see the correct write speed?
BTW: Do you have the IMC firmware for the Asrock E350M1 or maybe know, who I need to contact at AMD to obtain it?
Regards, Reiner
--
On Wed, 03 Jul 2013 19:31:16 +0200 Reiner Luett diffusae@yahoo.se wrote:
On 03.07.2013 11:43, Stefan Tauner wrote:
On Wed, 03 Jul 2013 00:29:03 +0200 Reiner Luett diffusae@yahoo.se wrote:
I can use it with spispeed 33.
JFYI, you did use 16.5MHz actually because my patch was incomplete and always sets 16.5MHz although saying otherwise.
I couldn't see this while flashing the chip. I only have this information in the log file:
Setting SPI clock to 33 MHz (0x1) and disabling fast reads... done (0x0cc08303) fastReadEnable=0, SpiArbEnable=0, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, ArbWaitCount=4, SpiBridgeDisable=1, DropOneClkOnRd=0 NormSpeed is 16.5 MHz
But it seem to write perfectly now.
The output printed after NormSpeed was and is correct, as was all the outer text output, but under the hood it did always set 16.5MHz instead of what the user requested.
I have prepared a corrected patch, but it is rebased on another AMD-related patch (i.e. IMC shutdown) and hence is not applicable as is so I do not post it here. If anyone wants to give it a shot, please say so.
Yes for sure, I like to try. But where could I see the correct write speed?
You would need to checkout my github repository. The two patches you need are inside the flashrom_next branch: https://github.com/stefanct/flashrom/tree/flashrom_next
BTW: Do you have the IMC firmware for the Asrock E350M1 or maybe know, who I need to contact at AMD to obtain it?
No idea. If it is not included with the default build of coreboot it is probably not mandatory. I remember that there was some work done regarding writing an open source firmware for it. You better ask coreboot@coreboot.org or on IRC.
-
Reiner Luett -
Ross Amans -
Stefan Tauner