IMC on persimmon (was: Flashrom erase failure)

[Stefan Tauner]

On Fri, 1 Mar 2013 20:48:48 +0000
"Racine, Michel"  wrote:
> Thank you for the quick reply.
>
> I have upgraded flashrom. I did a verify, and flashrom indicated a difference. I tried to re-flash coreboot, but I think I'm missing something:
>
> root@debian:~/flashrom/flashrom-0.9.6.1# ./flashrom -p internal -w ~/coreboot.rom
> flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686)
> flashrom is free software, get the source code at http://www.flashrom.org
>
> Calibrating delay loop... OK.
> coreboot table found at 0xc717d000.
> Found chipset "AMD SB7x0/SB8x0/SB9x0". Enabling flash write... The SB700 IMC is active and may interfere with SPI commands. Disabling write.
> OK.
> Found SST flash chip "SST25VF032B" (4096 kB, SPI) at physical address 0xffc00000.
> Write/erase is not working yet on your programmer in its current configuration.
> Aborting
>
> Thoughts?

I have added the coreboot mailing list because I ham not familiar with
the board or chipset and I am quite certain someone there knows how to
handle this correctly.

The new version of flashrom detects that the embedded controller on the
board (IMC) accesses the SPI bus concurrently with flashrom. We disable
writes for safety reasons in that case (your old version did not...).

Apparently there is no way to force writing other than changing the
source code (sb600.c). I don't think that is wisely though...
Apart from repeating the warning to *NOT* reboot/reset/shutdown the
machine (unless you have a known-working external flash programmer), I
can not help you further ATM.
> -----Original Message-----
> From: Stefan Tauner [mailto:[e-mail]] 
> Sent: Friday, March 01, 2013 12:09 PM
> To: Racine, Michel
> Cc: [e-mail]
> Subject: Re: [flashrom] Flashrom erase failure
>
> On Fri, 1 Mar 2013 17:19:46 +0000
> "Racine, Michel"  wrote:
> > Greetings,
> >
> > I have an AMD Persimmon dev board. I built coreboot and flashed it successfully; the board was operational.
> > I have attempted to flash the original rom (obtained before flashing coreboot with flashrom -r).
> > When I attempted to flash the original rom, I get the output below.
>
> Hi,
>
> you are trying to write the original image while running coreboot, right?
>
> You are using a very old version of flashrom. Please verify that the content of the flash is untouched (by using the -v option with the image you have written successfully last). If it was modified try to rewrite that image. If that still does not work, please report back, else update and retry.

[coreboot] IMC on persimmon (was: Flashrom erase failure)

[Wolfgang Kamp - datakamp]

Hi,

recently I had the same problems to get Flashrom working on an embedded platform with AMD G-series processor similar to Persimmon.
I did all the patches to get Flashrom working but actually I'm not able to commit to flashrom.org.
If there is interest I would send the necessary files to someone who can do that for me.

Regards,

Wolfgang

-----Ursprüngliche Nachricht-----
Von: [e-mail] [mailto:[e-mail]] Im Auftrag von Stefan Tauner
Gesendet: Freitag, 1. März 2013 22:04
An: Racine, Michel
Cc: [e-mail]; [e-mail]
Betreff: [coreboot] IMC on persimmon (was: Flashrom erase failure)

On Fri, 1 Mar 2013 20:48:48 +0000
"Racine, Michel"  wrote:
> Thank you for the quick reply.
>
> I have upgraded flashrom. I did a verify, and flashrom indicated a difference. I tried to re-flash coreboot, but I think I'm missing something:
>
> root@debian:~/flashrom/flashrom-0.9.6.1# ./flashrom -p internal -w 
> ~/coreboot.rom flashrom v0.9.6.1-r1564 on Linux 2.6.32-5-686 (i686) 
> flashrom is free software, get the source code at 
> http://www.flashrom.org
>
> Calibrating delay loop... OK.
> coreboot table found at 0xc717d000.
> Found chipset "AMD SB7x0/SB8x0/SB9x0". Enabling flash write... The SB700 IMC is active and may interfere with SPI commands. Disabling write.
> OK.
> Found SST flash chip "SST25VF032B" (4096 kB, SPI) at physical address 0xffc00000.
> Write/erase is not working yet on your programmer in its current configuration.
> Aborting
>
> Thoughts?

I have added the coreboot mailing list because I ham not familiar with the board or chipset and I am quite certain someone there knows how to handle this correctly.

The new version of flashrom detects that the embedded controller on the board (IMC) accesses the SPI bus concurrently with flashrom. We disable writes for safety reasons in that case (your old version did not...).

Apparently there is no way to force writing other than changing the source code (sb600.c). I don't think that is wisely though...
Apart from repeating the warning to *NOT* reboot/reset/shutdown the machine (unless you have a known-working external flash programmer), I can not help you further ATM.
> -----Original Message-----
> From: Stefan Tauner [mailto:[e-mail]]
> Sent: Friday, March 01, 2013 12:09 PM
> To: Racine, Michel
> Cc: [e-mail]
> Subject: Re: [flashrom] Flashrom erase failure
>
> On Fri, 1 Mar 2013 17:19:46 +0000
> "Racine, Michel"  wrote:
> > Greetings,
> >
> > I have an AMD Persimmon dev board. I built coreboot and flashed it successfully; the board was operational.
> > I have attempted to flash the original rom (obtained before flashing coreboot with flashrom -r).
> > When I attempted to flash the original rom, I get the output below.
>
> Hi,
>
> you are trying to write the original image while running coreboot, right?
>
> You are using a very old version of flashrom. Please verify that the content of the flash is untouched (by using the -v option with the image you have written successfully last). If it was modified try to rewrite that image. If that still does not work, please report back, else update and retry.