Hello,
One of the components I was waiting for was delivered yesterday so I performed tests on some of the sample chips GigaDevice sent using Serprog Arduino flasher (Urja's frser-duino). In the patches that follow, I have added support for 10 chips of which 8 were tested successfully for probe, read, write and erase.
A note - level translation using resistors mentioned here (https://www.flashrom.org/Serprog/Arduino_flasher) didn't work for me so I bypassed resistors and connected chip directly to Arduino.
Patches follow. Thanks.
Hatim Kanchwala (3): Add support for GD25LQ10B, GD25LQ20B, GD25LQ40B and GD25LQ80B Add support for GD25D05B and GD25D10B Add support for GD25Q21B, GD25Q41B, GD25Q80C and GD25Q16C
flashchips.c | 397 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 18 +-- 2 files changed, 407 insertions(+), 8 deletions(-)
Hello,
I referred to two datasheets for these chips (both from GigaDevice) and I noticed a mismatch in voltage range for GD25LQ20B. However the following values were fine when I performed the tests.
Signed-off-by: Hatim Kanchwala hatim@hatimak.me --- flashchips.c | 163 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 6 ++- 2 files changed, 167 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c index 0fc1b7a..5da56d0 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5628,30 +5628,193 @@ const struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, .block_erase = erase_chip_block_jedec, }, }, .write = write_jedec_1, /* Supports a fast mode too */ .read = read_memmapped, .voltage = {3000, 3600}, /* 3.0-3.6V for type -70, others 2.7-3.6V */ },
{ .vendor = "GigaDevice", + .name = "GD25LQ10B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ10, + .total_size = 128, + .page_size = 256, + /* Supports SFDP */ + /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: 2nd status reg (read 0x35); 3rd status reg (read 0x15) */ + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2100}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25LQ20B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ20, + .total_size = 256, + .page_size = 256, + /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: 2nd status reg (read 0x35); 3rd status reg (read 0x15) */ + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2100}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25LQ40B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ40, + .total_size = 512, + .page_size = 256, + /* Supports SFDP */ + /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: 2nd status reg (read 0x35); 3rd status reg (read 0x15) */ + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2100}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25LQ80B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25LQ80, + .total_size = 1024, + .page_size = 256, + /* Supports SFDP */ + /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: 2nd status reg (read 0x35); 3rd status reg (read 0x15) */ + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1650, 2100}, + }, + + { + .vendor = "GigaDevice", .name = "GD25LQ40", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25LQ40, .total_size = 512, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, diff --git a/flashchips.h b/flashchips.h index 9ffb30f..3e2b18c 100644 --- a/flashchips.h +++ b/flashchips.h @@ -364,32 +364,34 @@ #define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 #define GIGADEVICE_GD25Q512 0x4010 #define GIGADEVICE_GD25Q10 0x4011 #define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ #define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ #define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 -#define GIGADEVICE_GD25LQ40 0x6013 -#define GIGADEVICE_GD25LQ80 0x6014 +#define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ16 0x6015 #define GIGADEVICE_GD25LQ32 0x6016 #define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */ #define GIGADEVICE_GD25LQ128 0x6018 #define GIGADEVICE_GD29GL064CAB 0x7E0601
#define HYUNDAI_ID 0xAD /* Hyundai */ #define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */ #define HYUNDAI_HY29F800B 0x58 /* Same as HY29F800AB */ #define HYUNDAI_HY29LV800B 0x5B #define HYUNDAI_HY29F040A 0xA4 #define HYUNDAI_HY29F400B 0xAB /* Same as HY29F400AB */ #define HYUNDAI_HY29F002B 0x34 #define HYUNDAI_HY29F002T 0xB0 #define HYUNDAI_HY29LV400T 0xB9
On Sat, 12 Mar 2016 02:33:13 +0530 Hatim Kanchwala hatim@hatimak.me wrote:
Hello,
I referred to two datasheets for these chips (both from GigaDevice) and I noticed a mismatch in voltage range for GD25LQ20B. However the following values were fine when I performed the tests.
Signed-off-by: Hatim Kanchwala hatim@hatimak.me
flashchips.c | 163 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 6 ++- 2 files changed, 167 insertions(+), 2 deletions(-)
Hi,
thanks for your patch(es)! In general we want to keep the number of chip definitions with the same ID as low as possible. If chips only differ in minor details that often are not even reflected by the definitions within flashrom we usually combine their definitions. I did not spot any major differences between the 40B, the 80B and there respective non-B counterparts, did you? If not I'd rather simply update/comment the existing definitions, e.g. the name for the GD25LQ40 definition should be changed to "GD25LQ40(B)". There are many similar examples in flashchips.c too.
diff --git a/flashchips.h b/flashchips.h index 9ffb30f..3e2b18c 100644 --- a/flashchips.h +++ b/flashchips.h @@ -364,32 +364,34 @@ #define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 #define GIGADEVICE_GD25Q512 0x4010 #define GIGADEVICE_GD25Q10 0x4011 #define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ #define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ #define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 -#define GIGADEVICE_GD25LQ40 0x6013 -#define GIGADEVICE_GD25LQ80 0x6014 +#define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */
There does not seem to be a non-b LQ10 or LQ20 AFAICT thus these comments seem to be wrong (and we should probably change the define to include the B as well). However, there is an LQ05B that is missing yet: #define GIGADEVICE_GD25LQ05B 0x6010
+#define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ16 0x6015 #define GIGADEVICE_GD25LQ32 0x6016 #define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */ #define GIGADEVICE_GD25LQ128 0x6018
On Saturday 12 March 2016 08:45 AM, Stefan Tauner wrote:
On Sat, 12 Mar 2016 02:33:13 +0530 Hatim Kanchwala hatim@hatimak.me wrote:
Hello,
I referred to two datasheets for these chips (both from GigaDevice) and I noticed a mismatch in voltage range for GD25LQ20B. However the following values were fine when I performed the tests.
Signed-off-by: Hatim Kanchwala hatim@hatimak.me
flashchips.c | 163 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 6 ++- 2 files changed, 167 insertions(+), 2 deletions(-)
Hi,
thanks for your patch(es)! In general we want to keep the number of chip definitions with the same ID as low as possible. If chips only differ in minor details that often are not even reflected by the definitions within flashrom we usually combine their definitions. I did not spot any major differences between the 40B, the 80B and there respective non-B counterparts, did you? If not I'd rather simply update/comment the existing definitions, e.g. the name for the GD25LQ40 definition should be changed to "GD25LQ40(B)". There are many similar examples in flashchips.c too.
40B/80B have SFDP and second status register whereas the non-B counterparts do not. They also differ in amount of memory for security registers. These indeed are minor details not reflected by flashrom definitions. I updated the existing definitions and performed tests again (logs attached), works perfectly.
diff --git a/flashchips.h b/flashchips.h index 9ffb30f..3e2b18c 100644 --- a/flashchips.h +++ b/flashchips.h @@ -364,32 +364,34 @@ #define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 #define GIGADEVICE_GD25Q512 0x4010 #define GIGADEVICE_GD25Q10 0x4011 #define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ #define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ #define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 -#define GIGADEVICE_GD25LQ40 0x6013 -#define GIGADEVICE_GD25LQ80 0x6014 +#define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */
There does not seem to be a non-b LQ10 or LQ20 AFAICT thus these comments seem to be wrong (and we should probably change the define to include the B as well). However, there is an LQ05B that is missing yet: #define GIGADEVICE_GD25LQ05B 0x6010
Yes you are correct, there is no non-B version. LQ05B was in the same datasheet as LQ20B so I'll add that as well.
+#define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ +#define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ16 0x6015 #define GIGADEVICE_GD25LQ32 0x6016 #define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */ #define GIGADEVICE_GD25LQ128 0x6018
The newer patch follows in a separate successive mail along with support for LQ05B. Thanks.
Signed-off-by: Hatim Kanchwala hatim@hatimak.me --- flashchips.c | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 4 ++-- 2 files changed, 78 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c index 5da56d0..a76192c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5628,30 +5628,106 @@ const struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, .block_erase = erase_chip_block_jedec, }, }, .write = write_jedec_1, /* Supports a fast mode too */ .read = read_memmapped, .voltage = {3000, 3600}, /* 3.0-3.6V for type -70, others 2.7-3.6V */ },
{ .vendor = "GigaDevice", + .name = "GD25D05B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q512, + .total_size = 64, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 2} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_srwd, + .unlock = spi_disable_blockprotect_bp2_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", + .name = "GD25D10B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q10, + .total_size = 128, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp2_srwd, + .unlock = spi_disable_blockprotect_bp2_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", .name = "GD25LQ10B", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25LQ10, .total_size = 128, .page_size = 256, /* Supports SFDP */ /* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { diff --git a/flashchips.h b/flashchips.h index 3e2b18c..a2d25ec 100644 --- a/flashchips.h +++ b/flashchips.h @@ -351,32 +351,32 @@ #define FUJITSU_MBM29LV004TC 0xB5 #define FUJITSU_MBM29LV008BA 0x37 #define FUJITSU_MBM29LV008TA 0x3E #define FUJITSU_MBM29LV080A 0x38 #define FUJITSU_MBM29LV200BC 0xBF #define FUJITSU_MBM29LV200TC 0x3B #define FUJITSU_MBM29LV400BC 0xBA #define FUJITSU_MBM29LV400TC 0xB9 #define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */ #define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */ #define FUJITSU_MBM29LV160BE 0x49 /* 16 b mode 0x2249 */ #define FUJITSU_MBM29LV160TE 0xC4 /* 16 b mode 0x22C4 */
#define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 -#define GIGADEVICE_GD25Q512 0x4010 -#define GIGADEVICE_GD25Q10 0x4011 +#define GIGADEVICE_GD25Q512 0x4010 /* Same as GD25D05B */ +#define GIGADEVICE_GD25Q10 0x4011 /* Same as GD25D10B */ #define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ #define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ #define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */
On Sat, 12 Mar 2016 02:33:14 +0530 Hatim Kanchwala hatim@hatimak.me wrote:
Signed-off-by: Hatim Kanchwala hatim@hatimak.me
flashchips.c | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 4 ++-- 2 files changed, 78 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c index 5da56d0..a76192c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5628,30 +5628,106 @@ const struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, .block_erase = erase_chip_block_jedec, }, }, .write = write_jedec_1, /* Supports a fast mode too */ .read = read_memmapped, .voltage = {3000, 3600}, /* 3.0-3.6V for type -70, others 2.7-3.6V */ },
{ .vendor = "GigaDevice",
.name = "GD25D05B",.bustype = BUS_SPI,.manufacture_id = GIGADEVICE_ID,.model_id = GIGADEVICE_GD25Q512,.total_size = 64,.page_size = 256,.feature_bits = FEATURE_WRSR_WREN,.tested = TEST_OK_PREW,.probe = probe_spi_rdid,.probe_timing = TIMING_ZERO,.block_erasers ={{.eraseblocks = { {4 * 1024, 16} },.block_erase = spi_block_erase_20,}, {.eraseblocks = { {32 * 1024, 2} },.block_erase = spi_block_erase_52,}, {.eraseblocks = { {64 * 1024, 1} },.block_erase = spi_block_erase_d8,}, {
Can you please test if this really exists? In the Q05 datasheet it is explicitly stated that there is no 64k block erase. This is missing the D05B datasheet I am looking at but that be an error in the datasheet. Since you have the chip at hand, real testing would be appreciated - it does not matter that much though.
.eraseblocks = { {64 * 1024, 1} },.block_erase = spi_block_erase_60,}, {.eraseblocks = { {64 * 1024, 1} },.block_erase = spi_block_erase_c7,}},.printlock = spi_prettyprint_status_register_bp2_srwd,.unlock = spi_disable_blockprotect_bp2_srwd,.write = spi_chip_write_256,.read = spi_chip_read, /* Fast read (0x0B) supported */
Should be .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ AFAICS.
.voltage = {2700, 3600},- },
- {
.vendor = "GigaDevice",.name = "GD25D10B",.bustype = BUS_SPI,.manufacture_id = GIGADEVICE_ID,.model_id = GIGADEVICE_GD25Q10,.total_size = 128,.page_size = 256,.feature_bits = FEATURE_WRSR_WREN,.tested = TEST_OK_PREW,.probe = probe_spi_rdid,.probe_timing = TIMING_ZERO,.block_erasers ={{.eraseblocks = { {4 * 1024, 32} },.block_erase = spi_block_erase_20,}, {.eraseblocks = { {32 * 1024, 4} },.block_erase = spi_block_erase_52,}, {.eraseblocks = { {64 * 1024, 2} },.block_erase = spi_block_erase_d8,}, {.eraseblocks = { {128 * 1024, 1} },.block_erase = spi_block_erase_60,}, {.eraseblocks = { {128 * 1024, 1} },.block_erase = spi_block_erase_c7,}},.printlock = spi_prettyprint_status_register_bp2_srwd,.unlock = spi_disable_blockprotect_bp2_srwd,.write = spi_chip_write_256,.read = spi_chip_read, /* Fast read (0x0B) supported */
Should be .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ AFAICS.
.voltage = {2700, 3600},- },
- {
.vendor = "GigaDevice",diff --git a/flashchips.h b/flashchips.h index 3e2b18c..a2d25ec 100644 --- a/flashchips.h +++ b/flashchips.h @@ -351,32 +351,32 @@ #define FUJITSU_MBM29LV004TC 0xB5 #define FUJITSU_MBM29LV008BA 0x37 #define FUJITSU_MBM29LV008TA 0x3E #define FUJITSU_MBM29LV080A 0x38 #define FUJITSU_MBM29LV200BC 0xBF #define FUJITSU_MBM29LV200TC 0x3B #define FUJITSU_MBM29LV400BC 0xBA #define FUJITSU_MBM29LV400TC 0xB9 #define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */ #define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */ #define FUJITSU_MBM29LV160BE 0x49 /* 16 b mode 0x2249 */ #define FUJITSU_MBM29LV160TE 0xC4 /* 16 b mode 0x22C4 */
#define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 -#define GIGADEVICE_GD25Q512 0x4010 -#define GIGADEVICE_GD25Q10 0x4011 +#define GIGADEVICE_GD25Q512 0x4010 /* Same as GD25D05B */ +#define GIGADEVICE_GD25Q10 0x4011 /* Same as GD25D10B */
Ways to distinguish them should be noted here. Probably the best way is to read the second status register of the Q10 that is not present in the D10B versions.
#define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ #define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ #define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */
On Saturday 12 March 2016 09:05 AM, Stefan Tauner wrote:
On Sat, 12 Mar 2016 02:33:14 +0530 Hatim Kanchwala hatim@hatimak.me wrote:
Signed-off-by: Hatim Kanchwala hatim@hatimak.me
flashchips.c | 76 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 4 ++-- 2 files changed, 78 insertions(+), 2 deletions(-)
diff --git a/flashchips.c b/flashchips.c index 5da56d0..a76192c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5628,30 +5628,106 @@ const struct flashchip flashchips[] = { {16 * 1024, 1}, }, .block_erase = erase_block_jedec, }, { .eraseblocks = { {2048 * 1024, 1} }, .block_erase = erase_chip_block_jedec, }, }, .write = write_jedec_1, /* Supports a fast mode too */ .read = read_memmapped, .voltage = {3000, 3600}, /* 3.0-3.6V for type -70, others 2.7-3.6V */ },
{ .vendor = "GigaDevice",
.name = "GD25D05B",.bustype = BUS_SPI,.manufacture_id = GIGADEVICE_ID,.model_id = GIGADEVICE_GD25Q512,.total_size = 64,.page_size = 256,.feature_bits = FEATURE_WRSR_WREN,.tested = TEST_OK_PREW,.probe = probe_spi_rdid,.probe_timing = TIMING_ZERO,.block_erasers ={{.eraseblocks = { {4 * 1024, 16} },.block_erase = spi_block_erase_20,}, {.eraseblocks = { {32 * 1024, 2} },.block_erase = spi_block_erase_52,}, {.eraseblocks = { {64 * 1024, 1} },.block_erase = spi_block_erase_d8,}, {Can you please test if this really exists? In the Q05 datasheet it is explicitly stated that there is no 64k block erase. This is missing the D05B datasheet I am looking at but that be an error in the datasheet. Since you have the chip at hand, real testing would be appreciated - it does not matter that much though.
There is no Q05, it is Q512. The datasheet I am referring to does mention the 64kB block erase (http://www.gigadevice.com/product/download/185.html?locale=en_US). And the D05B datasheet also mentions the 64kB block erase (http://www.gigadevice.com/product/download/401.html?locale=en_US). Nevertheless, real testing confirms 64kB block erase (logs attached).
.eraseblocks = { {64 * 1024, 1} },.block_erase = spi_block_erase_60,}, {.eraseblocks = { {64 * 1024, 1} },.block_erase = spi_block_erase_c7,}},.printlock = spi_prettyprint_status_register_bp2_srwd,.unlock = spi_disable_blockprotect_bp2_srwd,.write = spi_chip_write_256,.read = spi_chip_read, /* Fast read (0x0B) supported */Should be .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ AFAICS.
Yes, my bad. The D has dual I/O but the Q has quad as well. Newer patch follows in a separate successive mail. Thanks.
.voltage = {2700, 3600},- },
- {
.vendor = "GigaDevice",.name = "GD25D10B",.bustype = BUS_SPI,.manufacture_id = GIGADEVICE_ID,.model_id = GIGADEVICE_GD25Q10,.total_size = 128,.page_size = 256,.feature_bits = FEATURE_WRSR_WREN,.tested = TEST_OK_PREW,.probe = probe_spi_rdid,.probe_timing = TIMING_ZERO,.block_erasers ={{.eraseblocks = { {4 * 1024, 32} },.block_erase = spi_block_erase_20,}, {.eraseblocks = { {32 * 1024, 4} },.block_erase = spi_block_erase_52,}, {.eraseblocks = { {64 * 1024, 2} },.block_erase = spi_block_erase_d8,}, {.eraseblocks = { {128 * 1024, 1} },.block_erase = spi_block_erase_60,}, {.eraseblocks = { {128 * 1024, 1} },.block_erase = spi_block_erase_c7,}},.printlock = spi_prettyprint_status_register_bp2_srwd,.unlock = spi_disable_blockprotect_bp2_srwd,.write = spi_chip_write_256,.read = spi_chip_read, /* Fast read (0x0B) supported */Should be .read = spi_chip_read, /* Fast read (0x0B), dual I/O supported */ AFAICS.
.voltage = {2700, 3600},- },
- {
.vendor = "GigaDevice",diff --git a/flashchips.h b/flashchips.h index 3e2b18c..a2d25ec 100644 --- a/flashchips.h +++ b/flashchips.h @@ -351,32 +351,32 @@ #define FUJITSU_MBM29LV004TC 0xB5 #define FUJITSU_MBM29LV008BA 0x37 #define FUJITSU_MBM29LV008TA 0x3E #define FUJITSU_MBM29LV080A 0x38 #define FUJITSU_MBM29LV200BC 0xBF #define FUJITSU_MBM29LV200TC 0x3B #define FUJITSU_MBM29LV400BC 0xBA #define FUJITSU_MBM29LV400TC 0xB9 #define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */ #define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */ #define FUJITSU_MBM29LV160BE 0x49 /* 16 b mode 0x2249 */ #define FUJITSU_MBM29LV160TE 0xC4 /* 16 b mode 0x22C4 */
#define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 -#define GIGADEVICE_GD25Q512 0x4010 -#define GIGADEVICE_GD25Q10 0x4011 +#define GIGADEVICE_GD25Q512 0x4010 /* Same as GD25D05B */ +#define GIGADEVICE_GD25Q10 0x4011 /* Same as GD25D10B */
Ways to distinguish them should be noted here. Probably the best way is to read the second status register of the Q10 that is not present in the D10B versions.
Agreed.
#define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ #define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ #define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ #define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */
Signed-off-by: Hatim Kanchwala hatim@hatimak.me --- flashchips.c | 158 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 8 +-- 2 files changed, 162 insertions(+), 4 deletions(-)
diff --git a/flashchips.c b/flashchips.c index a76192c..a6da3b2 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6210,30 +6210,69 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_60, }, { .eraseblocks = { {256 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, },
{ .vendor = "GigaDevice", + .name = "GD25Q21B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q20, + .total_size = 256, + .page_size = 256, + /* OTP: 1536B total; read 0x48, write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read 0x35) */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", .name = "GD25Q40(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q40, .total_size = 512, .page_size = 256, .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, @@ -6248,30 +6287,69 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_60, }, { .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, },
{ .vendor = "GigaDevice", + .name = "GD25Q41B", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q40, + .total_size = 512, + .page_size = 256, + /* OTP: 1536B total; read 0x48, write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read 0x35) */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", .name = "GD25Q80(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q80, .total_size = 1024, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 256} }, @@ -6287,30 +6365,70 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_60, }, { .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, },
{ .vendor = "GigaDevice", + .name = "GD25Q80C", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q80, + .total_size = 1024, + .page_size = 256, + /* supports SFDP (C revision only) */ + /* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read 0x35) */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", .name = "GD25Q16(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q16, .total_size = 2048, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 (B version only) */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 512} }, @@ -6326,30 +6444,70 @@ const struct flashchip flashchips[] = { .block_erase = spi_block_erase_60, }, { .eraseblocks = { {2 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, .printlock = spi_prettyprint_status_register_bp4_srwd, .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {2700, 3600}, },
{ .vendor = "GigaDevice", + .name = "GD25Q16C", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25Q16, + .total_size = 2 * 1024, + .page_size = 256, + /* supports SFDP (C revision only) */ + /* OTP: 1024B total; read 0x48, write 0x42, erase 0x44 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read 0x35) */ + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "GigaDevice", .name = "GD25Q32(B)", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, .model_id = GIGADEVICE_GD25Q32, .total_size = 4096, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = { { .eraseblocks = { {4 * 1024, 1024} }, diff --git a/flashchips.h b/flashchips.h index a2d25ec..d420a54 100644 --- a/flashchips.h +++ b/flashchips.h @@ -353,34 +353,34 @@ #define FUJITSU_MBM29LV008TA 0x3E #define FUJITSU_MBM29LV080A 0x38 #define FUJITSU_MBM29LV200BC 0xBF #define FUJITSU_MBM29LV200TC 0x3B #define FUJITSU_MBM29LV400BC 0xBA #define FUJITSU_MBM29LV400TC 0xB9 #define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */ #define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */ #define FUJITSU_MBM29LV160BE 0x49 /* 16 b mode 0x2249 */ #define FUJITSU_MBM29LV160TE 0xC4 /* 16 b mode 0x22C4 */
#define GIGADEVICE_ID 0xC8 /* GigaDevice */ #define GIGADEVICE_GD25T80 0x3114 #define GIGADEVICE_GD25Q512 0x4010 /* Same as GD25D05B */ #define GIGADEVICE_GD25Q10 0x4011 /* Same as GD25D10B */ -#define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */ -#define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */ -#define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */ -#define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */ +#define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25Q21B */ +#define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25Q41B */ +#define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B and GD25Q80C, latter distinguished by SFDP */ +#define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B and GD25Q16C, latter distinguished by SFDP */ #define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */ #define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */ #define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ21B 0x4212 #define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25LQ10 0x6011 /* Same as GD25LQ10B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ20 0x6012 /* Same as GD25LQ20B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ40 0x6013 /* Same as GD25LQ40B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ80 0x6014 /* Same as GD25LQ80B, can be distinguished by SFDP */ #define GIGADEVICE_GD25LQ16 0x6015 #define GIGADEVICE_GD25LQ32 0x6016 #define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */ #define GIGADEVICE_GD25LQ128 0x6018
I generated a random file to write to the chips using dd if=/dev/urandom of=random.bin bs=4K count=x. Logs for tests are attached. I forgot them in the previous mail, sorry about that. Thanks.
On Saturday 12 March 2016 02:33 AM, Hatim Kanchwala wrote:
Hello,
One of the components I was waiting for was delivered yesterday so I performed tests on some of the sample chips GigaDevice sent using Serprog Arduino flasher (Urja's frser-duino). In the patches that follow, I have added support for 10 chips of which 8 were tested successfully for probe, read, write and erase.
A note - level translation using resistors mentioned here (https://www.flashrom.org/Serprog/Arduino_flasher) didn't work for me so I bypassed resistors and connected chip directly to Arduino.
Patches follow. Thanks.
Hatim Kanchwala (3): Add support for GD25LQ10B, GD25LQ20B, GD25LQ40B and GD25LQ80B Add support for GD25D05B and GD25D10B Add support for GD25Q21B, GD25Q41B, GD25Q80C and GD25Q16C
flashchips.c | 397 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 18 +-- 2 files changed, 407 insertions(+), 8 deletions(-)
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Hatim Kanchwala -
Stefan Tauner