My flashrom is not changing the writ protect screw and it does not have a write protect screw or switch

[AT Cuber]

chronos@localhost / $ sudo flashrom -N -V --wp-disable
flashrom 99408625 on Linux 4.14.288-19292-g05373cf217cb (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
flashrom was built with LLVM Clang 15.0.0
(/var/tmp/portage/sys-devel/llvm-15.0_pre458507_p20220602-r12/work/llvm-15.0_pre458507_p20220602/clang
a58d0af058038595c93de961b725f86997cf8d4a), little endian
Command line (3 args): flashrom -N -V --wp-disable
Using default programmer "internal" with arguments "".
Acquiring lock (timeout=180 sec)...
Opened file lock "/run/lock/firmware_utility_lock"
Lock acquired.
Initializing internal programmer
/sys/class/mtd/mtd0 does not exist
Found candidate at: 00000500-00000528
Found coreboot table at 0x00000500.
Found candidate at: 00000000-000005d4
Found coreboot table at 0x00000000.
coreboot table found at 0x79b2a000.
coreboot header(24) checksum: ab1a table(1468) checksum: bd4e entries: 45
Vendor ID: Google, part ID: Phaser
Using Internal DMI decoder.
DMI string chassis-type: "Laptop"
Laptop detected via DMI.
DMI string system-manufacturer: "Google"
DMI string system-product-name: "Phaser"
DMI string system-version: "rev4"
DMI string baseboard-manufacturer: "Google"
DMI string baseboard-product-name: "Phaser"
DMI string baseboard-version: "rev4"
Found chipset "Intel Gemini Lake" with PCI ID 8086:3197.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom *and* were (not) able to successfully update your firmware with
it,
then please email a report to [e-mail] including a verbose
(-V) log.
Thank you!
Enabling flash write... BIOS_SPI_BC = 0x9: BIOS Interface Lock-Down:
disabled, Boot BIOS Straps: 0x0 (SPI)
Top Swap: not enabled
SPI Read Configuration: prefetching enabled, caching enabled,
BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
SPIBAR = 0x0000799bbee0a000 (phys = 0xc1121000)
0x04: 0x6000 (HSFS)
HSFS: FDONE=0, FCERR=0, AEL=0, BERASE=0, SCIP=0, FDOPSS=1, FDV=1, FLOCKDN=0
Programming OPCODES... done
0x06: 0x0010 (HSFC)
HSFC: FGO=0, FCYCLE=0, FDBC=0, SME=0
0x0c: 0x00000000 (DLOCK)
DLOCK: BMWAG_LOCKDN=0, BMRAG_LOCKDN=0, SBMWAG_LOCKDN=0, SBMRAG_LOCKDN=0,
       PR0_LOCKDN=0, PR1_LOCKDN=0, PR2_LOCKDN=0, PR3_LOCKDN=0, PR4_LOCKDN=0,
       SSEQ_LOCKDN=0
0x50: 0x000042c3 (FRAP)
BMWAG 0x00, BMRAG 0x00, BRWA 0x42, BRRA 0xc3
0x54: 0x00000000 FREG0: Flash Descriptor region (0x00000000-0x00000fff) is
read-only.
0x58: 0x0f7e0001 FREG1: BIOS region (0x00001000-0x00f7efff) is read-write.
0x68: 0x0fff0f7f FREG5: Device Expansion region (0x00f7f000-0x00ffffff) is
locked.
0x7C: 0x7fff7fff FREG10: unknown region (0x07fff000-0x07ffffff) has unknown
permissions.
0x80: 0x7fff7fff FREG11: unknown region (0x07fff000-0x07ffffff) has unknown
permissions.
0xE0: 0x7fff7fff FREG12: unknown region (0x07fff000-0x07ffffff) has unknown
permissions.
0xE4: 0x7fff7fff FREG13: unknown region (0x07fff000-0x07ffffff) has unknown
permissions.
0xE8: 0x7fff7fff FREG14: unknown region (0x07fff000-0x07ffffff) has unknown
permissions.
0xEC: 0x7fff7fff FREG15: unknown region (0x07fff000-0x07ffffff) has unknown
permissions.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
At least some flash regions are read protected. You have to use a flash
layout and include only accessible regions. For write operations, you'll
additionally need the --noverify-all switch. See manpage for more details.
0xa0: 0xc0 (SSFS)
SSFS: SCIP=0, FDONE=0, FCERR=0, AEL=0
0xa1: 0xfe0000 (SSFC)
SSFC: SCGO=0, ACS=0, SPOP=0, COP=0, DBC=0, SME=0, SCF=6
0xa4: 0x5006     (PREOP)
0xa6: 0x463b     (OPTYPE)
0xa8: 0x05200302 (OPMENU)
0xac: 0xc79f0190 (OPMENU+4)
0xc4: 0xb1d82004 (LVSCC)
LVSCC: BES=0x0, WG=1, WSR=0, WEWS=0, EO=0x20, VCL=1
0xc8: 0x00002000 (UVSCC)
UVSCC: BES=0x0, WG=0, WSR=0, WEWS=0, EO=0x20
Enabling hardware sequencing by default for
Apollo/Gemini/Jasper/Elkhart/Meteor Lake.
OK.
The following protocols are supported: Programmer-specific.
Probing for Programmer Opaque flash chip, 0 kB: Chip identified:
GD25LQ128C/GD25LQ128D/GD25LQ128E
Hardware sequencing reports 1 attached SPI flash chip with a density of
16384 kB.
Added layout entry 00000000 - 00ffffff named complete flash
Found GigaDevice flash chip "GD25LQ128C/GD25LQ128D/GD25LQ128E" (16384 kB,
Programmer-specific) mapped at physical address 0x0000000000000000.
Found GigaDevice flash chip "GD25LQ128C/GD25LQ128D/GD25LQ128E" (16384 kB,
Programmer-specific).
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
Reading Status register
w25_set_srp0: old status: 0x82
Writing status register
Reading Status register
w25_set_srp0: new status: 0x82
w25_disable_writeprotect(): error=1.
Restoring MMIO space at 0x799bbee0a084
Restoring MMIO space at 0x799bbee0a0ac
Restoring MMIO space at 0x799bbee0a0a8
Restoring MMIO space at 0x799bbee0a0a6
Restoring MMIO space at 0x799bbee0a0a4
restore_power_management: Re-enabling power management.