failed write to an erased chip

[Сергей Янович]

Hi.

This chip is a 1.8V one. I tried to flash it with RPi 3.3V spi, but
failed. Reads were unstable. Now I can reliably read it by having a TI
ALVC164245 between RPi and the chip. The chip seems erased, but I
cannot write anything to it. Attaching a log of

# flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=5000 -VVV -w 8.bin

Thanks!

[Mike Banon]

Your log looks right to me, like a file has been programmed into your
chip successfully. How did you check that the writing operation was a
failure instead?

P.S. I hope that your 1.8V chip wasn't partially damaged by a
temporary usage of 3.3V on it

On Tue, Nov 23, 2021 at 11:23 PM Сергей Янович
 wrote:
> Hi.
>
> This chip is a 1.8V one. I tried to flash it with RPi 3.3V spi, but
> failed. Reads were unstable. Now I can reliably read it by having a TI
> ALVC164245 between RPi and the chip. The chip seems erased, but I
> cannot write anything to it. Attaching a log of
>
> # flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=5000 -VVV -w 8.bin
>
> Thanks!
> _______________________________________________
> flashrom mailing list -- [e-mail]
> To unsubscribe send an email to [e-mail]

[Сергей Янович]

On Wed, 2021-11-24 at 13:17 +0300, Mike Banon wrote:
> Your log looks right to me, like a file has been programmed into your
> chip successfully. How did you check that the writing operation was a
> failure instead?

Thanks for looking into this. The error message didn't make into the
log, b/c it was on stderr. The diff is:

# flashrom -p ... -VVV -w 8.bin > log3 2>&1
$ diff -aU 1 log2 log3
--- log2	2021-11-23 19:06:06.693202071 +0300
+++ log3	2021-11-25 16:51:28.493684854 +0300
@@ -1084,2 +1084,6 @@
 Erase/write done.
-Verifying flash... programmer_unmap_flash_region: unmapped 0x00000000
+Verifying flash... FAILED at 0x00000010! Expected=0x5a, Found=0xff, failed byte count from 0x00000000-0x007fffff: 0x3489ce
+Your flash chip is in an unknown state.
+Please report this on IRC at chat.freenode.net (channel #flashrom) or
+mail [e-mail], thanks!
+programmer_unmap_flash_region: unmapped 0x00000000

If I read the image from chip, I get 8Mib of 0xFF.

I can attach the full log if necessary.
> P.S. I hope that your 1.8V chip wasn't partially damaged by a
> temporary usage of 3.3V on it

It is possible, but seems unlikely. The chip correctly responds to
flasrom probing queries. I suspect I activated a write protection of
some kind. /WP is high at 1.81V now. So I am investigation software WP
in the chip now.

[Сергей Янович]

On Thu, 2021-11-25 at 17:02 +0300, Сергей Янович wrote:
> On Wed, 2021-11-24 at 13:17 +0300, Mike Banon wrote:
> > P.S. I hope that your 1.8V chip wasn't partially damaged by a
> > temporary usage of 3.3V on it
>
> It is possible, but seems unlikely. The chip correctly responds to
> flasrom probing queries. I suspect I activated a write protection of
> some kind. /WP is high at 1.81V now. So I am investigation software WP
> in the chip now.

SOLVED. For reference.

I guessed correctly. Both CMP and WPS bits got set in the status
register. The chip was successfully flashed after both bits were
cleared. I used a small C program for reading and writing. The program
was made along examples in [1].

1. https://www.emcraft.com/stm32f769i-discovery-board/accessing-spi-devices-in-...

[Ivan Ivanov]

Hi Sergey,
> Both CMP and WPS bits got set in the status register. The chip was successfully flashed after both bits were cleared.

I'm curious: Please tell, how you clear these CMP and WPS bits? What
command do you run to do this?

чт, 25 нояб. 2021 г. в 23:44, Сергей Янович :
> On Thu, 2021-11-25 at 17:02 +0300, Сергей Янович wrote:
> > On Wed, 2021-11-24 at 13:17 +0300, Mike Banon wrote:
> > > P.S. I hope that your 1.8V chip wasn't partially damaged by a
> > > temporary usage of 3.3V on it
> >
> > It is possible, but seems unlikely. The chip correctly responds to
> > flasrom probing queries. I suspect I activated a write protection of
> > some kind. /WP is high at 1.81V now. So I am investigation software WP
> > in the chip now.
>
> SOLVED. For reference.
>
> I guessed correctly. Both CMP and WPS bits got set in the status
> register. The chip was successfully flashed after both bits were
> cleared. I used a small C program for reading and writing. The program
> was made along examples in [1].
> https://www.emcraft.com/stm32f769i-discovery-board/accessing-spi-devices-in-...
>
> flashrom mailing list -- [e-mail]
> To unsubscribe send an email to [e-mail]

[Сергей Янович]

On Fri, 2021-11-26 at 16:35 +0300, Ivan Ivanov wrote:
> > Both CMP and WPS bits got set in the status register. The chip was successfully flashed after both bits were cleared.
>
> I'm curious: Please tell, how you clear these CMP and WPS bits? What
> command do you run to do this?

https://github.com/yanovich/spitest.git

The head commit is for SR3 (it is where WPS is).

I've used a debian bullseye bootstrap and schroot with multiarch to
build this tools for raspberry pi. Then from RPi (with raspberry
provided fork of debian):

$ ./spitest /dev/spidev0.0