On Sat, 10 Aug 2013 03:45:51 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
I completely rewrote it *again* :) Apparently the SPI 100 controller in Yangtze is quite different to the existing interface. I spend quite some time on figuring out why the FIFO ring buffer does not seem to work: my diagnose is that it is not a ring buffer at all. I have no idea why they call it FIFO either... we have full indexed access to it. Whatever... these patches should work fine on Kabini (tested on the A180-H). Tests on any other board especially older generations are very welcomed!
Stefan Tauner (6): sbxxx: Add detection for the remaining AMD chipset families. sbxxx: Set SPI clock to 16.5 MHz and disable fast reads. sbxxx: Cleanup. sbxxx: Add support for new AMD SPI controller. sbxxx: Add spispeed parameter. debug
flashrom.8 | 21 +++ programmer.h | 1 + sb600spi.c | 538 ++++++++++++++++++++++++++++++++++++++++++++--------------- 3 files changed, 424 insertions(+), 136 deletions(-)
I think it's time to commit the remaining patches from this set, namely the cleanup (r1793), the SPI100/Yangtze support (r1794) and the spispeed parameter (r1795). They have been tested on my A180-H as well as PCEngine's APU board. Thanks to everyone involved in figuring this out and testing the various variations of the patches.
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Stefan Tauner