2011/5/30 Mohammed-Amine.Rebai@bull.net:
Dear Mr Vollering,
I am sorry for the language mixing, I was not aware that other people than my replier ( Stefan Tauner ) would receive my answer.
That is the difference between replying and replying to all recipients ;)
Due to his informal answer ( smiles etc ) I tried to answer back the same way.
As a Bios engineer, as far as I know, we only use your software to flash the Bios in some cases where we are under Linux. Our usual way to flash our machines is a Bios Integrated utility under EFI Shell.
Thanks again for your help and for the nice job you are doing.
Thanks. The build you're offering (flashrom-bin-x86_64-20081003.tar) looks outdated though, it is from 2008 and targets 64-bit hardware only. Is that on purpose, e.g. you exclusively sell 64-bit hardware?
Best Regards Amine Rebai
De : Idwer Vollering vidwer@gmail.com A : Mohammed-Amine.Rebai@bull.net Cc : flashrom@flashrom.org Date : 30/05/2011 15:15 Objet : Re: [flashrom] Intel SandyBridge serie 6 chipsets support ________________________________
2011/5/30 Mohammed-Amine.Rebai@bull.net:
Hallo Stefan,
Wir könnten eigentlich deutsch sprechen ;).
Ja, unsere Kunden benützen auch flashrom. Wir haben usere EFI shell flashing tool, aber die Kunden benützen das Linux Shell am liebsten, besonders wenn du viele Clusters/Servers flashen muss.
Stimmt, das SPI interface in « Intel Chipset Serie 6 » ist fast wie die vorausgegangen. Es gibt ME protection und special « unlocking sequence » mit special opcodes.
Aber mein Problem ist vor diesen Sachen. « chipset_flash_enable » findet nicht das PCH: « This chipset supports the following protocols: Non-SPI. WARNING: No chipset found. Flash detection will most likely fail. »
und das PCH device_id (Vendor ID:0x8086, Device ID:0x244e ) existiert nicht in das «chipset_enables » stuct. ( mein PCH heisst Patsburg oder C200 chipset ).
Wenn ich « enable_flash_ich10 » Funktion nötige, es funkioniert auch nicht. Maximum FWH chip size: 0x0 bytes BIOS Lock Enable: disabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x0 tried to set 0xdc to 0x1 on ICH10 failed (WARNING ONLY) Root Complex Register Block address = 0x0 Error accessing ICH RCRB, 0x4000 bytes at 0x00000000 /dev/mem mmap failed: Resource temporarily unavailableIch werde vielleicht eine neue funktion schreiben ;). Vielen Dank.
Mit freundlichen Grüßen Amine Rebai
It is not very "freundlich" (friendly) to write a reply in an other language than English, given the fact that your first message was written in English.
Also, the download named flashrom-bin-x86_64-20081003.tar [1] is behind a 'paywall' / customer login. There is no trace of "flashrom is GPL software" at that website, where can anyone download, if there are any, your patches?
Thanks, Idwer
[1] http://support.bull.com/ols/product/platforms/hw-extremcomp/bullx-R/dl/toolf...
De : Stefan Tauner stefan.tauner@student.tuwien.ac.at A : Mohammed-Amine.Rebai@bull.net Cc : flashrom@flashrom.org Date : 27/05/2011 20:02 Objet : Re: [flashrom] Intel SandyBridge serie 6 chipsets support ________________________________
On Fri, 27 May 2011 14:58:57 +0200 Mohammed-Amine.Rebai@bull.net wrote:
Dear Flahsrom representant,
hello!
I am a Bios engineer at BULL, a major european server and supercomputer company «www.bull.com » .
First of all, I would like to thank you for the great job you are doing, we use your utility a lot.
nice to hear that, thank you. is it offered to your customers too?
I would like to know if you are planning to support the Bios SPI flash flashing on the Intel SandyBridge architecture, especially the Intel 6 series chipset/C200/Patsburg platform controller hub?
the spi interface of the 6 series chipset is very similar to the previous ones and as long as there is no locking in place (i am talking about PR0-PR4 and related "security" stuff) it may already work, have you tried it?
in case of locking in place (that might be a requirement in nowadays chipsets due to the requirement of using the ME) flashrom would not work yet. i am working on this problem within the scope of my google summer of code project which should be completed by the end of summer. dont hold your breath though please ;)
-- Kind regards/Mit freundlichen Grüßen, Stefan Tauner
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