On Sun, 4 Aug 2013 16:03:27 +0200 Stefan Tauner stefan.tauner@student.tuwien.ac.at wrote:
The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) but the SPI interface does. Bail out in case we detect Yangtze and add infrastructure to distinguish other families too for further refactorings.
Also, add ASRock IMB-A180 to the laptop whitelist.
Tested on ASRock IMB-A180 with and w/o USE_YANGTZE_HEURISTICS.
Signed-off-by: Stefan Tauner stefan.tauner@student.tuwien.ac.at
Thanks a lot to Sage for testing! Self-acked and committed in r1706.
Carldani did not like the huge patch, so here we go with 4 smaller ones. The heave rebasing pretty surely broke something and the last patch needs some final touches, but I wanted to get it out anyway.
Stefan Tauner (4): sbxxx: Add detection for the remaining AMD chipset families. sbxxx: Set SPI clock to 16.5 MHz and disable fast reads. sbxxx: Add support for new AMD SPI controller. sbxxx: Add spispeed parameter.
flashrom.8 | 14 ++ sb600spi.c | 543 +++++++++++++++++++++++++++++++++++++++++++------------------ 2 files changed, 396 insertions(+), 161 deletions(-)
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Stefan Tauner