Hi,
this patch adds support for a PCI "flash memory card" named "Dr. Kaiser PC-Waechter". The Vendor sold different designs under that name, the patch works with the one that has an ACTEL FPGA as PCI-to-Flash bridge.
The Flash chip is a "Macronix MX29F001B" (128 KB, Parallel) soldered directly to the PCB. Flash operations (PROBE, READ, ERASE, WRITE) work as expected, btw.
I had to modify pcidev.c a bit: This card has 0x0000000 at PCI_BASE_ADDRESS_0 because it uses PCI_BASE_ADDRESS_2 instead.
-- TURBO J
ps. Unrelated issue: My OpenSUSE 11.2 Beta Box needs "make CFLAGS=-fno-strict-aliasing" GCC is "gcc version 4.4.1 [gcc-4_4-branch revision 149935] (SUSE Linux)"
Signed-off-by: TURBO J turboj@gmx.de
Index: flash.h =================================================================== --- flash.h (Revision 710) +++ flash.h (Arbeitskopie) @@ -84,6 +84,7 @@ PROGRAMMER_INTERNAL, PROGRAMMER_DUMMY, PROGRAMMER_NIC3COM, + PROGRAMMER_DRKAISER, PROGRAMMER_SATASII, PROGRAMMER_IT87SPI, #if FT2232_SPI_SUPPORT == 1 @@ -387,6 +388,15 @@ uint8_t nic3com_chip_readb(const chipaddr addr); extern struct pcidev_status nics_3com[];
+/* drkaiser.c */ + +int drkaiser_init(void); +int drkaiser_shutdown(void); +void drkaiser_chip_writeb(uint8_t val, chipaddr addr); +uint8_t drkaiser_chip_readb(const chipaddr addr); + +extern struct pcidev_status drkaiser_pcidev[]; + /* satasii.c */ int satasii_init(void); int satasii_shutdown(void); Index: drkaiser.c =================================================================== --- drkaiser.c (Revision 0) +++ drkaiser.c (Revision 0) @@ -0,0 +1,76 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 TURBO J turboj@web.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <stdlib.h> +#include <string.h> +#include <sys/types.h> +#include "flash.h" +#define PCI_VENDOR_ID_DRKAISER 0x1803 +#define PCI_DEVICE_ID_DRKAISER_ACTEL 0x5057 + + +struct pcidev_status drkaiser_pcidev[] = { + {0x1803, 0x5057,PCI_OK,"Dr.Kaiser","PC-Waechter (Actel FPGA)"}, + {}, +}; + +#define PCI_MAGIC_DRKAISER_ADR 0x50 +#define PCI_MAGIC_DRKAISER_VALUE 0xA971 + +uint8_t * drkaiser_mem; + +int drkaiser_init(void) +{ + get_io_perms(); + pcidev_init(PCI_VENDOR_ID_DRKAISER, drkaiser_pcidev, programmer_param); + + // Write Magic Register to enable FLASH Write + pci_write_word(pcidev_dev,PCI_MAGIC_DRKAISER_ADR, PCI_MAGIC_DRKAISER_VALUE); + + // Map 128KB Flash Memory Window + drkaiser_mem=physmap("Dr.Kaiser PC-Waechter FLASH Memory", + pci_read_long(pcidev_dev,PCI_BASE_ADDRESS_2), 128*1024); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + return 0; +} + +int drkaiser_shutdown(void) +{ + // Write protect the Flash again + pci_write_word(pcidev_dev,PCI_MAGIC_DRKAISER_ADR, 0); + free(programmer_param); + pci_cleanup(pacc); + release_io_perms(); + return 0; +}; + + +void drkaiser_chip_writeb(uint8_t val, chipaddr addr) +{ + mmio_writeb(val, drkaiser_mem+addr ); +} + +uint8_t drkaiser_chip_readb(const chipaddr addr) +{ + return mmio_readb(drkaiser_mem + addr ); +} + + + Index: pcidev.c =================================================================== --- pcidev.c (Revision 710) +++ pcidev.c (Arbeitskopie) @@ -39,6 +39,9 @@
/* Don't use dev->base_addr[0], won't work on older libpci. */ addr = pci_read_long(dev, PCI_BASE_ADDRESS_0) & ~0x03; + + /* Dr. Kaiser has BASE_ADDRESS_0 = 0x000 */ + if (!addr) addr= pci_read_long(dev, PCI_BASE_ADDRESS_2) & ~0x03;
printf("Found "%s %s" (%04x:%04x, BDF %02x:%02x.%x).\n", devs[i].vendor_name, devs[i].device_name, dev->vendor_id, Index: Makefile =================================================================== --- Makefile (Revision 710) +++ Makefile (Arbeitskopie) @@ -50,7 +50,7 @@ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \ dummyflasher.o pcidev.o nic3com.o satasii.o ft2232_spi.o \ - print.o + print.o drkaiser.o
all: pciutils features dep $(PROGRAM)
Index: flashrom.c =================================================================== --- flashrom.c (Revision 710) +++ flashrom.c (Arbeitskopie) @@ -87,7 +87,24 @@ .chip_writen = fallback_chip_writen, .delay = internal_delay, }, + { + .name = "drkaiser", + .init = drkaiser_init, + .shutdown = drkaiser_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = drkaiser_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = drkaiser_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + },
+ { .name = "satasii", .init = satasii_init, @@ -747,6 +764,7 @@ printf("\nSupported PCI devices flashrom can use " "as programmer:\n\n"); print_supported_pcidevs(nics_3com); + print_supported_pcidevs(drkaiser_pcidev); print_supported_pcidevs(satas_sii); exit(0); }
Hi,
On Wed, Sep 02, 2009 at 09:01:01PM +0200, TURBO J wrote:
this patch adds support for a PCI "flash memory card" named "Dr. Kaiser PC-Waechter".
Great, thanks a lot for the patch!
I committed it in r712 with some smaller changes.
- Small whitespace and coding style fixes.
- Made PCI_BASE_ADDRESS_2 support a bit more generic, see below.
- Added programmer to the manpage.
Unrelated issue: My OpenSUSE 11.2 Beta Box needs "make CFLAGS=-fno-strict-aliasing" GCC is "gcc version 4.4.1 [gcc-4_4-branch revision 149935] (SUSE Linux)"
Can you post the full build output of your compiler here, so we can fix the actual issue (so that fno-strict-aliasing is hopefully no longer needed).
Please also send the output of 'lspci -vvvxxx' for reference, and the output of a sample write operation of flashrom (flashrom -w foo.bin) if possible. Thanks!
+#define PCI_MAGIC_DRKAISER_VALUE 0xA971
[...]
- pci_write_word(pcidev_dev,PCI_MAGIC_DRKAISER_ADR, PCI_MAGIC_DRKAISER_VALUE);
Do you know if the magic value above is completely required? Maybe it's just one of the bits in there that needs to be toggled? Theoretically this could even be tested using the hardware (toggle one of the bits, check if writing works; if not, toggle the next bit etc. etc.)
- // Map 128KB Flash Memory Window
- drkaiser_mem=physmap("Dr.Kaiser PC-Waechter FLASH Memory",
- pci_read_long(pcidev_dev,PCI_BASE_ADDRESS_2), 128*1024);
Are you sure 128 KB is the maximum supported size here? The chip on your board is 128KB, but maybe if bigger chips were soldered on instead they would still work (depends on the FPGA, hardware wiring etc, I guess)?
Index: pcidev.c
--- pcidev.c (Revision 710) +++ pcidev.c (Arbeitskopie) @@ -39,6 +39,9 @@
/* Don't use dev->base_addr[0], won't work on older libpci. */ addr = pci_read_long(dev, PCI_BASE_ADDRESS_0) & ~0x03;
/* Dr. Kaiser has BASE_ADDRESS_0 = 0x000 */
if (!addr) addr= pci_read_long(dev, PCI_BASE_ADDRESS_2) & ~0x03;
I changed this to be a bit more generic, every programmer now passes the base address in as a parameter, most PCI_BASE_ADDRESS_0 for now, drkaiser uses PCI_BASE_ADDRESS_2.
Uwe.
Hi,
On 03.09.2009 01:12, Uwe Hermann wrote:
On Wed, Sep 02, 2009 at 09:01:01PM +0200, TURBO J wrote:
this patch adds support for a PCI "flash memory card" named "Dr. Kaiser PC-Waechter".
Great, thanks a lot for the patch!
I committed it in r712 with some smaller changes.
- Small whitespace and coding style fixes.
- Made PCI_BASE_ADDRESS_2 support a bit more generic, see below.
- Added programmer to the manpage.
Thanks!
- // Map 128KB Flash Memory Window
- drkaiser_mem=physmap("Dr.Kaiser PC-Waechter FLASH Memory",
- pci_read_long(pcidev_dev,PCI_BASE_ADDRESS_2), 128*1024);
Are you sure 128 KB is the maximum supported size here? The chip on your board is 128KB, but maybe if bigger chips were soldered on instead they would still work (depends on the FPGA, hardware wiring etc, I guess)?
Interesting question. The peculiar flash chip mapping has a few other side effects, though:
+void drkaiser_chip_writeb(uint8_t val, chipaddr addr) +{
- mmio_writeb(val, drkaiser_bar + addr);
+}
+uint8_t drkaiser_chip_readb(const chipaddr addr) +{
- return mmio_readb(drkaiser_bar + addr);
+}
Please note that addr is _not_ relative to chip start. For any given chip, the addr of the lowest byte of the chip is 0x100000000-chipsize. This means your accessor functions have to implement bounds checking and either error out or wrap around. Example for wrapping around:
void drkaiser_chip_writeb(uint8_t val, chipaddr addr) { mmio_writeb(val, (drkaiser_bar + addr) & ((1 << 17) - 1); }
Example for aborting:
void drkaiser_chip_writeb(uint8_t val, chipaddr addr) { /* chipaddr is unsigned */ if (addr > (1 << 17)) { /* Bitch and complain and abort. */ fprintf(stderr, "Waah! Accessing outside the BAR, addr=%08lx.\n", chipaddr); /* Maybe exit(1) when we're sure this will not trigger. */ return; } mmio_writeb(val, (drkaiser_bar + addr) & ((1 << 17) - 1); }
Otherwise we risk writing to and reading from arbitrary RAM/MMIO regions...
There is another problem in the generic PCI code, but that's not your fault: We don't check if the BAR is 32bit or 64bit. That may cause some problems on systems with 64bit address space which place device resources above 4G.
Regards, Carl-Daniel
On 03.09.2009 07:18, Carl-Daniel Hailfinger wrote:
On 03.09.2009 01:12, Uwe Hermann wrote:
On Wed, Sep 02, 2009 at 09:01:01PM +0200, TURBO J wrote:
The peculiar flash chip mapping has a few other side effects, though:
+void drkaiser_chip_writeb(uint8_t val, chipaddr addr) +{
- mmio_writeb(val, drkaiser_bar + addr);
+}
+uint8_t drkaiser_chip_readb(const chipaddr addr) +{
- return mmio_readb(drkaiser_bar + addr);
+}
Please note that addr is _not_ relative to chip start. For any given chip, the addr of the lowest byte of the chip is 0x100000000-chipsize.
Please ignore the two sentences above. I was looking at the wrong version of the code.
This means your accessor functions have to implement bounds checking and either error out or wrap around. Example for wrapping around:
And to top it off, my wraparound and bounds checking examples were totally wrong. Sorry for that. I need to get some sleep and reread the code afterwards. Some bounds checking would still be nice, though.
Regards, Carl-Daniel
Hi, Uwe Hermann schrieb:
Unrelated issue: My OpenSUSE 11.2 Beta Box needs "make CFLAGS=-fno-strict-aliasing" GCC is "gcc version 4.4.1 [gcc-4_4-branch revision 149935] (SUSE Linux)"
Can you post the full build output of your compiler here, so we can fix the actual issue (so that fno-strict-aliasing is hopefully no longer needed).
Here it is: cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-runknown"' -o physmap.o -c physmap.c cc1: warnings being treated as errors physmap.c: In function ârdmsrâ: physmap.c:146: error: dereferencing type-punned pointer will break strict-aliasing rules make: *** [physmap.o] Fehler 1
This issue has already been reported on this list.
Please also send the output of 'lspci -vvvxxx' for reference, and the output of a sample write operation of flashrom (flashrom -w foo.bin) if possible. Thanks!
Both attached.
+#define PCI_MAGIC_DRKAISER_VALUE 0xA971
[...]
- pci_write_word(pcidev_dev,PCI_MAGIC_DRKAISER_ADR, PCI_MAGIC_DRKAISER_VALUE);
Do you know if the magic value above is completely required? Maybe it's just one of the bits in there that needs to be toggled? Theoretically this could even be tested using the hardware (toggle one of the bits, check if writing works; if not, toggle the next bit etc. etc.)
Checked all 2^16 combinations: Only the "magic" one works. All bits are significant.
- // Map 128KB Flash Memory Window
- drkaiser_mem=physmap("Dr.Kaiser PC-Waechter FLASH Memory",
- pci_read_long(pcidev_dev,PCI_BASE_ADDRESS_2), 128*1024);
Are you sure 128 KB is the maximum supported size here? The chip on your board is 128KB, but maybe if bigger chips were soldered on instead they would still work (depends on the FPGA, hardware wiring etc, I guess)?
All "Dr.Kaiser" Cars that I've seen so far have exactly the same Flash chip, even the ones that are plugged into a socket (of the NIC version), probably due to a limit of their original software.
-- J. Fischer
flashrom v0.9.1-runknown Found "Dr. Kaiser PC-Waechter (Actel FPGA)" (1803:5057, BDF 00:0e.0). Calibrating delay loop... OK. Found chip "Macronix MX29F001B" (128 KB, Parallel) at physical address 0xfffe0000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page: address: 0x00000000address: 0x00001000address: 0x00002000address: 0x00003000address: 0x00004000address: 0x00005000address: 0x00006000address: 0x00007000address: 0x00008000address: 0x00009000address: 0x0000a000address: 0x0000b000address: 0x0000c000address: 0x0000d000address: 0x0000e000address: 0x0000f000address: 0x00010000address: 0x00011000address: 0x00012000address: 0x00013000address: 0x00014000address: 0x00015000address: 0x00016000address: 0x00017000address: 0x00018000address: 0x00019000address: 0x0001a000address: 0x0001b000address: 0x0001c000address: 0x0001d000address: 0x0001e000address: 0x0001f000 COMPLETE. Verifying flash... VERIFIED.
00:00.0 Host bridge: VIA Technologies, Inc. VT8363/8365 [KT133/KM133] (rev 02) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR+ INTx- Latency: 0 Region 0: Memory at d0000000 (32-bit, prefetchable) [size=64M] Capabilities: [a0] AGP version 2.0 Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW+ AGP3- Rate=x1,x2,x4 Command: RQ=1 ArqSz=0 Cal=0 SBA- AGP- GART64- 64bit- FW- Rate=<none> Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: agpgart-via 00: 06 11 05 03 06 00 10 a2 02 00 00 06 00 00 00 00 10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 17 a4 eb b4 46 0a 14 14 0c 80 00 00 08 10 14 14 60: 3c ba 00 20 d4 e6 e6 c4 50 28 65 2d 08 13 00 00 70: 46 88 cc 0c 0e 81 e2 00 01 b4 19 02 00 00 00 00 80: 0f 40 00 00 c0 00 00 00 03 00 5d 13 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 02 c0 20 00 17 02 00 1f 00 00 00 00 2f 02 14 00 b0: 62 db 20 85 31 33 3f 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 0e 22 00 00 00 00 00 00 00
00:01.0 PCI bridge: VIA Technologies, Inc. VT8363/8365 [KT133/KM133 AGP] (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000c000-0000cfff Memory behind bridge: d8000000-d9ffffff Prefetchable memory behind bridge: d4000000-d7ffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA+ MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- 00: 06 11 05 83 07 00 30 22 00 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 c0 c0 00 00 20: 00 d8 f0 d9 00 d4 f0 d7 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 0c 00 40: cb cd 08 44 25 72 05 83 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 02 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 22) Subsystem: VIA Technologies, Inc. VT82C686/A PCI to ISA Bridge Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Kernel driver in use: parport_pc 00: 06 11 86 06 87 00 10 02 22 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 09 41 00 c0 00 80 60 a0 01 00 84 00 00 00 f0 f3 50: 0e 76 34 00 00 00 ab a0 00 06 ff 08 50 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 05 30 00 02 00 00 f0 40 00 00 00 00 80: 00 00 00 00 00 09 00 00 00 00 00 02 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE (rev 10) (prog-if 8a [Master SecP PriP]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1] Region 4: I/O ports at d000 [size=16] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pata_via 00: 06 11 71 05 07 00 90 02 10 8a 01 01 00 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 ff 00 00 00 40: 03 e2 08 3a 08 10 c0 00 99 99 99 20 7f 00 a8 20 50: 0b 03 0b e0 14 00 00 00 a8 a8 a8 a8 00 00 00 00 60: 00 02 00 00 00 00 00 00 00 02 00 00 00 00 00 00 70: 02 01 00 00 00 00 00 00 82 01 00 00 00 00 00 00 80: 00 b0 73 12 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 10 00 71 05 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.2 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 10) (prog-if 00 [UHCI]) Subsystem: First International Computer, Inc. VA-502 Mainboard Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin D routed to IRQ 10 Region 4: I/O ports at d400 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: uhci_hcd 00: 06 11 38 30 07 00 10 02 10 00 03 0c 08 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d4 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 04 00 00 40: 00 10 03 00 c2 00 20 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.3 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1 Controller (rev 10) (prog-if 00 [UHCI]) Subsystem: First International Computer, Inc. VA-502 Mainboard Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 32 bytes Interrupt: pin D routed to IRQ 10 Region 4: I/O ports at d800 [size=32] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: uhci_hcd 00: 06 11 38 30 07 00 10 02 10 00 03 0c 08 20 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 d8 00 00 00 00 00 00 00 00 00 00 25 09 34 12 30: 00 00 00 00 80 00 00 00 00 00 00 00 0a 04 00 00 40: 00 10 03 00 02 00 10 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.4 Host bridge: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 30) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin ? routed to IRQ 11 Capabilities: [68] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- 00: 06 11 57 30 00 00 90 02 30 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 68 00 00 00 00 00 00 00 00 00 00 00 40: 20 84 5b 00 fa 30 00 00 01 40 00 00 00 10 00 00 50: 00 fe ff 88 50 00 00 00 00 fe ff 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 01 00 02 00 00 00 00 00 70: 01 60 00 00 01 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 01 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:07.5 Multimedia audio controller: VIA Technologies, Inc. VT82C686 AC97 Audio Controller (rev 20) Subsystem: Analog Devices Device 5340 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin C routed to IRQ 10 Region 0: I/O ports at dc00 [size=256] Region 1: I/O ports at e000 [size=4] Region 2: I/O ports at e400 [size=4] Capabilities: [c0] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: VIA 82xx Audio 00: 06 11 58 30 01 00 10 02 20 00 01 04 00 00 00 00 10: 01 dc 00 00 01 e0 00 00 01 e4 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 d4 11 40 53 30: 00 00 00 00 c0 00 00 00 00 00 00 00 0a 03 00 00 40: 01 cc 45 1c 00 00 00 00 00 00 00 02 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:09.0 Network controller: AVM GmbH A1 ISDN [Fritz] (rev 02) Subsystem: AVM GmbH FRITZ!Card ISDN Controller Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 12 Region 0: Memory at db043000 (32-bit, non-prefetchable) [size=32] Region 1: I/O ports at e800 [size=32] 00: 44 12 00 0a 03 01 80 02 02 00 80 02 00 00 00 00 10: 00 30 04 db 01 e8 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 44 12 00 0a 30: 00 00 00 00 00 00 00 00 00 00 00 00 0c 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0a.0 Ethernet controller: Accton Technology Corporation SMC2-1211TX (rev 10) Subsystem: Accton Technology Corporation EN-1207D Fast Ethernet Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (8000ns min, 16000ns max) Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at ec00 [size=256] Region 1: Memory at db042000 (32-bit, non-prefetchable) [size=256] [virtual] Expansion ROM at 14000000 [disabled] [size=128K] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: 8139too 00: 13 11 11 12 07 00 90 02 10 00 00 02 00 20 00 00 10: 01 ec 00 00 00 20 04 db 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 13 11 11 12 30: 00 00 00 00 50 00 00 00 00 00 00 00 0b 01 20 40 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 00 c2 f7 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0c.0 Network controller: RaLink RT2500 802.11g Cardbus/mini-PCI (rev 01) Subsystem: Advance Multimedia Internet Technology, Inc. Device 5312 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 10 Region 0: Memory at db040000 (32-bit, non-prefetchable) [size=8K] Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: rt2500pci 00: 14 18 01 02 17 00 10 04 01 00 80 02 10 20 00 00 10: 00 00 04 db 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 01 06 00 00 eb 18 12 53 30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 00 00 40: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0e.0 FLASH memory: ProdaSafe GmbH Device 5057 (rev 01) Subsystem: ProdaSafe GmbH Device 5057 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Region 2: Memory at db000000 (32-bit, non-prefetchable) [size=256K] [virtual] Expansion ROM at 14020000 [disabled] [size=128K] 00: 03 18 57 50 03 00 00 02 01 00 01 05 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 db 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 03 18 57 50 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 71 a9 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
01:00.0 VGA compatible controller: ATI Technologies Inc Rage 128 PF/PRO AGP 4x TMDS (prog-if 00 [VGA controller]) Subsystem: ATI Technologies Inc Rage Fury Pro Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (2000ns min), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 12 Region 0: Memory at d4000000 (32-bit, prefetchable) [size=64M] Region 1: I/O ports at c000 [size=256] Region 2: Memory at d9000000 (32-bit, non-prefetchable) [size=16K] [virtual] Expansion ROM at d8000000 [disabled] [size=128K] Capabilities: [50] AGP version 2.0 Status: RQ=32 Iso- ArqSz=0 Cal=0 SBA+ ITACoh- GART64- HTrans- 64bit- FW- AGP3- Rate=x1,x2,x4 Command: RQ=1 ArqSz=0 Cal=0 SBA+ AGP- GART64- 64bit- FW- Rate=<none> Capabilities: [5c] Power Management version 2 Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- 00: 02 10 46 50 87 00 b0 02 00 00 00 03 08 20 00 00 10: 08 00 00 d4 01 c0 00 00 00 00 00 d9 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 02 10 04 00 30: 00 00 00 00 50 00 00 00 00 00 00 00 0c 01 08 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 02 5c 20 00 07 02 00 1f 00 02 00 00 01 00 02 02 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Jörg Fischer wrote:
Hi, Uwe Hermann schrieb:
Unrelated issue: My OpenSUSE 11.2 Beta Box needs "make CFLAGS=-fno-strict-aliasing" GCC is "gcc version 4.4.1 [gcc-4_4-branch revision 149935] (SUSE Linux)"
Can you post the full build output of your compiler here, so we can fix the actual issue (so that fno-strict-aliasing is hopefully no longer needed).
Here it is: cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-runknown"' -o physmap.o -c physmap.c cc1: warnings being treated as errors physmap.c: In function ârdmsrâ: physmap.c:146: error: dereferencing type-punned pointer will break strict-aliasing rules make: *** [physmap.o] Fehler 1
This issue has already been reported on this list.
Does the following patch fix compilation for you?
Best regards, Stefan
fix for gcc 4.4 strict aliasing rules.
Signed-off-by: Stefan Reinauer stepan@coresystems.de
Index: physmap.c =================================================================== --- physmap.c (revision 713) +++ physmap.c (working copy) @@ -133,7 +133,7 @@
msr_t rdmsr(int addr) { - uint8_t buf[8]; + uint32_t buf[2]; msr_t msr = { 0xffffffff, 0xffffffff };
if (lseek(fd_msr, (off_t) addr, SEEK_SET) == -1) { @@ -143,8 +143,8 @@ }
if (read(fd_msr, buf, 8) == 8) { - msr.lo = *(uint32_t *)buf; - msr.hi = *(uint32_t *)(buf + 4); + msr.lo = buf[0]; + msr.hi = buf[1];
return msr; }
On 04.09.2009 03:09, Stefan Reinauer wrote:
Jörg Fischer wrote:
physmap.c: In function 'rdmsr': physmap.c:146: error: dereferencing type-punned pointer will break strict-aliasing rules make: *** [physmap.o] Fehler 1
Does the following patch fix compilation for you?
fix for gcc 4.4 strict aliasing rules.
Signed-off-by: Stefan Reinauer stepan@coresystems.de
Tested, works. Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Regards, Carl-Daniel