Hi
this works fine !
flashrom v0.9.2-r1023 on Linux 2.6.32-22-generic (x86_64), built with libpci 3.0.0, GCC 4.4.3, little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found chip "SST SST49LF080A" (1024 KB, LPC) at physical address 0xfff00000. No operations were specified.
Date: Sat, 22 May 2010 10:05:30 +0200 From: c-d.hailfinger.devel.2006@gmx.net To: flashrom@flashrom.org CC: alex@nibbles.it; joelr@tyan.com; i15@ornl.gov; avlin@hotmail.fr; nilsga@gmail.com Subject: Tyan S2915 OEM / HP xw9400 now supported
Hi,
flashrom should work fine since version 0.9.2 revision 1008 on all Tyan S2915 OEM boards. The reason for the failing access was that those boards have two MCP55 LPC bridges. flashrom enabled the first LPC bridge (oddball PCI class) instead of the second one (ISA bridge PCI class). Since we don't have any reports of PCI ID 10de:0361 being used as "real" primary LPC bridge, we blacklisted that ID for now until class checking is in place (which may break on other boards with buggy BIOS, not sure). The "real" LPC bridge on this board has the PCI ID
I'd appreciate full output of flashrom -V with latest flashrom (at least 0.9.2-r1008).
Thanks to everyone who tested and provided lspci output.
Regards, Carl-Daniel
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