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[commit] r651 - trunk
by svn＠flashrom.org 12 Jul '09

12 Jul '09

Author: hailfinger Date: 2009-07-12 14:06:18 +0200 (Sun, 12 Jul 2009) New Revision: 651 Modified: trunk/flash.h trunk/ft2232_spi.c trunk/it87spi.c trunk/sb600spi.c trunk/spi.c trunk/wbsio_spi.c Log: Convert SPI byte program to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested it on Epia-m700 worked okay. Acked-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Tested-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/flash.h 2009-07-12 12:06:18 UTC (rev 651) @@ -446,9 +446,9 @@ int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); int spi_disable_blockprotect(void); -void spi_byte_program(int address, uint8_t byte); -int spi_nbyte_program(int address, uint8_t *bytes, int len); -int spi_nbyte_read(int address, uint8_t *bytes, int len); +int spi_byte_program(int addr, uint8_t byte); +int spi_nbyte_program(int addr, uint8_t *bytes, int len); +int spi_nbyte_read(int addr, uint8_t *bytes, int len); int spi_read_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize); int spi_aai_write(struct flashchip *flash, uint8_t *buf); uint32_t spi_get_valid_read_addr(void); Modified: trunk/ft2232_spi.c =================================================================== --- trunk/ft2232_spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/ft2232_spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -276,7 +276,6 @@ else l = total_size - i; - spi_write_enable(); if ((r = spi_nbyte_program(i, &buf[i], l))) { fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r); // spi_write_disable(); chip does this for us Modified: trunk/it87spi.c =================================================================== --- trunk/it87spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/it87spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -232,6 +232,7 @@ result = spi_write_enable(); if (result) return result; + /* FIXME: The command below seems to be redundant or wrong. */ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < 256; i++) { @@ -262,10 +263,7 @@ spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - result = spi_write_enable(); - if (result) - return result; - spi_byte_program(i, buf[i]); + result = spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); } Modified: trunk/sb600spi.c =================================================================== --- trunk/sb600spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/sb600spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -73,10 +73,7 @@ printf("Programming flash"); for (i = 0; i < total_size; i++, buf++) { spi_disable_blockprotect(); - result = spi_write_enable(); - if (result) - return result; - spi_byte_program(i, *buf); + result = spi_byte_program(i, *buf); /* wait program complete. */ if (i % 0x8000 == 0) printf("."); Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -154,21 +154,7 @@ result = spi_send_command(sizeof(cmd), 0, cmd, NULL); if (result) - printf_debug("%s failed", __func__); - if (result == SPI_INVALID_OPCODE) { - switch (spi_controller) { - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - case SPI_CONTROLLER_VIA: - printf_debug(" due to SPI master limitation, ignoring" - " and hoping it will be run as PREOP\n"); - return 0; - default: - break; - } - } - if (result) - printf_debug("\n"); + printf_debug("%s failed\n", __func__); return result; } @@ -736,39 +722,80 @@ return spi_send_command(sizeof(cmd), 0, cmd, NULL); } -void spi_byte_program(int address, uint8_t byte) +int spi_byte_program(int addr, uint8_t byte) { - const unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE] = { - JEDEC_BYTE_PROGRAM, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - byte - }; + int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BYTE_PROGRAM, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff), byte }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - /* Send Byte-Program */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + return result; + } + return result; } int spi_nbyte_program(int address, uint8_t *bytes, int len) { + int result; + /* FIXME: Switch to malloc based on len unless that kills speed. */ unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { JEDEC_BYTE_PROGRAM, (address >> 16) & 0xff, (address >> 8) & 0xff, (address >> 0) & 0xff, }; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + len, + .writearr = cmd, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + if (!len) { + printf_debug ("%s called for zero-length write\n", __func__); + return 1; + } if (len > 256) { - printf_debug ("%s called for too long a write\n", - __FUNCTION__); + printf_debug ("%s called for too long a write\n", __func__); return 1; } memcpy(&cmd[4], bytes, len); - /* Send Byte-Program */ - return spi_send_command(4 + len, 0, cmd, NULL); + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); + return result; + } + return result; } int spi_disable_blockprotect(void) @@ -883,7 +910,6 @@ spi_disable_blockprotect(); for (i = 0; i < total_size; i++) { - spi_write_enable(); spi_byte_program(i, buf[i]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); Modified: trunk/wbsio_spi.c =================================================================== --- trunk/wbsio_spi.c 2009-07-11 22:26:52 UTC (rev 650) +++ trunk/wbsio_spi.c 2009-07-12 12:06:18 UTC (rev 651) @@ -200,11 +200,8 @@ fprintf(stderr, "ERASE FAILED!\n"); return -1; } - result = spi_write_enable(); - if (result) - return result; for (pos = 0; pos < size; pos++) { - spi_byte_program(pos, buf[pos]); + result = spi_byte_program(pos, buf[pos]); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); }

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[PATCH] Convert SPI block erase to multicommand
by Carl-Daniel Hailfinger 11 Jul '09

11 Jul '09

Convert SPI block erase to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_multicommand_blockerase/spi.c =================================================================== --- flashrom-spi_multicommand_blockerase/spi.c (Revision 648) +++ flashrom-spi_multicommand_blockerase/spi.c (Arbeitskopie) @@ -536,17 +536,30 @@ int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_52_OUTSIZE] = {JEDEC_BE_52, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_52_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_52, (addr & 0x00ff0000) >> 16, (addr & 0x0000ff00) >> 8, (addr & 0x000000ff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -566,17 +579,30 @@ */ int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_D8_OUTSIZE] = { JEDEC_BE_D8, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_D8_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_D8, (addr & 0x00ff0000) >> 16, (addr & 0x0000ff00) >> 8, (addr & 0x000000ff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -615,18 +641,30 @@ /* Sector size is usually 4k, though Macronix eliteflash has 64k */ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_SE_OUTSIZE] = { JEDEC_SE, }; int result; - - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_SE_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_SE, (addr & 0x00ff0000) >> 16, (addr & 0x0000ff00) >> 8, (addr & 0x000000ff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send SE (Sector Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */ -- http://www.hailfinger.org/

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[commit] r650 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: hailfinger Date: 2009-07-12 00:26:52 +0200 (Sun, 12 Jul 2009) New Revision: 650 Modified: trunk/spi.c Log: Convert SPI block erase to use the multicommand infrastructure. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Jakob writes: Tested it on my EPIA-m700 and it worked nice. Also double checked that one of the changed functions actually ran. Acked-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Tested-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-11 22:17:28 UTC (rev 649) +++ trunk/spi.c 2009-07-11 22:26:52 UTC (rev 650) @@ -536,17 +536,30 @@ int spi_block_erase_52(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_52_OUTSIZE] = {JEDEC_BE_52, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_52_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_52, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -566,17 +579,30 @@ */ int spi_block_erase_d8(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_BE_D8_OUTSIZE] = { JEDEC_BE_D8, }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_BE_D8_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_BE_D8, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send BE (Block Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 100-4000 ms, so wait in 100 ms steps. */ @@ -615,18 +641,30 @@ /* Sector size is usually 4k, though Macronix eliteflash has 64k */ int spi_block_erase_20(struct flashchip *flash, unsigned int addr, unsigned int blocklen) { - unsigned char cmd[JEDEC_SE_OUTSIZE] = { JEDEC_SE, }; int result; - - cmd[1] = (addr & 0x00ff0000) >> 16; - cmd[2] = (addr & 0x0000ff00) >> 8; - cmd[3] = (addr & 0x000000ff); + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_SE_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_SE, (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff) }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; - result = spi_write_enable(); - if (result) + result = spi_send_multicommand(spicommands); + if (result) { + printf_debug("%s failed during command execution\n", __func__); return result; - /* Send SE (Sector Erase) */ - spi_send_command(sizeof(cmd), 0, cmd, NULL); + } /* Wait until the Write-In-Progress bit is cleared. * This usually takes 15-800 ms, so wait in 10 ms steps. */

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[commit] r649 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: uwe Date: 2009-07-12 00:17:28 +0200 (Sun, 12 Jul 2009) New Revision: 649 Modified: trunk/flashrom.8 Log: Fix incorrect manpage (trivial). The flashrom manpage currently says "-w, --write: Write file into flash ROM (default when <file> is specified)". This is no longer true for recent flashrom versions, which only write if you explicitly use the -w option. Proof: $ flashrom coreboot.rom flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found board "Kontron 986LCD-M", enabling flash write... OK. Calibrating delay loop... OK. Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000. No operations were specified. Thus, fix manpage accordingly. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-07-11 19:39:11 UTC (rev 648) +++ trunk/flashrom.8 2009-07-11 22:17:28 UTC (rev 649) @@ -33,9 +33,7 @@ .BR <file> . .TP .B "\-w, \-\-write <file>" -Write file into flash ROM (default when -.B <file> -is specified). +Write file into flash ROM. .TP .B "\-n, \-\-noverify" Do

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[PATCH] Add Winbond W25X16
by Hector Martin 11 Jul '09

11 Jul '09

Tested probing and reading only. The chip ID was already in flashchips.h. Signed-off-by: Hector Martin <hector(a)marcansoft.com> --- flashrom/flashchips.c (revision 645) +++ flashrom/flashchips.c (working copy) @@ -2795,6 +2795,22 @@ { .vendor = "Winbond", + .name = "W25x16", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25X16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", .name = "W29C011", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID, -- Hector Martin (hector(a)marcansoft.com) Public Key: http://www.marcansoft.com/marcan.asc

2 1

[commit] r648 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: hailfinger Date: 2009-07-11 21:39:11 +0200 (Sat, 11 Jul 2009) New Revision: 648 Modified: trunk/flashchips.c Log: Add Winbond W25X16. Tested probing and reading only. The chip ID was already in flashchips.h. Signed-off-by: Hector Martin <hector(a)marcansoft.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-07-11 19:28:36 UTC (rev 647) +++ trunk/flashchips.c 2009-07-11 19:39:11 UTC (rev 648) @@ -2795,6 +2795,22 @@ { .vendor = "Winbond", + .name = "W25x16", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25X16, + .total_size = 2048, + .page_size = 256, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", .name = "W29C011", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID,

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[PATCH] Convert SPI chip erase to multicommand
by Carl-Daniel Hailfinger 11 Jul '09

11 Jul '09

Convert SPI chip erase to use the multicommand infrastructure. This breaks ICH/VIA SPI. The good news is that once VIA/SPI are converted to multicommand, a lot of hacks can disappear. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-spi_multicommand_chiperase/spi.c =================================================================== --- flashrom-spi_multicommand_chiperase/spi.c (Revision 645) +++ flashrom-spi_multicommand_chiperase/spi.c (Arbeitskopie) @@ -417,21 +417,34 @@ int spi_chip_erase_60(struct flashchip *flash) { - const unsigned char cmd[JEDEC_CE_60_OUTSIZE] = {JEDEC_CE_60}; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_60_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_60 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; result = spi_disable_blockprotect(); if (result) { printf_debug("spi_disable_blockprotect failed\n"); return result; } - result = spi_write_enable(); - if (result) - return result; - /* Send CE (Chip Erase) */ - result = spi_send_command(sizeof(cmd), 0, cmd, NULL); + + result = spi_send_multicommand(spicommands); if (result) { - printf_debug("spi_chip_erase_60 failed sending erase\n"); + printf_debug("%s failed during command execution\n", __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -449,21 +462,34 @@ int spi_chip_erase_c7(struct flashchip *flash) { - const unsigned char cmd[JEDEC_CE_C7_OUTSIZE] = { JEDEC_CE_C7 }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_C7_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_C7 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; result = spi_disable_blockprotect(); if (result) { printf_debug("spi_disable_blockprotect failed\n"); return result; } - result = spi_write_enable(); - if (result) - return result; - /* Send CE (Chip Erase) */ - result = spi_send_command(sizeof(cmd), 0, cmd, NULL); + + result = spi_send_multicommand(spicommands); if (result) { - printf_debug("spi_chip_erase_60 failed sending erase\n"); + printf_debug("%s failed during command execution\n", __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. -- http://www.hailfinger.org/

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[commit] r647 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: hailfinger Date: 2009-07-11 21:28:36 +0200 (Sat, 11 Jul 2009) New Revision: 647 Modified: trunk/spi.c Log: Convert SPI chip erase to use the multicommand infrastructure. Once the ICH/VIA SPI driver is converted to multicommand, a lot of hacks can disappear. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Acked-by: Jakob Bornecrantz <wallbraker(a)gmail.com> Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-07-11 18:05:42 UTC (rev 646) +++ trunk/spi.c 2009-07-11 19:28:36 UTC (rev 647) @@ -61,12 +61,30 @@ int spi_send_multicommand(struct spi_command *spicommands) { - int res = 0; - while ((spicommands->writecnt || spicommands->readcnt) && !res) { - res = spi_send_command(spicommands->writecnt, spicommands->readcnt, + int ret = 0; + while ((spicommands->writecnt || spicommands->readcnt) && !ret) { + ret = spi_send_command(spicommands->writecnt, spicommands->readcnt, spicommands->writearr, spicommands->readarr); + /* This awful hack needs to be replaced with a multicommand + * capable ICH/VIA SPI driver. + */ + if ((ret == SPI_INVALID_OPCODE) && + ((spicommands->writearr[0] == JEDEC_WREN) || + (spicommands->writearr[0] == JEDEC_EWSR))) { + switch (spi_controller) { + case SPI_CONTROLLER_ICH7: + case SPI_CONTROLLER_ICH9: + case SPI_CONTROLLER_VIA: + printf_debug(" due to SPI master limitation, ignoring" + " and hoping it will be run as PREOP\n"); + ret = 0; + default: + break; + } + } + spicommands++; } - return res; + return ret; } static int spi_rdid(unsigned char *readarr, int bytes) @@ -417,21 +435,34 @@ int spi_chip_erase_60(struct flashchip *flash) { - const unsigned char cmd[JEDEC_CE_60_OUTSIZE] = {JEDEC_CE_60}; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_60_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_60 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; result = spi_disable_blockprotect(); if (result) { printf_debug("spi_disable_blockprotect failed\n"); return result; } - result = spi_write_enable(); - if (result) - return result; - /* Send CE (Chip Erase) */ - result = spi_send_command(sizeof(cmd), 0, cmd, NULL); + + result = spi_send_multicommand(spicommands); if (result) { - printf_debug("spi_chip_erase_60 failed sending erase\n"); + printf_debug("%s failed during command execution\n", __func__); return result; } /* Wait until the Write-In-Progress bit is cleared. @@ -449,21 +480,34 @@ int spi_chip_erase_c7(struct flashchip *flash) { - const unsigned char cmd[JEDEC_CE_C7_OUTSIZE] = { JEDEC_CE_C7 }; int result; + struct spi_command spicommands[] = { + { + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_CE_C7_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_CE_C7 }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; result = spi_disable_blockprotect(); if (result) { printf_debug("spi_disable_blockprotect failed\n"); return result; } - result = spi_write_enable(); - if (result) - return result; - /* Send CE (Chip Erase) */ - result = spi_send_command(sizeof(cmd), 0, cmd, NULL); + + result = spi_send_multicommand(spicommands); if (result) { - printf_debug("spi_chip_erase_60 failed sending erase\n"); + printf_debug("%s failed during command execution\n", __func__); return result; } /* Wait until the Write-In-Progress bit is cleared.

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test
by Carl-Daniel Hailfinger 11 Jul '09

11 Jul '09

test the list configuration

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[commit] r646 - trunk
by svn＠flashrom.org 11 Jul '09

11 Jul '09

Author: hailfinger Date: 2009-07-11 20:05:42 +0200 (Sat, 11 Jul 2009) New Revision: 646 Modified: trunk/flash.h trunk/flashrom.8 trunk/flashrom.c trunk/it87spi.c Log: Add an optional flash port parameter for IT87* SPI controllers in standalone programmer mode. If the parameter is set, the IT87* SPI driver will set the I/O base port of the IT87* SPI controller interface to the port specified in the parameter. Usage: flashrom -p it87spi=port=0x820 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-07-10 21:08:55 UTC (rev 645) +++ trunk/flash.h 2009-07-11 18:05:42 UTC (rev 646) @@ -479,6 +479,7 @@ int ich_spi_write_256(struct flashchip *flash, uint8_t * buf); /* it87spi.c */ +extern char *it87opts; extern uint16_t it8716f_flashport; void enter_conf_mode_ite(uint16_t port); void exit_conf_mode_ite(uint16_t port); Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-07-10 21:08:55 UTC (rev 645) +++ trunk/flashrom.8 2009-07-11 18:05:42 UTC (rev 646) @@ -184,6 +184,14 @@ .BR nic3com , .BR satasii . .sp +The it87spi has an optional parameter which will set the I/O base port of the +IT87* SPI controller interface to the port specified in the parameter. +For that you have to use the +.B "flashrom -p it87spi=port=portnum" +syntax where +.B portnum +is an I/O port number which must be a multiple of 8. +.sp The ft2232spi has an optional parameter specifying the controller type and interface/port it should support. For that you have to use the .B "flashrom -p ft2232spi=model,port=interface" Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-07-10 21:08:55 UTC (rev 645) +++ trunk/flashrom.c 2009-07-11 18:05:42 UTC (rev 646) @@ -647,6 +647,8 @@ pcidev_bdf = strdup(optarg + 8); } else if (strncmp(optarg, "it87spi", 7) == 0) { programmer = PROGRAMMER_IT87SPI; + if (optarg[7] == '=') + it87opts = strdup(optarg + 8); } else if (strncmp(optarg, "ft2232spi", 9) == 0) { programmer = PROGRAMMER_FT2232SPI; if (optarg[9] == '=') Modified: trunk/it87spi.c =================================================================== --- trunk/it87spi.c 2009-07-10 21:08:55 UTC (rev 645) +++ trunk/it87spi.c 2009-07-11 18:05:42 UTC (rev 646) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger + * Copyright (C) 2007, 2008, 2009 Carl-Daniel Hailfinger * Copyright (C) 2008 Ronald Hoogenboom <ronald(a)zonnet.nl> * Copyright (C) 2008 coresystems GmbH * @@ -24,12 +24,14 @@ */ #include <string.h> +#include <stdlib.h> #include "flash.h" #include "spi.h" #define ITE_SUPERIO_PORT1 0x2e #define ITE_SUPERIO_PORT2 0x4e +char *it87opts = NULL; uint16_t it8716f_flashport = 0; /* use fast 33MHz SPI (<>0) or slow 16MHz (0) */ int fast_spi = 1; @@ -56,6 +58,7 @@ static uint16_t find_ite_spi_flash_port(uint16_t port) { uint8_t tmp = 0; + char *portpos = NULL; uint16_t id, flashport = 0; enter_conf_mode_ite(port); @@ -77,6 +80,9 @@ 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis"); printf("LPC write to serial flash %sabled\n", (tmp & 1 << 4) ? "en" : "dis"); + /* The LPC->SPI force write enable below only makes sense for + * non-programmer mode. + */ /* If any serial flash segment is enabled, enable writing. */ if ((tmp & 0xe) && (!(tmp & 1 << 4))) { printf("Enabling LPC write to serial flash\n"); @@ -89,6 +95,17 @@ flashport = sio_read(port, 0x64) << 8; flashport |= sio_read(port, 0x65); printf("Serial flash port 0x%04x\n", flashport); + if (it87opts && !strlen(it87opts)) { + free(it87opts); + it87opts = NULL; + } + if (it87opts && (portpos = strstr(it87opts, "port="))) { + portpos += 5; + flashport = strtol(portpos, (char **)NULL, 0); + printf("Forcing serial flash port 0x%04x\n", flashport); + sio_write(port, 0x64, (flashport >> 8)); + sio_write(port, 0x65, (flashport & 0xff)); + } } exit_conf_mode_ite(port); return flashport; @@ -206,10 +223,11 @@ } /* Page size is usually 256 bytes */ -static int it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) +static int it8716f_spi_page_program(struct flashchip *flash, int block, uint8_t *buf) { int i; int result; + chipaddr bios = flash->virtual_memory; result = spi_write_enable(); if (result) @@ -217,7 +235,7 @@ OUTB(0x06, it8716f_flashport + 1); OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport); for (i = 0; i < 256; i++) { - bios[256 * block + i] = buf[256 * block + i]; + chip_writeb(buf[256 * block + i], bios + 256 * block + i); } OUTB(0, it8716f_flashport); /* Wait until the Write-In-Progress bit is cleared. @@ -288,8 +306,7 @@ it8716f_spi_chip_write_1(flash, buf); } else { for (i = 0; i < total_size / 256; i++) { - it8716f_spi_page_program(i, buf, - (uint8_t *)flash->virtual_memory); + it8716f_spi_page_program(flash, i, buf); } }

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