flashrom

flashrom@flashrom.org

1 participants
9182 discussions

Re: [flashrom] [PATCH] Configurable SPI speed and man page for Bus Pirate
by Sean Nelson 24 Nov '09

24 Nov '09

Send Ack to list. And send Tested-by while I'm at it. Acked-by: Sean Nelson <audiohacked(a)gmail.com> Tested-by: Sean Nelson <audiohacked(a)gmail.com> On Tue, Nov 24, 2009 at 8:41 AM, Sean Nelson <audiohacked(a)gmail.com> wrote: > Acked-by: Sean Nelson <audiohacked(a)gmail.com> > > On Tue, Nov 24, 2009 at 4:59 AM, Carl-Daniel Hailfinger > <c-d.hailfinger.devel.2006(a)gmx.net> wrote: >> Add the ability to set Bus Pirate SPI speed via the command line. >> Example usage: >> flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo >> flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M >> >> Refactor programmer option parsing (this allows cleanups in other >> programmers as well). >> >> Increase SPI read size from 8 to 12 bytes (current single-transaction >> limit of the Bus Pirate raw SPI protocol). >> >> Add Bus Pirate to the list of programmers supporting 4 byte RDID. >> >> Add Bus Pirate syntax to the man page. >> >> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> >> >> Index: flashrom-buspiratespi_spispeed_manpage/flashrom.8 >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Arbeitskopie) >> @@ -152,6 +152,8 @@ >> .sp >> .BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" >> .sp >> +.BR "* buspiratespi" " (for flash ROMs attached to a Bus Pirate)" >> +.sp >> The dummy programmer has an optional parameter specifying the bus types it >> should support. For that you have to use the >> .B "flashrom -p dummy:type" >> @@ -219,6 +221,16 @@ >> instead. More information about serprog is available in serprog-protocol.txt in >> the source distribution. >> .sp >> +The buspiratespi programmer has a required dev parameter specifying the Bus >> +Pirate device node and an optional spispeed parameter specifying the frequency >> +of the SPI bus. The parameter delimiter is a comma. Syntax is >> +.B "flashrom -p buspiratespi:dev=/dev/device,spispeed=frequency" >> +where >> +.B frequency >> +can be any of >> +.B 30k 125k 250k 1M 2M 2.6M 4M 8M >> +(in Hz). >> +.sp >> Support for some programmers can be disabled at compile time. >> .B "flashrom -h" >> lists all supported programmers. >> Index: flashrom-buspiratespi_spispeed_manpage/flash.h >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/flash.h (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/flash.h (Arbeitskopie) >> @@ -488,6 +488,10 @@ >> int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); >> >> /* buspirate_spi.c */ >> +struct buspirate_spispeeds { >> + const char *name; >> + const int speed; >> +}; >> int buspirate_spi_init(void); >> int buspirate_spi_shutdown(void); >> int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); >> @@ -503,6 +507,7 @@ >> int erase_flash(struct flashchip *flash); >> int min(int a, int b); >> int max(int a, int b); >> +char *extract_param(char **haystack, char *needle, char *delim); >> int check_erased_range(struct flashchip *flash, int start, int len); >> int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); >> char *strcat_realloc(char *dest, const char *src); >> Index: flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Arbeitskopie) >> @@ -131,34 +131,37 @@ >> return 0; >> } >> >> +static const struct buspirate_spispeeds spispeeds[] = { >> + {"30k", 0x0}, >> + {"125k", 0x1}, >> + {"250k", 0x2}, >> + {"1M", 0x3}, >> + {"2M", 0x4}, >> + {"2.6M", 0x5}, >> + {"4M", 0x6}, >> + {"8M", 0x7}, >> + {NULL, 0x0} >> +}; >> + >> int buspirate_spi_init(void) >> { >> unsigned char buf[512]; >> int ret = 0; >> int i; >> - char *devpos = NULL; >> char *dev = NULL; >> - int devlen; >> + char *speed = NULL; >> + int spispeed = 0x7; >> >> if (programmer_param && !strlen(programmer_param)) { >> free(programmer_param); >> programmer_param = NULL; >> } >> if (programmer_param) { >> - devpos = strstr(programmer_param, "dev="); >> - if (devpos) { >> - devpos += 4; >> - devlen = strcspn(devpos, ",:"); >> - if (devlen) { >> - dev = malloc(devlen + 1); >> - if (!dev) { >> - fprintf(stderr, "Out of memory!\n"); >> - exit(1); >> - } >> - strncpy(dev, devpos, devlen); >> - dev[devlen] = '\0'; >> - } >> - } >> + dev = extract_param(&programmer_param, "dev=", ",:"); >> + speed = extract_param(&programmer_param, "spispeed=", ",:"); >> + if (strlen(programmer_param)) >> + fprintf(stderr, "Unhandled programmer parameters: %s\n", >> + programmer_param); >> free(programmer_param); >> programmer_param = NULL; >> } >> @@ -167,6 +170,18 @@ >> "buspiratespi:dev=/dev/ttyUSB0\n"); >> return 1; >> } >> + if (speed) { >> + for (i = 0; spispeeds[i].name; i++) >> + if (!strncasecmp(spispeeds[i].name, speed, >> + strlen(spispeeds[i].name))) { >> + spispeed = spispeeds[i].speed; >> + break; >> + } >> + if (!spispeeds[i].name) >> + fprintf(stderr, "Invalid SPI speed, using default.\n"); >> + } >> + /* This works because speeds numbering starts at 0 and is contiguous. */ >> + printf_debug("SPI speed is %sHz\n", spispeeds[spispeed].name); >> >> ret = buspirate_serialport_setup(dev); >> if (ret) >> @@ -224,8 +239,8 @@ >> return 1; >> } >> >> - /* Set speed to 8 MHz */ >> - buf[0] = 0x60 | 0x7; >> + /* Set SPI speed */ >> + buf[0] = 0x60 | spispeed; >> ret = buspirate_sendrecv(buf, 1, 1); >> if (ret) >> return 1; >> @@ -351,8 +366,7 @@ >> >> int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) >> { >> - /* Maximum read length is 12 bytes, use 8 for now. */ >> - return spi_read_chunked(flash, buf, start, len, 8); >> + return spi_read_chunked(flash, buf, start, len, 12); >> } >> >> /* We could do 12-byte writes, but for now we use the generic 1-byte code. */ >> Index: flashrom-buspiratespi_spispeed_manpage/spi.c >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/spi.c (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/spi.c (Arbeitskopie) >> @@ -319,6 +319,9 @@ >> #if DUMMY_SUPPORT == 1 >> case SPI_CONTROLLER_DUMMY: >> #endif >> +#if BUSPIRATE_SPI_SUPPORT == 1 >> + case SPI_CONTROLLER_BUSPIRATE: >> +#endif >> return probe_spi_rdid_generic(flash, 4); >> default: >> printf_debug("4b ID not supported on this SPI controller\n"); >> Index: flashrom-buspiratespi_spispeed_manpage/flashrom.c >> =================================================================== >> --- flashrom-buspiratespi_spispeed_manpage/flashrom.c (Revision 775) >> +++ flashrom-buspiratespi_spispeed_manpage/flashrom.c (Arbeitskopie) >> @@ -336,6 +336,60 @@ >> return dest; >> } >> >> +/* This is a somewhat hacked function similar in some ways to strtok(). >> + * It will look for needle in haystack, return a copy of needle and remove >> + * everything from the first occurrence of needle to the next delimiter >> + * from haystack. >> + */ >> +char *extract_param(char **haystack, char *needle, char *delim) >> +{ >> + char *param_pos, *rest, *tmp; >> + char *dev = NULL; >> + int devlen; >> + >> + param_pos = strstr(*haystack, needle); >> + do { >> + if (!param_pos) >> + return NULL; >> + /* Beginning of the string? */ >> + if (param_pos == *haystack) >> + break; >> + /* After a delimiter? */ >> + if (strchr(delim, *(param_pos - 1))) >> + break; >> + /* Continue searching. */ >> + param_pos++; >> + param_pos = strstr(param_pos, needle); >> + } while (1); >> + >> + if (param_pos) { >> + param_pos += strlen(needle); >> + devlen = strcspn(param_pos, delim); >> + if (devlen) { >> + dev = malloc(devlen + 1); >> + if (!dev) { >> + fprintf(stderr, "Out of memory!\n"); >> + exit(1); >> + } >> + strncpy(dev, param_pos, devlen); >> + dev[devlen] = '\0'; >> + } >> + rest = param_pos + devlen; >> + rest += strspn(rest, delim); >> + param_pos -= strlen(needle); >> + memmove(param_pos, rest, strlen(rest) + 1); >> + tmp = realloc(*haystack, strlen(*haystack) + 1); >> + if (!tmp) { >> + fprintf(stderr, "Out of memory!\n"); >> + exit(1); >> + } >> + *haystack = tmp; >> + } >> + >> + >> + return dev; >> +} >> + >> /* start is an offset to the base address of the flash chip */ >> int check_erased_range(struct flashchip *flash, int start, int len) >> { >> >> >> -- >> Developer quote of the month: >> "We are juggling too many chainsaws and flaming arrows and tigers." >> >> >> _______________________________________________ >> flashrom mailing list >> flashrom(a)flashrom.org >> http://www.flashrom.org/mailman/listinfo/flashrom >> >

2 1

[commit] r776 - trunk
by svn＠flashrom.org 24 Nov '09

24 Nov '09

Author: hailfinger Date: 2009-11-24 19:27:10 +0100 (Tue, 24 Nov 2009) New Revision: 776 Modified: trunk/buspirate_spi.c trunk/flash.h trunk/flashrom.8 trunk/flashrom.c trunk/spi.c Log: Add the ability to set Bus Pirate SPI speed via the command line. Example usage: flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M Refactor programmer option parsing (this allows cleanups in other programmers as well). Increase SPI read size from 8 to 12 bytes (current single-transaction limit of the Bus Pirate raw SPI protocol). Add Bus Pirate to the list of programmers supporting 4 byte RDID. Add Bus Pirate syntax to the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Tested-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/buspirate_spi.c =================================================================== --- trunk/buspirate_spi.c 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/buspirate_spi.c 2009-11-24 18:27:10 UTC (rev 776) @@ -131,34 +131,37 @@ return 0; } +static const struct buspirate_spispeeds spispeeds[] = { + {"30k", 0x0}, + {"125k", 0x1}, + {"250k", 0x2}, + {"1M", 0x3}, + {"2M", 0x4}, + {"2.6M", 0x5}, + {"4M", 0x6}, + {"8M", 0x7}, + {NULL, 0x0} +}; + int buspirate_spi_init(void) { unsigned char buf[512]; int ret = 0; int i; - char *devpos = NULL; char *dev = NULL; - int devlen; + char *speed = NULL; + int spispeed = 0x7; if (programmer_param && !strlen(programmer_param)) { free(programmer_param); programmer_param = NULL; } if (programmer_param) { - devpos = strstr(programmer_param, "dev="); - if (devpos) { - devpos += 4; - devlen = strcspn(devpos, ",:"); - if (devlen) { - dev = malloc(devlen + 1); - if (!dev) { - fprintf(stderr, "Out of memory!\n"); - exit(1); - } - strncpy(dev, devpos, devlen); - dev[devlen] = '\0'; - } - } + dev = extract_param(&programmer_param, "dev=", ",:"); + speed = extract_param(&programmer_param, "spispeed=", ",:"); + if (strlen(programmer_param)) + fprintf(stderr, "Unhandled programmer parameters: %s\n", + programmer_param); free(programmer_param); programmer_param = NULL; } @@ -167,6 +170,18 @@ "buspiratespi:dev=/dev/ttyUSB0\n"); return 1; } + if (speed) { + for (i = 0; spispeeds[i].name; i++) + if (!strncasecmp(spispeeds[i].name, speed, + strlen(spispeeds[i].name))) { + spispeed = spispeeds[i].speed; + break; + } + if (!spispeeds[i].name) + fprintf(stderr, "Invalid SPI speed, using default.\n"); + } + /* This works because speeds numbering starts at 0 and is contiguous. */ + printf_debug("SPI speed is %sHz\n", spispeeds[spispeed].name); ret = buspirate_serialport_setup(dev); if (ret) @@ -224,8 +239,8 @@ return 1; } - /* Set speed to 8 MHz */ - buf[0] = 0x60 | 0x7; + /* Set SPI speed */ + buf[0] = 0x60 | spispeed; ret = buspirate_sendrecv(buf, 1, 1); if (ret) return 1; @@ -351,8 +366,7 @@ int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is 12 bytes, use 8 for now. */ - return spi_read_chunked(flash, buf, start, len, 8); + return spi_read_chunked(flash, buf, start, len, 12); } /* We could do 12-byte writes, but for now we use the generic 1-byte code. */ Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/flash.h 2009-11-24 18:27:10 UTC (rev 776) @@ -488,6 +488,10 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); /* buspirate_spi.c */ +struct buspirate_spispeeds { + const char *name; + const int speed; +}; int buspirate_spi_init(void); int buspirate_spi_shutdown(void); int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -503,6 +507,7 @@ int erase_flash(struct flashchip *flash); int min(int a, int b); int max(int a, int b); +char *extract_param(char **haystack, char *needle, char *delim); int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); char *strcat_realloc(char *dest, const char *src); Modified: trunk/flashrom.8 =================================================================== --- trunk/flashrom.8 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/flashrom.8 2009-11-24 18:27:10 UTC (rev 776) @@ -152,6 +152,8 @@ .sp .BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" .sp +.BR "* buspiratespi" " (for flash ROMs attached to a Bus Pirate)" +.sp The dummy programmer has an optional parameter specifying the bus types it should support. For that you have to use the .B "flashrom -p dummy:type" @@ -219,6 +221,16 @@ instead. More information about serprog is available in serprog-protocol.txt in the source distribution. .sp +The buspiratespi programmer has a required dev parameter specifying the Bus +Pirate device node and an optional spispeed parameter specifying the frequency +of the SPI bus. The parameter delimiter is a comma. Syntax is +.B "flashrom -p buspiratespi:dev=/dev/device,spispeed=frequency" +where +.B frequency +can be any of +.B 30k 125k 250k 1M 2M 2.6M 4M 8M +(in Hz). +.sp Support for some programmers can be disabled at compile time. .B "flashrom -h" lists all supported programmers. Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/flashrom.c 2009-11-24 18:27:10 UTC (rev 776) @@ -336,6 +336,60 @@ return dest; } +/* This is a somewhat hacked function similar in some ways to strtok(). + * It will look for needle in haystack, return a copy of needle and remove + * everything from the first occurrence of needle to the next delimiter + * from haystack. + */ +char *extract_param(char **haystack, char *needle, char *delim) +{ + char *param_pos, *rest, *tmp; + char *dev = NULL; + int devlen; + + param_pos = strstr(*haystack, needle); + do { + if (!param_pos) + return NULL; + /* Beginning of the string? */ + if (param_pos == *haystack) + break; + /* After a delimiter? */ + if (strchr(delim, *(param_pos - 1))) + break; + /* Continue searching. */ + param_pos++; + param_pos = strstr(param_pos, needle); + } while (1); + + if (param_pos) { + param_pos += strlen(needle); + devlen = strcspn(param_pos, delim); + if (devlen) { + dev = malloc(devlen + 1); + if (!dev) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + strncpy(dev, param_pos, devlen); + dev[devlen] = '\0'; + } + rest = param_pos + devlen; + rest += strspn(rest, delim); + param_pos -= strlen(needle); + memmove(param_pos, rest, strlen(rest) + 1); + tmp = realloc(*haystack, strlen(*haystack) + 1); + if (!tmp) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + *haystack = tmp; + } + + + return dev; +} + /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashchip *flash, int start, int len) { Modified: trunk/spi.c =================================================================== --- trunk/spi.c 2009-11-24 02:11:08 UTC (rev 775) +++ trunk/spi.c 2009-11-24 18:27:10 UTC (rev 776) @@ -319,6 +319,9 @@ #if DUMMY_SUPPORT == 1 case SPI_CONTROLLER_DUMMY: #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + case SPI_CONTROLLER_BUSPIRATE: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n");

1 0

Re: [flashrom] flash erase failure
by Thao Hoang 24 Nov '09

24 Nov '09

Here is the output for the MSI CR600 laptop. Both the chipset and the chip is not recognize by flashrom. I provide all the output you ask and also included the output of dmidecode. --- On Mon, 11/23/09, Adrian Glaubitz <adrian.glaubitz(a)googlemail.com> wrote: From: Adrian Glaubitz <adrian.glaubitz(a)googlemail.com> Subject: Re: [flashrom] flash erase failure To: "Thao Hoang" <thao_hoang(a)yahoo.com>, flashrom(a)flashrom.org Date: Monday, November 23, 2009, 5:57 PM Hi, On Mon, Nov 23, 2009 at 10:52 PM, Thao Hoang <thao_hoang(a)yahoo.com> wrote: > > Thanks Adrian! I appreciate the advice and insight. You're welcome, again. > I was not able to run superiotool because it wasn't install on my system, however I did run the other two. > See attachment. If you really need me to run superiotool, I can download it and run it. > Yes, please install it. It would be nice to have a full output of: lspci -nnvvvxx superiotool -dV flashrom -V By the way, I don't see your attachments, did you forget them (thats what I usually do :)). Please post the put of all three tools like I suggested to the mailing list (flashrom(a)flashrom.org), that will help us with your board. > Don't laugh... but I haven't used IRC chat before. Never had a reason to until now I guess. Is there a way to post the chats somewhere so that anyone with a similar problem can go there without taking up your time? hum... > Well, really, IRC is nothing magical or mystical. Just use any IRC-capable software to connect (like irssi, pidgin, xchat or mIRC). Set the server to irc.freenode.org and the channel to #flashrom. Then just start asking questions and many people will be happy to help you and answer all your questions. > Also, did I get the syntax correct to force a write <./flashrom -f -w (filename) -c (chipname)>. Yes, think so. Check the manpage. > I have a laptop also that doesn't seem to work off the bat. I was able to force the read and > find some chips that successfullly read the bios. (i.e.... forced read and compared the result > using the original binary which I extracted using a dos bios utility.) Mhh, okey. Don't hesitate to post all your results to the mailing list. Please post every laptop and mainboard and whatever your try to flash in a single mail to the mailing list. And seriously, join the IRC-channel. You'll learn alot of stuff there. Adrian

1 0

flashrom reviewers needed
by Carl-Daniel Hailfinger 24 Nov '09

24 Nov '09

Hi, I'm sorry for cross-posting this to coreboot@ and flashrom@, but flashrom is suffering badly from reviewer shortage. If you have some spare time and feel like reviewing stuff, please take a look at a few patches which have accumulated over the last few months. Below is the list, together with a link to patchwork. In case someone wants a convenient way to reply, just tell me to do so and I'll add a "ping" reply to the respecitive patch threads on the flashrom mailing list. http://patchwork.coreboot.org/project/flashrom/list/?state=1 Configurable SPI speed and man page for Bus Pirate Check if an erase is needed to write Factor out lock functions (print, unlock, lock) Fix eraseblock walking Kill hardcoded block erase on ICH SPI Make internal/onboard programmer support optional Show ICH flash descriptor info only if valid Refactor ITE SuperI/O detection/access [2/2] Error out when chipset/board doesn't decode full ROM The list above is not complete, but it has those patches which improve infrastructure or fix bugs. Thanks! Regards, Carl-Daniel -- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."

1 0

[RFC] Setting the correct Patchwork status
by Carl-Daniel Hailfinger 24 Nov '09

24 Nov '09

Hi, I'd like to get some input on using the correct "patch state" in Patchwork. 1. Patches which have been acked and are waiting for commit. 2. Patches which are not intended for merging, but which should stay easily available in case someone needs them. This includes debug patches and emergency recovery patches. For type 1, I think either "Awaiting upstream" or "Under review" are OK. We could add an additional state "Waiting for commit". For type 2, it is a lot more difficult. "Not applicable" is for patches sent to the wrong list. "Rejected" and "RFC" don't fit either. What about an additional state "Not for merging"? Regards, Carl-Daniel -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers."

2 1

[PATCH] Configurable SPI speed and man page for Bus Pirate
by Carl-Daniel Hailfinger 24 Nov '09

24 Nov '09

Add the ability to set Bus Pirate SPI speed via the command line. Example usage: flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M Refactor programmer option parsing (this allows cleanups in other programmers as well). Increase SPI read size from 8 to 12 bytes (current single-transaction limit of the Bus Pirate raw SPI protocol). Add Bus Pirate to the list of programmers supporting 4 byte RDID. Add Bus Pirate syntax to the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-buspiratespi_spispeed_manpage/flashrom.8 =================================================================== --- flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/flashrom.8 (Arbeitskopie) @@ -152,6 +152,8 @@ .sp .BR "* serprog" " (for flash ROMs attached to Urja's AVR programmer)" .sp +.BR "* buspiratespi" " (for flash ROMs attached to a Bus Pirate)" +.sp The dummy programmer has an optional parameter specifying the bus types it should support. For that you have to use the .B "flashrom -p dummy:type" @@ -219,6 +221,16 @@ instead. More information about serprog is available in serprog-protocol.txt in the source distribution. .sp +The buspiratespi programmer has a required dev parameter specifying the Bus +Pirate device node and an optional spispeed parameter specifying the frequency +of the SPI bus. The parameter delimiter is a comma. Syntax is +.B "flashrom -p buspiratespi:dev=/dev/device,spispeed=frequency" +where +.B frequency +can be any of +.B 30k 125k 250k 1M 2M 2.6M 4M 8M +(in Hz). +.sp Support for some programmers can be disabled at compile time. .B "flashrom -h" lists all supported programmers. Index: flashrom-buspiratespi_spispeed_manpage/flash.h =================================================================== --- flashrom-buspiratespi_spispeed_manpage/flash.h (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/flash.h (Arbeitskopie) @@ -488,6 +488,10 @@ int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf); /* buspirate_spi.c */ +struct buspirate_spispeeds { + const char *name; + const int speed; +}; int buspirate_spi_init(void); int buspirate_spi_shutdown(void); int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); @@ -503,6 +507,7 @@ int erase_flash(struct flashchip *flash); int min(int a, int b); int max(int a, int b); +char *extract_param(char **haystack, char *needle, char *delim); int check_erased_range(struct flashchip *flash, int start, int len); int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message); char *strcat_realloc(char *dest, const char *src); Index: flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c =================================================================== --- flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/buspirate_spi.c (Arbeitskopie) @@ -131,34 +131,37 @@ return 0; } +static const struct buspirate_spispeeds spispeeds[] = { + {"30k", 0x0}, + {"125k", 0x1}, + {"250k", 0x2}, + {"1M", 0x3}, + {"2M", 0x4}, + {"2.6M", 0x5}, + {"4M", 0x6}, + {"8M", 0x7}, + {NULL, 0x0} +}; + int buspirate_spi_init(void) { unsigned char buf[512]; int ret = 0; int i; - char *devpos = NULL; char *dev = NULL; - int devlen; + char *speed = NULL; + int spispeed = 0x7; if (programmer_param && !strlen(programmer_param)) { free(programmer_param); programmer_param = NULL; } if (programmer_param) { - devpos = strstr(programmer_param, "dev="); - if (devpos) { - devpos += 4; - devlen = strcspn(devpos, ",:"); - if (devlen) { - dev = malloc(devlen + 1); - if (!dev) { - fprintf(stderr, "Out of memory!\n"); - exit(1); - } - strncpy(dev, devpos, devlen); - dev[devlen] = '\0'; - } - } + dev = extract_param(&programmer_param, "dev=", ",:"); + speed = extract_param(&programmer_param, "spispeed=", ",:"); + if (strlen(programmer_param)) + fprintf(stderr, "Unhandled programmer parameters: %s\n", + programmer_param); free(programmer_param); programmer_param = NULL; } @@ -167,6 +170,18 @@ "buspiratespi:dev=/dev/ttyUSB0\n"); return 1; } + if (speed) { + for (i = 0; spispeeds[i].name; i++) + if (!strncasecmp(spispeeds[i].name, speed, + strlen(spispeeds[i].name))) { + spispeed = spispeeds[i].speed; + break; + } + if (!spispeeds[i].name) + fprintf(stderr, "Invalid SPI speed, using default.\n"); + } + /* This works because speeds numbering starts at 0 and is contiguous. */ + printf_debug("SPI speed is %sHz\n", spispeeds[spispeed].name); ret = buspirate_serialport_setup(dev); if (ret) @@ -224,8 +239,8 @@ return 1; } - /* Set speed to 8 MHz */ - buf[0] = 0x60 | 0x7; + /* Set SPI speed */ + buf[0] = 0x60 | spispeed; ret = buspirate_sendrecv(buf, 1, 1); if (ret) return 1; @@ -351,8 +366,7 @@ int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len) { - /* Maximum read length is 12 bytes, use 8 for now. */ - return spi_read_chunked(flash, buf, start, len, 8); + return spi_read_chunked(flash, buf, start, len, 12); } /* We could do 12-byte writes, but for now we use the generic 1-byte code. */ Index: flashrom-buspiratespi_spispeed_manpage/spi.c =================================================================== --- flashrom-buspiratespi_spispeed_manpage/spi.c (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/spi.c (Arbeitskopie) @@ -319,6 +319,9 @@ #if DUMMY_SUPPORT == 1 case SPI_CONTROLLER_DUMMY: #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + case SPI_CONTROLLER_BUSPIRATE: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); Index: flashrom-buspiratespi_spispeed_manpage/flashrom.c =================================================================== --- flashrom-buspiratespi_spispeed_manpage/flashrom.c (Revision 775) +++ flashrom-buspiratespi_spispeed_manpage/flashrom.c (Arbeitskopie) @@ -336,6 +336,60 @@ return dest; } +/* This is a somewhat hacked function similar in some ways to strtok(). + * It will look for needle in haystack, return a copy of needle and remove + * everything from the first occurrence of needle to the next delimiter + * from haystack. + */ +char *extract_param(char **haystack, char *needle, char *delim) +{ + char *param_pos, *rest, *tmp; + char *dev = NULL; + int devlen; + + param_pos = strstr(*haystack, needle); + do { + if (!param_pos) + return NULL; + /* Beginning of the string? */ + if (param_pos == *haystack) + break; + /* After a delimiter? */ + if (strchr(delim, *(param_pos - 1))) + break; + /* Continue searching. */ + param_pos++; + param_pos = strstr(param_pos, needle); + } while (1); + + if (param_pos) { + param_pos += strlen(needle); + devlen = strcspn(param_pos, delim); + if (devlen) { + dev = malloc(devlen + 1); + if (!dev) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + strncpy(dev, param_pos, devlen); + dev[devlen] = '\0'; + } + rest = param_pos + devlen; + rest += strspn(rest, delim); + param_pos -= strlen(needle); + memmove(param_pos, rest, strlen(rest) + 1); + tmp = realloc(*haystack, strlen(*haystack) + 1); + if (!tmp) { + fprintf(stderr, "Out of memory!\n"); + exit(1); + } + *haystack = tmp; + } + + + return dev; +} + /* start is an offset to the base address of the flash chip */ int check_erased_range(struct flashchip *flash, int start, int len) { -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers."

1 0

Re: [flashrom] Error compiling flashrom 0.9.1 from source code.
by Luis Ortega 24 Nov '09

24 Nov '09

Hi, my name is Luis Ortega. I want to inform you that I receive an error upon compiling flashrom 0.9.1 from the source code at the following location. The operating system used is Ubuntu 9.10... http://qa.coreboot.org/releases/flashrom-0.9.1.tar.bz2 The following is displayed upon compiling flashrom... sudo make Checking for a C compiler... found. Checking for pciutils and zlib... found. Checking for FTDI support... not found. cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o chipset_enable.o -c chipset_enable.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o board_enable.o -c board_enable.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o udelay.o -c udelay.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o jedec.o -c jedec.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o stm50flw0x0x.o -c stm50flw0x0x.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst28sf040.o -c sst28sf040.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o am29f040b.o -c am29f040b.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o mx29f002.o -c mx29f002.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o m29f400bt.o -c m29f400bt.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o pm29f002.o -c pm29f002.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o w49f002u.o -c w49f002u.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o 82802ab.o -c 82802ab.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o pm49fl00x.o -c pm49fl00x.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst49lf040.o -c sst49lf040.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o en29f002a.o -c en29f002a.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst49lfxxxc.o -c sst49lfxxxc.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o sst_fwhub.o -c sst_fwhub.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o layout.o -c layout.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o cbtable.o -c cbtable.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o flashchips.o -c flashchips.c cc -Os -Wall -Werror -D'SERPROG_SUPPORT=1' -D'FLASHROM_VERSION="0.9.1-r710"' -o physmap.o -c physmap.c cc1: warnings being treated as errors physmap.c: In function ‘rdmsr’: physmap.c:146: error: dereferencing type-punned pointer will break strict-aliasing rules make: *** [physmap.o] Error 1 I was told via IRCto report it here. Best regards, Luis Ortega

1 0

flashrom test
by MAKAPOH 23 Nov '09

23 Nov '09

Hello! flashrom -r MyBIOS.bin flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Reading flash... done. flashrom -rV MyBIOS.bin flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 846M loops per second, 100 myus = 200 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F002(N)BB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F002(N)BT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N), 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EMST F49B002UA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EON EN29F002(A)(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004BC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004TC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 28F001BX-T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm29F0002B, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm39LV010, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29EE020A, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Lock status for 0x000000 (size 0x010000) is 01, write locked Lock status for 0x010000 (size 0x010000) is 01, write locked Lock status for 0x020000 (size 0x010000) is 01, write locked Lock status for 0x030000 (size 0x010000) is 01, write locked Lock status for 0x040000 (size 0x010000) is 01, write locked Lock status for 0x050000 (size 0x010000) is 01, write locked Found chip "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000. Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F002T/NT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29W040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x29, id2 0xee Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x1b Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49F002U, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Reading flash... done. flashrom -Vw MyBIOS.bin flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH6/ICH6R", enabling flash write... 0xfff80000/0xffb80000 FWH IDSEL: 0x0 0xfff00000/0xffb00000 FWH IDSEL: 0x0 0xffe80000/0xffa80000 FWH IDSEL: 0x1 0xffe00000/0xffa00000 FWH IDSEL: 0x1 0xffd80000/0xff980000 FWH IDSEL: 0x2 0xffd00000/0xff900000 FWH IDSEL: 0x2 0xffc80000/0xff880000 FWH IDSEL: 0x3 0xffc00000/0xff800000 FWH IDSEL: 0x3 0xff700000/0xff300000 FWH IDSEL: 0x4 0xff600000/0xff200000 FWH IDSEL: 0x5 0xff500000/0xff100000 FWH IDSEL: 0x6 0xff400000/0xff000000 FWH IDSEL: 0x7 0xfff80000/0xffb80000 FWH decode enabled 0xfff00000/0xffb00000 FWH decode enabled 0xffe80000/0xffa80000 FWH decode disabled 0xffe00000/0xffa00000 FWH decode disabled 0xffd80000/0xff980000 FWH decode disabled 0xffd00000/0xff900000 FWH decode disabled 0xffc80000/0xff880000 FWH decode disabled 0xffc00000/0xff800000 FWH decode disabled 0xff700000/0xff300000 FWH decode disabled 0xff600000/0xff200000 FWH decode disabled 0xff500000/0xff100000 FWH decode disabled 0xff400000/0xff000000 FWH decode disabled BIOS Lock Enable: disabled, BIOS Write Enable: enabled, BIOS_CNTL is 0x1 OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... 831M loops per second, 100 myus = 208 us. OK. Probing for AMD Am29F010A/B, 128 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F002(N)BB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F002(N)BT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29F080B, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMD Am29LV081B, 1024 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ASD AE49F2008, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF041A, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF081, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF321A, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25DF641, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25F512B, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT25FS040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF041, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF081A, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26DF161A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT26F004, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT29C512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT45CS1282, 16896 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB011D, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB021D, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB041D, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB081D, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB161D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321C, 4224 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB321D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT45DB642D, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Atmel AT49BV512, 64 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N), 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Atmel AT49F002(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for AMIC A25L40P, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for AMIC A29002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for AMIC A29040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for AMIC A49LF040A, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EMST F49B002UA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Eon EN25B05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25B64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25D16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F05, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Eon EN25F32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON EN29F002(A)(N)B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for EON EN29F002(A)(N)T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004BC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F004TC, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Fujitsu MBM29F400BC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for Intel 28F001BX-B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 28F001BX-T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for Macronix MX25L512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1005, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L2005, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L4005, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L8005, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1605, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L1635D, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3205, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L3235D, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L6405, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX25L12805, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix MX29F001B, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F001T, 128 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002B, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29F002T, 256 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Macronix MX29LV040, 512 KB: probe_29f002: id1 0xbf, id2 0x1b Probing for Numonyx M25PE10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE40, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Numonyx M25PE16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV010, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV020, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV040, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm25LV512, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC Pm29F0002T, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm29F0002B, 256 KB: probe_29f040b: id1 0x29, id2 0xee Probing for PMC Pm39LV010, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL002, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for PMC Pm49FL004, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0xff, id2 0xff Probing for Spansion S25FL016A, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF016B, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF032B, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF040B.REMS, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST25VF080B, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0xff, id2 0xff Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29EE020A, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST39VF080, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF002A/B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF003A/B, 384 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Lock status for 0x000000 (size 0x010000) is 00, full access Lock status for 0x010000 (size 0x010000) is 01, write locked Lock status for 0x020000 (size 0x010000) is 01, write locked Lock status for 0x030000 (size 0x010000) is 01, write locked Lock status for 0x040000 (size 0x010000) is 01, write locked Lock status for 0x050000 (size 0x010000) is 01, write locked Found chip "SST SST49LF003A/B" (384 KB, FWH) at physical address 0xfffa0000. Probing for SST SST49LF004A/B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF008A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for SST SST49LF020, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF080A, 1024 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0xff, id2 0xff Probing for ST M25P05-A, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P05.RES, 64 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10-A, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P10.RES, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P40-old, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P32, 4096 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P64, 8192 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M25P128, 16384 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST M29F002B, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F002T/NT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0xff, id2 0xff Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0xff, id2 0xff Probing for ST M29W010B, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M29W040B, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0x1b Probing for ST M50FW002, 256 KB: probe_49lfxxxc: id1 0x29, id2 0xee Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0xff, id2 0xff Probing for ST M50LPW116, 2048 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SyncMOS S29C31004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51001T, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51002T, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for SyncMOS S29C51004T, 512 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RB, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for TI TMS29F002RT, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W25x10, 128 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x20, 256 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x40, 512 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x80, 1024 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W25x16, 2048 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Winbond W29C011, 128 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W29EE011, 128 KB: Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V040C, 512 KB: probe_w39v040c: id1 0xbf, id2 0x1b Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49F002U, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W49V002FA, 256 KB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: id1 0xbf, id2 0x1b Probing for Atmel unknown Atmel SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for EON unknown EON SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for Macronix unknown Macronix SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for PMC unknown PMC SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for SST unknown SST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. Probing for ST unknown ST SPI chip, 0 KB: skipped. Host bus type Non-SPI and chip bus type SPI are incompatible. === This flash part has status UNTESTED for operations: READ ERASE WRITE Please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -rV, -wV, -EV), and mention which mainboard you tested. Thanks for your help! === Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Lock status for 0x000000 (size 0x010000) is 00, full access ERASE FAILED at 0x00000000! Expected=0xff, Read=0x23, failed byte count from 0x00000000-0x0000ffff: 0xff1b ERASE FAILED! ERASE FAILED! ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. Get help on IRC at irc.freenode.net channel #flashrom or mail flashrom(a)flashrom.org ------------------------------------------------------------ DO NOT REBOOT OR POWEROFF! С уважением, Андрей. mail: makapoh(a)bk.ru ICQ: 333335352

1 0

[PATCHES] Sanyo Generic Detection & Sanyo LF25FW203A chip support
by Sean Nelson 23 Nov '09

23 Nov '09

Add Generic SPI detect for Sanyo chips. Add LF25FW203A support. The generic patch has to be applied before the lf25fw203 patch. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

2 1

[commit] r775 - trunk
by svn＠flashrom.org 23 Nov '09

23 Nov '09

Author: hailfinger Date: 2009-11-24 03:11:08 +0100 (Tue, 24 Nov 2009) New Revision: 775 Modified: trunk/flashchips.c Log: Add Sanyo LF25FW203A support. This chip is sometimes labeled as 25FW203T. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-11-24 02:08:11 UTC (rev 774) +++ trunk/flashchips.c 2009-11-24 02:11:08 UTC (rev 775) @@ -1847,6 +1847,22 @@ }, { + .vendor = "Sanyo", + .name = "LF25FW203A", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = SANYO_ID, + .model_id = SANYO_LE25FW203A, + .total_size = 2048, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { .vendor = "Sharp", .name = "LHF00L04", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

flashrom