flashrom

flashrom@flashrom.org

5 participants
9154 discussions

consts and copies (was: Re: [SerialICE] an idea)
by Stefan Reinauer 27 Nov '09

27 Nov '09

On 11/27/09 12:24 AM, Carl-Daniel Hailfinger wrote: > Well, with some careful changes, I think flashrom can get by with maybe > 2 kB of RAM or CAR. I know what to change, but I can't make 100% correct > RAM requirement estimates. And we'll need boatloads of const keywords. > Patches welcome, especially for the const stuff. The biggest writable > object is the flashchip array. We can make it const, but then we have to > copy each chip to a temporary variable during probe. Not really ideal. Hm. > Why the copy? Can't we instead have a writable struct flashchip_instance and let that contain a pointer to the current readonly struct flashchip member? Stefan

2 3

[PATCH] Add support for Intel 3400 series chipset
by Carl-Daniel Hailfinger 26 Nov '09

26 Nov '09

Add support for Intel 3400 series / 5 series chipset. Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400 Series Chipset Specification Update). According to http://pciids.sourceforge.net/ we probably should match all IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the same. If anybody has contacts at Intel and can check, I'd be happy to add the rest of the IDs. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-intel_3400series_5series/chipset_enable.c =================================================================== --- flashrom-intel_3400series_5series/chipset_enable.c (Revision 782) +++ flashrom-intel_3400series_5series/chipset_enable.c (Arbeitskopie) @@ -1097,6 +1097,9 @@ {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers."

2 2

[commit] r784 - trunk
by svn＠flashrom.org 26 Nov '09

26 Nov '09

Author: hailfinger Date: 2009-11-26 17:51:39 +0100 (Thu, 26 Nov 2009) New Revision: 784 Modified: trunk/chipset_enable.c Log: Add support for Intel 3400 series / 5 series chipset. Found in Intel document 322170 (Intel 5 Series Chipset and Intel 3400 Series Chipset Specification Update). According to http://pciids.sourceforge.net/ we probably should match all IDs from 0x3b00-0x3b1f, but so far I didn't find an Intel doc saying the same. If anybody has contacts at Intel and can check, I'd be happy to add the rest of the IDs. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-11-26 14:50:52 UTC (rev 783) +++ trunk/chipset_enable.c 2009-11-26 16:51:39 UTC (rev 784) @@ -1097,6 +1097,9 @@ {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, + {0x8086, 0x3b00, NT, "Intel", "3400 Desktop", enable_flash_ich10}, + {0x8086, 0x3b01, NT, "Intel", "3400 Mobile", enable_flash_ich10}, + {0x8086, 0x3b0d, NT, "Intel", "3400 Mobile SFF", enable_flash_ich10}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc},

1 0

[PATCH] remove JEDEC protect/unprotect
by Michael Karcher 26 Nov '09

26 Nov '09

This patch removes the extremely dangerous unprotect_jedec function which is not used at all within flashrom code, and renames the misleadingly named protect_jedec function to start_program_jedec. Calls to protect_jedec after flashing are removed, because a) on LPC chips, the command sent by protoct_jedec is not even in the datasheet and b) on parallel chips, the block write command issued before already contained the software protection sequence, so software protection is definitely enabled. This patch also removes two clones of protect_jedec Background: JEDEC Software Data Protection started as an optional feature, which was disabled on the first single-voltage-flash chips. The software data protection is the need to prefix a write with a magic "write enable" command, while without write protection every write access into the chip's address space modifies flash content. This magic write enable command also tells the flash chip that the programmer obviously support sending write-enable commands and turns off the "any write modifies flash content" mode. There also exist a two-command (6 writes) sequence that disables Software Data Protection completey, which should only ever be used to prepare updating with a device that can't handle software data protection. Regards, Michael Karcher Index: flash.h =================================================================== --- flash.h (Revision 777) +++ flash.h (Arbeitskopie) @@ -647,8 +647,7 @@ uint8_t oddparity(uint8_t val); void toggle_ready_jedec(chipaddr dst); void data_polling_jedec(chipaddr dst, uint8_t data); -void unprotect_jedec(chipaddr bios); -void protect_jedec(chipaddr bios); +void start_program_jedec(chipaddr bios); int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst); int probe_jedec(struct flashchip *flash); Index: jedec.c =================================================================== --- jedec.c (Revision 777) +++ jedec.c (Arbeitskopie) @@ -64,25 +64,11 @@ } } -void unprotect_jedec(chipaddr bios) +void start_program_jedec(chipaddr bios) { chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x80, bios + 0x5555); - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x20, bios + 0x5555); - - programmer_delay(200); -} - -void protect_jedec(chipaddr bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - - programmer_delay(200); } int probe_jedec(struct flashchip *flash) @@ -270,9 +256,7 @@ retry: /* Issue JEDEC Data Unprotect comand */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); + start_program_jedec(bios); /* transfer data from source to destination */ for (i = 0; i < page_size; i++) { @@ -312,9 +296,7 @@ retry: /* Issue JEDEC Byte Program command */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); + start_program_jedec(bios); /* transfer data from source to destination */ chip_writeb(*src, dst); @@ -348,7 +330,6 @@ int i; int total_size = flash->total_size * 1024; int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; if (erase_chip_jedec(flash)) { fprintf(stderr,"ERASE FAILED!\n"); @@ -363,7 +344,6 @@ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); - protect_jedec(bios); return 0; } Index: sharplhf00l04.c =================================================================== --- sharplhf00l04.c (Revision 777) +++ sharplhf00l04.c (Arbeitskopie) @@ -179,7 +179,6 @@ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); - protect_jedec(bios); return 0; } Index: stm50flw0x0x.c =================================================================== --- stm50flw0x0x.c (Revision 777) +++ stm50flw0x0x.c (Arbeitskopie) @@ -31,15 +31,6 @@ #include "flash.h" #include "flashchips.h" -void protect_stm50flw0x0x(chipaddr bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - - programmer_delay(200); -} - int probe_stm50flw0x0x(struct flashchip *flash) { int result = probe_jedec(flash); @@ -189,7 +180,6 @@ int i; int total_size = flash->total_size * 1024; int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; printf("Erasing page:\n"); for (i = 0; i < total_size / page_size; i++) { @@ -206,7 +196,6 @@ } } printf("\n"); - protect_stm50flw0x0x(bios); return 0; } @@ -250,7 +239,6 @@ bios + i * page_size, page_size); } printf("\n"); - protect_stm50flw0x0x(bios); free(tmpbuf); return rc; Index: 82802ab.c =================================================================== --- 82802ab.c (Revision 777) +++ 82802ab.c (Arbeitskopie) @@ -190,7 +190,6 @@ bios + i * page_size, page_size); } printf("\n"); - protect_jedec(bios); free(tmpbuf); return 0; Index: m29f400bt.c =================================================================== --- m29f400bt.c (Revision 777) +++ m29f400bt.c (Arbeitskopie) @@ -20,15 +20,6 @@ #include "flash.h" -void protect_m29f400bt(chipaddr bios) -{ - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xA0, bios + 0xAAA); - - programmer_delay(200); -} - void write_page_m29f400bt(chipaddr bios, uint8_t *src, chipaddr dst, int page_size) { @@ -194,7 +185,6 @@ write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); printf("\n"); - //protect_m29f400bt (bios); return 0; } @@ -248,7 +238,6 @@ write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); printf("\n"); - //protect_m29f400bt (bios); return 0; }

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[commit] r783 - trunk
by svn＠flashrom.org 26 Nov '09

26 Nov '09

Author: hailfinger Date: 2009-11-26 15:50:52 +0100 (Thu, 26 Nov 2009) New Revision: 783 Modified: trunk/82802ab.c trunk/flash.h trunk/jedec.c trunk/m29f400bt.c trunk/sharplhf00l04.c trunk/stm50flw0x0x.c Log: This patch removes the extremely dangerous unprotect_jedec function which is not used at all within flashrom code, and renames the misleadingly named protect_jedec function to start_program_jedec. Calls to protect_jedec after flashing are removed, because a) on LPC chips, the command sent by protoct_jedec is not even in the datasheet and b) on parallel chips, the block write command issued before already contained the software protection sequence, so software protection is definitely enabled. This patch also removes two clones of protect_jedec Background: JEDEC Software Data Protection started as an optional feature, which was disabled on the first single-voltage-flash chips. The software data protection is the need to prefix a write with a magic "write enable" command, while without write protection every write access into the chip's address space modifies flash content. This magic write enable command also tells the flash chip that the programmer obviously support sending write-enable commands and turns off the "any write modifies flash content" mode. There also exist a two-command (6 writes) sequence that disables Software Data Protection completey, which should only ever be used to prepare updating with a device that can't handle software data protection. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/82802ab.c =================================================================== --- trunk/82802ab.c 2009-11-26 11:05:01 UTC (rev 782) +++ trunk/82802ab.c 2009-11-26 14:50:52 UTC (rev 783) @@ -190,7 +190,6 @@ bios + i * page_size, page_size); } printf("\n"); - protect_jedec(bios); free(tmpbuf); return 0; Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-11-26 11:05:01 UTC (rev 782) +++ trunk/flash.h 2009-11-26 14:50:52 UTC (rev 783) @@ -647,8 +647,7 @@ uint8_t oddparity(uint8_t val); void toggle_ready_jedec(chipaddr dst); void data_polling_jedec(chipaddr dst, uint8_t data); -void unprotect_jedec(chipaddr bios); -void protect_jedec(chipaddr bios); +void start_program_jedec(chipaddr bios); int write_byte_program_jedec(chipaddr bios, uint8_t *src, chipaddr dst); int probe_jedec(struct flashchip *flash); Modified: trunk/jedec.c =================================================================== --- trunk/jedec.c 2009-11-26 11:05:01 UTC (rev 782) +++ trunk/jedec.c 2009-11-26 14:50:52 UTC (rev 783) @@ -64,25 +64,11 @@ } } -void unprotect_jedec(chipaddr bios) +void start_program_jedec(chipaddr bios) { chip_writeb(0xAA, bios + 0x5555); chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x80, bios + 0x5555); - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0x20, bios + 0x5555); - - programmer_delay(200); -} - -void protect_jedec(chipaddr bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); chip_writeb(0xA0, bios + 0x5555); - - programmer_delay(200); } int probe_jedec(struct flashchip *flash) @@ -270,9 +256,7 @@ retry: /* Issue JEDEC Data Unprotect comand */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); + start_program_jedec(bios); /* transfer data from source to destination */ for (i = 0; i < page_size; i++) { @@ -312,9 +296,7 @@ retry: /* Issue JEDEC Byte Program command */ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); + start_program_jedec(bios); /* transfer data from source to destination */ chip_writeb(*src, dst); @@ -353,7 +335,6 @@ int i, failed = 0; int total_size = flash->total_size * 1024; int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; if (erase_chip_jedec(flash)) { fprintf(stderr,"ERASE FAILED!\n"); @@ -369,7 +350,6 @@ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); - protect_jedec(bios); return failed; } Modified: trunk/m29f400bt.c =================================================================== --- trunk/m29f400bt.c 2009-11-26 11:05:01 UTC (rev 782) +++ trunk/m29f400bt.c 2009-11-26 14:50:52 UTC (rev 783) @@ -20,15 +20,6 @@ #include "flash.h" -void protect_m29f400bt(chipaddr bios) -{ - chip_writeb(0xAA, bios + 0xAAA); - chip_writeb(0x55, bios + 0x555); - chip_writeb(0xA0, bios + 0xAAA); - - programmer_delay(200); -} - void write_page_m29f400bt(chipaddr bios, uint8_t *src, chipaddr dst, int page_size) { @@ -194,7 +185,6 @@ write_page_m29f400bt(bios, buf + 0x7c000, bios + 0x7c000, 16 * 1024); printf("\n"); - //protect_m29f400bt (bios); return 0; } @@ -248,7 +238,6 @@ write_page_m29f400bt(bios, buf + 0x30000, bios + 0x30000, 64 * 1024); printf("\n"); - //protect_m29f400bt (bios); return 0; } Modified: trunk/sharplhf00l04.c =================================================================== --- trunk/sharplhf00l04.c 2009-11-26 11:05:01 UTC (rev 782) +++ trunk/sharplhf00l04.c 2009-11-26 14:50:52 UTC (rev 783) @@ -179,7 +179,6 @@ printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); } printf("\n"); - protect_jedec(bios); return 0; } Modified: trunk/stm50flw0x0x.c =================================================================== --- trunk/stm50flw0x0x.c 2009-11-26 11:05:01 UTC (rev 782) +++ trunk/stm50flw0x0x.c 2009-11-26 14:50:52 UTC (rev 783) @@ -31,15 +31,6 @@ #include "flash.h" #include "flashchips.h" -void protect_stm50flw0x0x(chipaddr bios) -{ - chip_writeb(0xAA, bios + 0x5555); - chip_writeb(0x55, bios + 0x2AAA); - chip_writeb(0xA0, bios + 0x5555); - - programmer_delay(200); -} - int probe_stm50flw0x0x(struct flashchip *flash) { int result = probe_jedec(flash); @@ -189,7 +180,6 @@ int i; int total_size = flash->total_size * 1024; int page_size = flash->page_size; - chipaddr bios = flash->virtual_memory; printf("Erasing page:\n"); for (i = 0; i < total_size / page_size; i++) { @@ -206,7 +196,6 @@ } } printf("\n"); - protect_stm50flw0x0x(bios); return 0; } @@ -250,7 +239,6 @@ bios + i * page_size, page_size); } printf("\n"); - protect_stm50flw0x0x(bios); free(tmpbuf); return rc;

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Verbose output of lspci, superiotool and flashrom - Intel DP55WB (unsupported)
by Adrian Glaubitz 26 Nov '09

26 Nov '09

Hi, tested an Intel DP55WB, however the chipset was not detected and therefore flashing was not possible. Please see the attached logs of lspci -nnvvvxxx, superiotool -dV and flashrom -V. Website: <http://www.intel.com/products/desktop/motherboards/DP55WB/DP55WB-overview.h…> Adrian

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[RFC] Abort early or abort late on failure?
by Carl-Daniel Hailfinger 26 Nov '09

26 Nov '09

Hi, flashrom currently doesn't have a coherent policy about failed writes. Some chip drivers abort on the first failed write, others keep going until the end. Either variant makes sense, but mixing them is suboptimal. The following policies are available: - hardcode abort early (on first error) - hardcode abort never (ignore all errors until the end) - switch behaviour based on commandline parameter. Opinions? Regards, Carl-Daniel -- Developer quote of the month: "We are juggling too many chainsaws and flaming arrows and tigers."

2 1

Success with DFI Blood-Iron P35 T2RL
by Erno Vaurio 26 Nov '09

26 Nov '09

Hello, I was able to successfully flash my board with a new bios. There was one warning about spi_chip_erase_60 failing, this didn't affect the outcome and flash was verified. Board model: DFI Infinity Blood-Iron P35-T2RL Manual: http://img.lanparty.tw/Upload/Manual/CM/021107321.pdf Bios download link: http://img.lanparty.tw/Upload/BIOS/CM/I35RD924.zip $ sudo flashrom -w I35RD924.BIN flashrom v0.9.1-r706 No coreboot table found. Found chipset "Intel ICH9R", enabling flash write... OK. This chipset supports the following protocols: LPC,FWH,SPI. Calibrating delay loop... OK. Found chip "SST SST25VF080B" (1024 KB, SPI) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Erasing flash before programming... spi_chip_erase_60 failed during command execution done. COMPLETE. Verifying flash... VERIFIED. Requested output attached as files.

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[PATCH] winbondw25x32/64 support
by Bao, Zheng 26 Nov '09

26 Nov '09

Add entries of W25x32 and W25x64. The modle_ids are already in the header. W25x32 has been successfully probed. W25x64 is not available. I just get information from datasheet. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Index: flashchips.c =================================================================== --- flashchips.c (revision 781) +++ flashchips.c (working copy) @@ -3038,6 +3038,38 @@ { .vendor = "Winbond", + .name = "W25x32", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25X32, + .total_size = 4096, + .page_size = 256, + .tested = TEST_OK_PROBE, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", + .name = "W25x64", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25X64, + .total_size = 8192, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", .name = "W29C011", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID,

2 1

[commit] r782 - trunk
by svn＠flashrom.org 26 Nov '09

26 Nov '09

Author: hailfinger Date: 2009-11-26 12:05:01 +0100 (Thu, 26 Nov 2009) New Revision: 782 Modified: trunk/flashchips.c Log: Add entries of W25x32 and W25x64. The model_ids are already in the header. W25x32 has been successfully probed. W25x64 is not available, the entry is based on the datasheet. Signed-off-by: Zheng Bao <zheng.bao(a)amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-11-25 17:05:52 UTC (rev 781) +++ trunk/flashchips.c 2009-11-26 11:05:01 UTC (rev 782) @@ -3038,6 +3038,38 @@ { .vendor = "Winbond", + .name = "W25x32", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25X32, + .total_size = 4096, + .page_size = 256, + .tested = TEST_OK_PROBE, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", + .name = "W25x64", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = W_25X64, + .total_size = 8192, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .erase = spi_chip_erase_c7, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Winbond", .name = "W29C011", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = WINBOND_ID,

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