flashrom

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[commit] r1110 - trunk/util
by repository service 28 Jul '10

28 Jul '10

Author: uwe Date: Wed Jul 28 00:00:42 2010 New Revision: 1110 URL: http://flashrom.org/trac/coreboot/changeset/1110 Log: Add a udev rules file for flashrom. This allows USB-based external programmers to be used by non-root users (which are in the 'plugdev' group). The file is to be installed by the distros into the proper place (not sure if this is distro-specific). On Debian the file will end up in /etc/udev/rules.d/z60_flashrom.rules. On some systems the 'plugdev' group might have to adapted to whatever the respective distro uses. The following devices are listed so far: - Amontec JTAGkey(2) - Buspirate - Dediprog SF100 - DLP Design DLP-USB1232H - FTDI FT4232H Mini-Module Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/util/ trunk/util/z60_flashrom.rules Added: trunk/util/z60_flashrom.rules ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/util/z60_flashrom.rules Wed Jul 28 00:00:42 2010 (r1110) @@ -0,0 +1,55 @@ +## +## This file is part of the flashrom project. +## +## Copyright (C) 2010 Uwe Hermann <uwe(a)hermann-uwe.de> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +## +## Please keep this list sorted alphabetically by vendor/device name. +## + +## +## This is tested on udev version 154, other versions may need small fixes. +## +## Note that you might want to change the "plugdev" group to whatever is +## suitable for your respective distribution. +## + +ACTION!="add|change", GOTO="flashrom_rules_end" +SUBSYSTEM!="usb|usb_device", GOTO="flashrom_rules_end" + +# Amontec JTAGkey(2) +# http://www.amontec.com/jtagkey.shtml +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev" + +# Buspirate +# http://dangerousprototypes.com/2009/10/08/bus-pirate-raw-spi-mode/ +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev" + +# Dediprog SF100 +# http://www.dediprog.com/SPI-flash-in-circuit-programming/SF100 +ATTRS{idVendor}=="0483", ATTRS{idProduct}=="dada", MODE="664", GROUP="plugdev" + +# DLP Design DLP-USB1232H +# http://www.dlpdesign.com/usb/usb1232h.shtml +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev" + +# FTDI FT4232H Mini-Module +# http://www.ftdichip.com/Products/EvaluationKits/FT4232H_MiniModule.htm +ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="664", GROUP="plugdev" + +LABEL="flashrom_rules_end"

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[PATCH] ft2232_spi: JTAGkey support, 3rd try
by Jörg Fischer 27 Jul '10

27 Jul '10

Hi, here is the 3rd version of the JTAGkey patch against trunk. * rename FTDI_2232H to FTDI_2232H_PID, same for FTDI_4232H * add AMONTEC_JTAGKEY_PID to flash.h * add FTDI_VID (0x0403) to flash.h Signed-off-by: Joerg Fischer <turboj(a)gmx.de> Index: flashrom.8 =================================================================== --- flashrom.8 (Revision 1109) +++ flashrom.8 (Arbeitskopie) @@ -177,11 +177,11 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp -.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI\ +.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI \ translation unit)" .sp -.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H based\ -USB SPI programmer)" +.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H/JTAGkey \ +based USB SPI programmer)" .sp .BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog)" .sp @@ -351,7 +351,7 @@ syntax where .B model can be any of -.BR 2232H ", or " 4232H +.BR 2232H ", "JTAGkey ", or " 4232H and .B interface can be any of Index: flash.h =================================================================== --- flash.h (Revision 1109) +++ flash.h (Arbeitskopie) @@ -530,8 +530,10 @@ #endif /* ft2232_spi.c */ -#define FTDI_FT2232H 0x6010 -#define FTDI_FT4232H 0x6011 +#define FTDI_VID 0x0403 +#define FTDI_FT2232H_PID 0x6010 +#define FTDI_FT4232H_PID 0x6011 +#define AMONTEC_JTAGKEY_PID 0xCFF8 int ft2232_spi_init(void); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); Index: ft2232_spi.c =================================================================== --- ft2232_spi.c (Revision 1109) +++ ft2232_spi.c (Arbeitskopie) @@ -45,8 +45,29 @@ #define BITMODE_BITBANG_NORMAL 1 #define BITMODE_BITBANG_SPI 2 +/* Set data bits low-byte command: + * value: 0x08 CS=high, DI=low, DO=low, SK=low + * dir: 0x0b CS=output, DI=input, DO=output, SK=output + * + * JTAGkey(2) needs to enable its output via Bit4 / GPIOL0 + * value: 0x18 OE=high, CS=high, DI=low, DO=low, SK=low + * dir: 0x1b OE=output, CS=output, DI=input, DO=output, SK=output + * + */ +static unsigned char cs_bits = 0x08; +static unsigned char pindir = 0x0b; static struct ftdi_context ftdic_context; +static const char * getFT2232name(int ft2232_type) +{ + switch(ft2232_type) { + case FTDI_FT2232H_PID: return "2232H"; + case AMONTEC_JTAGKEY_PID: return "JTAGkey"; + default: return "4232H"; + } + return "4232H"; +} + static int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) { int r; @@ -76,16 +97,22 @@ int f; struct ftdi_context *ftdic = &ftdic_context; unsigned char buf[512]; - int ft2232_type = FTDI_FT4232H; + int ft2232_type = FTDI_FT4232H_PID; enum ftdi_interface ft2232_interface = INTERFACE_B; char *arg; arg = extract_programmer_param("type"); if (arg) { if (!strcasecmp(arg, "2232H")) - ft2232_type = FTDI_FT2232H; + ft2232_type = FTDI_FT2232H_PID; else if (!strcasecmp(arg, "4232H")) - ft2232_type = FTDI_FT4232H; + ft2232_type = FTDI_FT4232H_PID; + else if (!strcasecmp(arg, "jtagkey")) { + ft2232_type = AMONTEC_JTAGKEY_PID; + ft2232_interface = INTERFACE_A; + cs_bits = 0x18; + pindir = 0x1b; + } else { msg_perr("Error: Invalid device type specified.\n"); free(arg); @@ -110,7 +137,7 @@ } free(arg); msg_pdbg("Using device type %s ", - (ft2232_type == FTDI_FT2232H) ? "2232H" : "4232H"); + getFT2232name(ft2232_type)); msg_pdbg("interface %s\n", (ft2232_interface == INTERFACE_A) ? "A" : "B"); @@ -119,7 +146,7 @@ return EXIT_FAILURE; // TODO } - f = ftdi_usb_open(ftdic, 0x0403, ft2232_type); + f = ftdi_usb_open(ftdic, FTDI_VID, ft2232_type); if (f < 0 && f != -5) { msg_perr("Unable to open FTDI device: %d (%s)\n", f, @@ -178,14 +205,9 @@ return -1; msg_pdbg("Set data bits\n"); - /* Set data bits low-byte command: - * value: 0x08 CS=high, DI=low, DO=low, SK=low - * dir: 0x0b CS=output, DI=input, DO=output, SK=output - */ -#define CS_BIT 0x08 buf[0] = SET_BITS_LOW; - buf[1] = CS_BIT; - buf[2] = 0x0b; + buf[1] = cs_bits; + buf[2] = pindir; if (send_buf(ftdic, buf, 3)) return -1; @@ -230,8 +252,8 @@ */ msg_pspew("Assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = 0 & ~CS_BIT; /* assertive */ - buf[i++] = 0x0b; + buf[i++] = 0 & ~cs_bits; /* assertive */ + buf[i++] = pindir; if (writecnt) { buf[i++] = 0x11; @@ -272,8 +294,8 @@ msg_pspew("De-assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = CS_BIT; - buf[i++] = 0x0b; + buf[i++] = cs_bits; + buf[i++] = pindir; ret = send_buf(ftdic, buf, i); failed |= ret; if (ret)

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netbook hp 2133 mini :(
by Paweł Stawicki 27 Jul '10

27 Jul '10

Hi, I tried flashrom on my netbook with this result No EEPROM/flash device found. :( netbook still works :) I'm attaching the result of: sudo ./flashrom -p internal:laptop=force_I_want_a_brick -V > flashrom.txt flashrom version: ubuntu@ubuntu:~/flashrom$ svn info Path: . URL: svn://coreboot.org/flashrom/trunk Repository Root: svn://coreboot.org/flashrom Repository UUID: 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 Revision: 1109 Node Kind: directory Schedule: normal Last Changed Author: mkarcher Last Changed Rev: 1109 Last Changed Date: 2010-07-25 00:50:54 +0200 (nie, 25 lip 2010) Best Regards Paweł

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[PATCH] ft2232_spi: JTAGKey support, 2nd try
by Jörg Fischer 27 Jul '10

27 Jul '10

Hi, here is the 2nd version of the patch against current trunk. Changes: - renamed some vars - JTAGkey is now displayed as "JTAGkey" instead of "4232H" - and documented in manpage Signed-off-by: Joerg Fischer <turboj(a)gmx.de> Index: flashrom.8 =================================================================== --- flashrom.8 (Revision 1109) +++ flashrom.8 (Arbeitskopie) @@ -177,11 +177,11 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp -.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI\ +.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI \ translation unit)" .sp -.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H based\ -USB SPI programmer)" +.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H/JTAGkey \ +based USB SPI programmer)" .sp .BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog)" .sp @@ -351,7 +351,7 @@ syntax where .B model can be any of -.BR 2232H ", or " 4232H +.BR 2232H ", "JTAGkey ", or " 4232H and .B interface can be any of Index: ft2232_spi.c =================================================================== --- ft2232_spi.c (Revision 1109) +++ ft2232_spi.c (Arbeitskopie) @@ -45,8 +45,31 @@ #define BITMODE_BITBANG_NORMAL 1 #define BITMODE_BITBANG_SPI 2 + /* Set data bits low-byte command: + * value: 0x08 CS=high, DI=low, DO=low, SK=low + * dir: 0x0b CS=output, DI=input, DO=output, SK=output + * + * Jtagkey(2) needs to enable its output via Bit4 / GPIOL0 + * value: 0x18 OE=high, CS=high, DI=low, DO=low, SK=low + * dir: 0x1b OE=output, CS=output, DI=input, DO=output, SK=output + * + */ +static unsigned char cs_bits = 0x08; +static unsigned char pindir = 0x0b; static struct ftdi_context ftdic_context; +#define AMONTEC_JTAGKEY_PID 0xCFF8 + +static const char * getFT2232name(int ft2232_type) +{ + switch(ft2232_type) { + case FTDI_FT2232H: return "2232H"; + case AMONTEC_JTAGKEY_PID: return "JTAGkey"; + default: return "4232H"; + } + return "4232H"; +} + static int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) { int r; @@ -86,6 +109,12 @@ ft2232_type = FTDI_FT2232H; else if (!strcasecmp(arg, "4232H")) ft2232_type = FTDI_FT4232H; + else if (!strcasecmp(arg, "jtagkey")) { + ft2232_type = AMONTEC_JTAGKEY_PID; + ft2232_interface = INTERFACE_A; + cs_bits = 0x18; + pindir = 0x1b; + } else { msg_perr("Error: Invalid device type specified.\n"); free(arg); @@ -110,7 +139,7 @@ } free(arg); msg_pdbg("Using device type %s ", - (ft2232_type == FTDI_FT2232H) ? "2232H" : "4232H"); + getFT2232name(ft2232_type)); msg_pdbg("interface %s\n", (ft2232_interface == INTERFACE_A) ? "A" : "B"); @@ -178,14 +207,9 @@ return -1; msg_pdbg("Set data bits\n"); - /* Set data bits low-byte command: - * value: 0x08 CS=high, DI=low, DO=low, SK=low - * dir: 0x0b CS=output, DI=input, DO=output, SK=output - */ -#define CS_BIT 0x08 buf[0] = SET_BITS_LOW; - buf[1] = CS_BIT; - buf[2] = 0x0b; + buf[1] = cs_bits; + buf[2] = pindir; if (send_buf(ftdic, buf, 3)) return -1; @@ -230,8 +254,8 @@ */ msg_pspew("Assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = 0 & ~CS_BIT; /* assertive */ - buf[i++] = 0x0b; + buf[i++] = 0 & ~cs_bits; /* assertive */ + buf[i++] = pindir; if (writecnt) { buf[i++] = 0x11; @@ -272,8 +296,8 @@ msg_pspew("De-assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = CS_BIT; - buf[i++] = 0x0b; + buf[i++] = cs_bits; + buf[i++] = pindir; ret = send_buf(ftdic, buf, i); failed |= ret; if (ret)

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SPI status register writes
by Carl-Daniel Hailfinger 26 Jul '10

26 Jul '10

Quite a few SPI flash chips need a few milliseconds to write the status register (AT25 series etc.), but we do not take care of this at all. The same flash chips ignore any commands sent while the status register write cycle is in progress. Given that we execute WRSR once per write, I think it is pretty OK to have a 100 ms programmer delay after WRSR. An alternative would be to watch the status register contents, but that may or may not work, the datasheets are completely unclear about that case. If we're lucky, this will even solve a few write/erase issues we were seeing. What do you think? Regards, Carl-Daniel -- http://www.hailfinger.org/

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AMD CS5536 now detected twice with r1057
by Guenter 26 Jul '10

26 Jul '10

Hi, board is PC-Engines Alix 2C3: http://www.pcengines.ch/alix2c3.htm while r1001 detects the AMD CS5536 correctly only once: flashrom v0.9.2-r1001 on Linux 2.6.32-1 (i586), built with libpci 3.1.7, GCC 4.4.3 flashrom is free software, get the source code at http://www.flashrom.org No coreboot table found. Found chipset "AMD CS5536", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "AMIC A49LF040A" (512 KB, LPC) at physical address 0xfff80000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom(a)flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Thanks for your help! === No operations were specified. now recent r1057 gives a warning that AMD CS5536 is detected twice: flashrom v0.9.2-r1057 on Linux 2.6.32-1 (i586), built with libpci 3.1.7, GCC 4.4.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. No coreboot table found. Found chipset "AMD CS5536", enabling flash write... OK. WARNING: unexpected second chipset match: "AMD CS5536" ignoring, please report lspci and board URL to flashrom(a)flashrom.org! This chipset supports the following protocols: Non-SPI. Found chip "AMIC A49LF040A" (512 KB, LPC) at physical address 0xfff80000. No operations were specified. lspci -nn 00:01.0 Host bridge [0600]: Advanced Micro Devices [AMD] CS5536 [Geode companion] Host Bridge [1022:2080] (rev 33) 00:01.2 Entertainment encryption device [1010]: Advanced Micro Devices [AMD] Geode LX AES Security Block [1022:2082] 00:09.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) 00:0a.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) 00:0b.0 Ethernet controller [0200]: VIA Technologies, Inc. VT6105M [Rhine-III] [1106:3053] (rev 96) 00:0f.0 ISA bridge [0601]: Advanced Micro Devices [AMD] CS5536 [Geode companion] ISA [1022:2090] (rev 03) 00:0f.2 IDE interface [0101]: Advanced Micro Devices [AMD] CS5536 [Geode companion] IDE [1022:209a] (rev 01) 00:0f.4 USB Controller [0c03]: Advanced Micro Devices [AMD] CS5536 [Geode companion] OHC [1022:2094] (rev 02) 00:0f.5 USB Controller [0c03]: Advanced Micro Devices [AMD] CS5536 [Geode companion] EHC [1022:2095] (rev 02) Günter.

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Re: [flashrom] [PATCH] Board enable for GA-8IRML
by Carl-Daniel Hailfinger 26 Jul '10

26 Jul '10

Hi idlogin, did this patch work for you? On 12.06.2010 19:50, Michael Karcher wrote: > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > (pending confirmation by idlogin, otherwise please commit as NT) Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [flashrom] [PATCH] Board enable for abit NF-M2 nView
by Carl-Daniel Hailfinger 25 Jul '10

25 Jul '10

Hi Michael Stutz, did this patch work for you? You can also download it at http://patchwork.coreboot.org/patch/1505/raw/ I didn't see a response from you, but that may have been because we sent the patch to the e-mail address where your report came from (and we didn't change that address, so if the please-obfuscate-... should have been removed, it may explain why we didn't get a reply). On 13.06.2010 01:17, Michael Karcher wrote: > To be safe, the onboard video of the nView edition of this board has > been included in the match. If other NF-M2 editions have the same board > enable, the match should be broadened > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > (pending confirmation by Michael Stutz, otherwise please commit as NT) Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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[commit] r1109 - trunk
by repository service 25 Jul '10

25 Jul '10

Author: mkarcher Date: Sun Jul 25 00:50:54 2010 New Revision: 1109 URL: http://flashrom.org/trac/coreboot/changeset/1109 Log: Board enable for abit NF-M2 nView To be safe, the onboard video of the nView edition of this board has been included in the match. If other NF-M2 editions have the same board enable, the match should be broadened lspci/superiotool http://www.coreboot.org/pipermail/flashrom/2010-April/002909.html No success report, thus committed as untested. Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/board_enable.c trunk/print.c Modified: trunk/board_enable.c ============================================================================== --- trunk/board_enable.c Sun Jul 25 00:43:12 2010 (r1108) +++ trunk/board_enable.c Sun Jul 25 00:50:54 2010 (r1109) @@ -882,6 +882,14 @@ } /** + * Suited for abit NF-M2 nView: Socket AM2 + NVIDIA MCP51. + */ +static int nvidia_mcp_gpio4_lower(void) +{ + return nvidia_mcp_gpio_set(0x04, 0); +} + +/** * Suited for ASUS P5ND2-SLI Deluxe: LGA775 + nForce4 SLI + MCP04. */ static int nvidia_mcp_gpio10_raise(void) @@ -1682,6 +1690,7 @@ {0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise}, {0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, "Abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower}, {0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, "Abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise}, + {0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0240, 0x10de, 0x0222, NULL, NULL, NULL, "Abit", "NF-M2 nView", 0, NT, nvidia_mcp_gpio4_lower}, {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, OK, via_apollo_gpo4_lower}, {0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd}, {0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e}, Modified: trunk/print.c ============================================================================== --- trunk/print.c Sun Jul 25 00:43:12 2010 (r1108) +++ trunk/print.c Sun Jul 25 00:50:54 2010 (r1109) @@ -274,6 +274,7 @@ B("Abit", "IP35", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL), B("Abit", "IP35 Pro", 1, "http://www.abit.com.tw/page/de/motherboard/motherboard_detail.php?fMTYPE=LG…", NULL), B("Abit", "IS-10", 0, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?pMODEL_NA…", NULL), + B("Abit", "NF-M2 nView", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…", NULL), B("Abit", "NF7-S", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=So…", NULL), B("Abit", "VT6X4", 1, "http://www.abit.com.tw/page/en/motherboard/motherboard_detail.php?fMTYPE=Sl…", NULL), B("Acorp", "6A815EPD", 1, "http://web.archive.org/web/20021206163652/www.acorp.com.tw/English/default.…", NULL),

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Re: [flashrom] [PATCH] Detect IP35 by the SMBus bridge instead of the SATA controller
by Carl-Daniel Hailfinger 25 Jul '10

25 Jul '10

Hi Gunter, did Michael's patch work for you? On 20.06.2010 00:01, Michael Karcher wrote: > The SATA controller matched in the board enable is not always present > with that ID (that's the 2-port ICH9 SATA IDE controller), but (depending > on board revision/edition or BIOS settings an ICH9 SATA RAID controller > appears instead. This patches matches on the SMBus function in the > south bridge instead of the SATA controller. > > Signed-off-by: Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > (pending confirmation by Gunter) Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Regards, Carl-Daniel -- http://www.hailfinger.org/

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