flashrom

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[commit] r1119 - trunk
by repository service 29 Jul '10

29 Jul '10

Author: hailfinger Date: Thu Jul 29 17:54:53 2010 New Revision: 1119 URL: http://flashrom.org/trac/coreboot/changeset/1119 Log: Add support for the Amontec JTAGkey2, see http://www.amontec.com/jtagkey2.shtml http://www.amontec.com/jtagkey.shtml This FTDI 2232H variant has an additional output enable, which will be set to its "on" (L) when CS is pulled low. But it lacks a power supply and you need an external 3.3V source. The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I only have a JTAGkey2 here for testing. Add all FT2232H/FT4232H based programmers to the list printed with flashrom -L Signed-off-by: Jörg Fischer <turboj(a)gmx.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashrom.8 trunk/ft2232_spi.c trunk/print.c trunk/programmer.h Modified: trunk/flashrom.8 ============================================================================== --- trunk/flashrom.8 Thu Jul 29 17:00:40 2010 (r1118) +++ trunk/flashrom.8 Thu Jul 29 17:54:53 2010 (r1119) @@ -177,11 +177,11 @@ .sp .BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)" .sp -.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI\ +.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI \ translation unit)" .sp -.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H based\ -USB SPI programmer)" +.BR "* ft2232_spi" " (for SPI flash ROMs attached to a FT2232H/FT4232H/JTAGkey \ +based USB SPI programmer)" .sp .BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog)" .sp @@ -351,7 +351,7 @@ syntax where .B model can be any of -.BR 2232H ", or " 4232H +.BR 2232H ", "JTAGkey ", or " 4232H and .B interface can be any of Modified: trunk/ft2232_spi.c ============================================================================== --- trunk/ft2232_spi.c Thu Jul 29 17:00:40 2010 (r1118) +++ trunk/ft2232_spi.c Thu Jul 29 17:54:53 2010 (r1119) @@ -31,6 +31,19 @@ #include "spi.h" #include <ftdi.h> + +#define FTDI_VID 0x0403 +#define FTDI_FT2232H_PID 0x6010 +#define FTDI_FT4232H_PID 0x6011 +#define AMONTEC_JTAGKEY_PID 0xCFF8 + +const struct usbdev_status devs_ft2232spi[] = { + {FTDI_VID, FTDI_FT2232H_PID, OK, "FTDI", "FT2232H"}, + {FTDI_VID, FTDI_FT4232H_PID, OK, "FTDI", "FT4232H"}, + {FTDI_VID, AMONTEC_JTAGKEY_PID, OK, "Amontec", "JTAGkey"}, + {}, +}; + /* * The 'H' chips can run internally at either 12MHz or 60MHz. * The non-H chips can only run at 12MHz. @@ -46,8 +59,43 @@ #define BITMODE_BITBANG_NORMAL 1 #define BITMODE_BITBANG_SPI 2 +/* Set data bits low-byte command: + * value: 0x08 CS=high, DI=low, DO=low, SK=low + * dir: 0x0b CS=output, DI=input, DO=output, SK=output + * + * JTAGkey(2) needs to enable its output via Bit4 / GPIOL0 + * value: 0x18 OE=high, CS=high, DI=low, DO=low, SK=low + * dir: 0x1b OE=output, CS=output, DI=input, DO=output, SK=output + * + */ +static unsigned char cs_bits = 0x08; +static unsigned char pindir = 0x0b; static struct ftdi_context ftdic_context; +static const char *get_ft2232_devicename(int ft2232_vid, int ft2232_type) +{ + int i; + for (i=0; devs_ft2232spi[i].vendor_name != NULL; i ++) { + if ((devs_ft2232spi[i].device_id == ft2232_type) + && (devs_ft2232spi[i].vendor_id == ft2232_vid)) + return devs_ft2232spi[i].device_name; + } + return "unknown device"; +} + +static const char *get_ft2232_vendorname(int ft2232_vid, int ft2232_type) +{ + int i; + for (i=0; devs_ft2232spi[i].vendor_name != NULL; i ++) { + if ((devs_ft2232spi[i].device_id == ft2232_type) + && (devs_ft2232spi[i].vendor_id == ft2232_vid)) + return devs_ft2232spi[i].vendor_name; + } + return "unknown vendor"; +} + + + static int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size) { int r; @@ -77,16 +125,23 @@ int f; struct ftdi_context *ftdic = &ftdic_context; unsigned char buf[512]; - int ft2232_type = FTDI_FT4232H; + int ft2232_vid = FTDI_VID; + int ft2232_type = FTDI_FT4232H_PID; enum ftdi_interface ft2232_interface = INTERFACE_B; char *arg; arg = extract_programmer_param("type"); if (arg) { if (!strcasecmp(arg, "2232H")) - ft2232_type = FTDI_FT2232H; + ft2232_type = FTDI_FT2232H_PID; else if (!strcasecmp(arg, "4232H")) - ft2232_type = FTDI_FT4232H; + ft2232_type = FTDI_FT4232H_PID; + else if (!strcasecmp(arg, "jtagkey")) { + ft2232_type = AMONTEC_JTAGKEY_PID; + ft2232_interface = INTERFACE_A; + cs_bits = 0x18; + pindir = 0x1b; + } else { msg_perr("Error: Invalid device type specified.\n"); free(arg); @@ -110,8 +165,9 @@ } } free(arg); - msg_pdbg("Using device type %s ", - (ft2232_type == FTDI_FT2232H) ? "2232H" : "4232H"); + msg_pdbg("Using device type %s %s ", + get_ft2232_vendorname(ft2232_vid,ft2232_type), + get_ft2232_devicename(ft2232_vid,ft2232_type)); msg_pdbg("interface %s\n", (ft2232_interface == INTERFACE_A) ? "A" : "B"); @@ -120,7 +176,7 @@ return EXIT_FAILURE; // TODO } - f = ftdi_usb_open(ftdic, 0x0403, ft2232_type); + f = ftdi_usb_open(ftdic, FTDI_VID, ft2232_type); if (f < 0 && f != -5) { msg_perr("Unable to open FTDI device: %d (%s)\n", f, @@ -179,14 +235,9 @@ return -1; msg_pdbg("Set data bits\n"); - /* Set data bits low-byte command: - * value: 0x08 CS=high, DI=low, DO=low, SK=low - * dir: 0x0b CS=output, DI=input, DO=output, SK=output - */ -#define CS_BIT 0x08 buf[0] = SET_BITS_LOW; - buf[1] = CS_BIT; - buf[2] = 0x0b; + buf[1] = cs_bits; + buf[2] = pindir; if (send_buf(ftdic, buf, 3)) return -1; @@ -231,8 +282,8 @@ */ msg_pspew("Assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = 0 & ~CS_BIT; /* assertive */ - buf[i++] = 0x0b; + buf[i++] = 0 & ~cs_bits; /* assertive */ + buf[i++] = pindir; if (writecnt) { buf[i++] = 0x11; @@ -273,8 +324,8 @@ msg_pspew("De-assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = CS_BIT; - buf[i++] = 0x0b; + buf[i++] = cs_bits; + buf[i++] = pindir; ret = send_buf(ftdic, buf, i); failed |= ret; if (ret) @@ -294,4 +345,18 @@ return spi_write_chunked(flash, buf, start, len, 256); } +void print_supported_usbdevs(const struct usbdev_status *devs) +{ + int i; + + for (i = 0; devs[i].vendor_name != NULL; i++) { + msg_pinfo("%s %s [%02x:%02x]%s\n", devs[i].vendor_name, + devs[i].device_name, devs[i].vendor_id, + devs[i].device_id, + (devs[i].status == NT) ? " (untested)" : ""); + } +} + + + #endif Modified: trunk/print.c ============================================================================== --- trunk/print.c Thu Jul 29 17:00:40 2010 (r1118) +++ trunk/print.c Thu Jul 29 17:54:53 2010 (r1119) @@ -255,6 +255,15 @@ #if CONFIG_ATAHPT == 1 print_supported_pcidevs(ata_hpt); #endif + +#if CONFIG_FT2232_SPI+CONFIG_DEDIPROG >= 1 + printf("\nSupported USB devices flashrom can use " + "as programmer:\n\n"); +#endif + +#if CONFIG_FT2232_SPI == 1 + print_supported_usbdevs(devs_ft2232spi); +#endif } #if CONFIG_INTERNAL == 1 Modified: trunk/programmer.h ============================================================================== --- trunk/programmer.h Thu Jul 29 17:00:40 2010 (r1118) +++ trunk/programmer.h Thu Jul 29 17:54:53 2010 (r1119) @@ -397,12 +397,21 @@ #endif /* ft2232_spi.c */ -#define FTDI_FT2232H 0x6010 -#define FTDI_FT4232H 0x6011 +#if CONFIG_FT2232_SPI == 1 +struct usbdev_status { +uint16_t vendor_id; + uint16_t device_id; + int status; + const char *vendor_name; + const char *device_name; +}; int ft2232_spi_init(void); int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr); int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); +extern const struct usbdev_status devs_ft2232spi[]; +void print_supported_usbdevs(const struct usbdev_status *devs); +#endif /* rayer_spi.c */ #if CONFIG_RAYER_SPI == 1

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[commit] r1118 - trunk
by repository service 29 Jul '10

29 Jul '10

Author: hailfinger Date: Thu Jul 29 17:00:40 2010 New Revision: 1118 URL: http://flashrom.org/trac/coreboot/changeset/1118 Log: Add support for AMIC A25L512, A25L010, A25L020, A25L040, A25L080, A25L016, A25L032 AMIC A25LQ032 (quad-rate read) Signed-off-by: Dan Lenski <dlenski(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Jul 29 16:41:46 2010 (r1117) +++ trunk/flashchips.c Thu Jul 29 17:00:40 2010 (r1118) @@ -637,6 +637,250 @@ { .vendor = "AMIC", + .name = "A25L512", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L512, + .total_size = 64, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 16 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 1 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 64 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25L010", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L010, + .total_size = 128, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 32 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 2 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 128 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25L020", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L020, + .total_size = 256, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 64 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 4 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 256 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25L040", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L040, + .total_size = 512, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 128 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 8 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 512 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25L080", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L080, + .total_size = 1024, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 256 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 16 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 1024 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25L016", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L016, + .total_size = 2048, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 512 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 32 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 2048 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25L032", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25L032, + .total_size = 4096, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 1024 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 64 } }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { { 64 * 1024, 64 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 4096 * 1024, 1 } }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 4096 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */ + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", + .name = "A25LQ032", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = AMIC_ID_NOPREFIX, + .model_id = AMIC_A25LQ032, + .total_size = 4096, + .page_size = 256, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { { 4 * 1024, 1024 } }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { { 64 * 1024, 64 } }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { { 64 * 1024, 64 } }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { { 4096 * 1024, 1 } }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { { 4096 * 1024, 1 } }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = NULL, /* Two status reg bytes (read with 0x35 and 0x05) */ + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "AMIC", .name = "A29002B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = AMIC_ID_NOPREFIX, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Thu Jul 29 16:41:46 2010 (r1117) +++ trunk/flashchips.h Thu Jul 29 17:00:40 2010 (r1118) @@ -88,6 +88,14 @@ #define AMIC_A25L80P 0x2014 /* Seems that no A25L80PT exists */ #define AMIC_A25L16PT 0x2025 #define AMIC_A25L16PU 0x2015 +#define AMIC_A25L512 0x3010 +#define AMIC_A25L010 0x3011 +#define AMIC_A25L020 0x3012 +#define AMIC_A25L040 0x3013 +#define AMIC_A25L080 0x3014 +#define AMIC_A25L016 0x3015 +#define AMIC_A25L032 0x3016 +#define AMIC_A25LQ032 0x4016 #define AMIC_A29002B 0x0d #define AMIC_A29002T 0x8C /* Same as A290021T */ #define AMIC_A29040B 0x86

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[PATCH] Enable gfxnvidia, disallow write/erase
by Carl-Daniel Hailfinger 29 Jul '10

29 Jul '10

Compile gfxnvidia by default, but disallow write/erase. Needs [PATCH] Allow programmers to disallow writes Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-gfxnvidia_enable_without_write/gfxnvidia.c =================================================================== --- flashrom-gfxnvidia_enable_without_write/gfxnvidia.c (Revision 1065) +++ flashrom-gfxnvidia_enable_without_write/gfxnvidia.c (Arbeitskopie) @@ -75,6 +75,9 @@ buses_supported = CHIP_BUSTYPE_PARALLEL; + /* Write/erase doesn't work. */ + programmer_may_write = 0; + return 0; } Index: flashrom-gfxnvidia_enable_without_write/Makefile =================================================================== --- flashrom-gfxnvidia_enable_without_write/Makefile (Revision 1065) +++ flashrom-gfxnvidia_enable_without_write/Makefile (Arbeitskopie) @@ -113,8 +113,8 @@ # Always enable 3Com NICs for now. CONFIG_NIC3COM ?= yes -# Disable NVIDIA graphics cards for now, write/erase don't work properly. -CONFIG_GFXNVIDIA ?= no +# Enable NVIDIA graphics cards. Note: write/erase don't work properly. +CONFIG_GFXNVIDIA ?= yes # Always enable SiI SATA controllers for now. CONFIG_SATASII ?= yes -- http://www.hailfinger.org/

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[commit] r1117 - trunk
by repository service 29 Jul '10

29 Jul '10

Author: hailfinger Date: Thu Jul 29 16:41:46 2010 New Revision: 1117 URL: http://flashrom.org/trac/coreboot/changeset/1117 Log: Compile gfxnvidia by default, but disallow write/erase. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile trunk/gfxnvidia.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Jul 29 15:17:37 2010 (r1116) +++ trunk/Makefile Thu Jul 29 16:41:46 2010 (r1117) @@ -128,8 +128,8 @@ # Always enable 3Com NICs for now. CONFIG_NIC3COM ?= yes -# Disable NVIDIA graphics cards for now, write/erase don't work properly. -CONFIG_GFXNVIDIA ?= no +# Enable NVIDIA graphics cards. Note: write and erase do not work properly. +CONFIG_GFXNVIDIA ?= yes # Always enable SiI SATA controllers for now. CONFIG_SATASII ?= yes Modified: trunk/gfxnvidia.c ============================================================================== --- trunk/gfxnvidia.c Thu Jul 29 15:17:37 2010 (r1116) +++ trunk/gfxnvidia.c Thu Jul 29 16:41:46 2010 (r1117) @@ -82,6 +82,9 @@ buses_supported = CHIP_BUSTYPE_PARALLEL; + /* Write/erase doesn't work. */ + programmer_may_write = 0; + return 0; }

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VERIFIED MOTHERBOARD ASUS K8V SE DELUXE
by tuerceroscas＠andaluciajunta.es 29 Jul '10

29 Jul '10

Today I flash Asus K8V SE DELUXE with last BIOS file without any problem. Thanks for this program!

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P5PE-VM support
by František Kučera 29 Jul '10

29 Jul '10

Hi, Today I was trying Coreboot, but I made some mistake and bricked my Asus A8NE-FM board. Fortunately I had another board P5PE-VM with similar ROM chip. I booted it and then replaced the ROMs and wanted to flash the A8NE-FM's one with the original BIOS. But I get an error: Found chipset "Intel ICH5/ICH5R", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Calibrating delay loop... OK. Found chip "PMC Pm49FL004" (512 KB, LPC,FWH) at physical address 0xfff80000. Flash image seems to be a legacy BIOS. Disabling checks. Writing flash chip... Programming page: ERASE FAILED at 0x00000000! Expected=0xff, Read=0x4c, failed byte count from 0x00000000-0x0000ffff: 0xfed3 ERASE FAILED! ERASE FAILED! FAILED! Your flash chip is in an unknown state. I checked if there is any write protection in BIOS settings and didn't find any. But people at IRC chanell, especially twice11, helped me. After some diagnostics he send me a patch which adds writing capability for P5PE-VM boards. So I was able to flash the ROM and put it back to the A8NE-FM. Thanks a lot for that! I think, free software has much better support and works more effectively – if it were an commercial closed source product, It would take several days or weeks and may be never be supported... So thank for your work :-) Best Regards, František Kučera

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[PATCH] Allow compilation on all architectures if no hardware access is needed
by Carl-Daniel Hailfinger 29 Jul '10

29 Jul '10

Allow compilation on all architectures if no direct hardware access is needed. There is no point in preventing compilation due to lack of direct hardware access primitives if all you need is userspace access to the serial port (serprog, buspirate) or no access at all (dummy). This fixes dummy, serprog and buspirate compilation on SPARC. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-all_arches_no_hwdeps/hwaccess.h =================================================================== --- flashrom-all_arches_no_hwdeps/hwaccess.h (Revision 1109) +++ flashrom-all_arches_no_hwdeps/hwaccess.h (Arbeitskopie) @@ -160,6 +160,7 @@ #define le_to_cpu32 cpu_to_le32 #define le_to_cpu64 cpu_to_le64 +#if NEED_PCI == 1 #if defined (__i386__) || defined (__x86_64__) #define __FLASHROM_HAVE_OUTB__ 1 @@ -320,5 +321,6 @@ #error Unknown architecture, please check if it supports PCI port IO. #endif +#endif #endif /* !__HWACCESS_H__ */ -- http://www.hailfinger.org/

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[commit] r1116 - trunk
by repository service 29 Jul '10

29 Jul '10

Author: hailfinger Date: Thu Jul 29 15:17:37 2010 New Revision: 1116 URL: http://flashrom.org/trac/coreboot/changeset/1116 Log: Allow compilation on all architectures even if direct hardware access primitives are missing, if all you need is userspace access to the serial port (serprog, buspirate) or no access at all (dummy). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/hwaccess.h Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Thu Jul 29 15:09:18 2010 (r1115) +++ trunk/hwaccess.h Thu Jul 29 15:17:37 2010 (r1116) @@ -160,6 +160,7 @@ #define le_to_cpu32 cpu_to_le32 #define le_to_cpu64 cpu_to_le64 +#if NEED_PCI == 1 #if defined (__i386__) || defined (__x86_64__) #define __FLASHROM_HAVE_OUTB__ 1 @@ -320,5 +321,6 @@ #error Unknown architecture, please check if it supports PCI port IO. #endif +#endif #endif /* !__HWACCESS_H__ */

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[PATCH] Write protection handling for Atmel AT25*
by Carl-Daniel Hailfinger 29 Jul '10

29 Jul '10

Add detailed status register printing and unlocking for all ATMEL AT25* chips. Some chips require EWSR before WRSR, others require WREN before WRSR, and some support both variants. Add feature_bits to select the correct SPI command, and default to EWSR. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-writeprotect_atmel_at25/flash.h =================================================================== --- flashrom-writeprotect_atmel_at25/flash.h (Revision 1109) +++ flashrom-writeprotect_atmel_at25/flash.h (Arbeitskopie) @@ -167,8 +167,9 @@ /* * How many different erase functions do we have per chip? + * Atmel AT25FS010 has 6 different functions. */ -#define NUM_ERASEFUNCTIONS 5 +#define NUM_ERASEFUNCTIONS 6 #define FEATURE_REGISTERMAP (1 << 0) #define FEATURE_BYTEWRITES (1 << 1) @@ -180,6 +181,9 @@ #define FEATURE_ADDR_2AA (1 << 2) #define FEATURE_ADDR_AAA (2 << 2) #define FEATURE_ADDR_SHIFTED (1 << 5) +#define FEATURE_WRSR_EWSR (1 << 6) +#define FEATURE_WRSR_WREN (1 << 7) +#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) struct flashchip { const char *vendor; Index: flashrom-writeprotect_atmel_at25/spi25.c =================================================================== --- flashrom-writeprotect_atmel_at25/spi25.c (Revision 1109) +++ flashrom-writeprotect_atmel_at25/spi25.c (Arbeitskopie) @@ -311,8 +311,17 @@ } /* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_common(uint8_t status) +static void spi_prettyprint_status_register_welwip(uint8_t status) { + msg_cdbg("Chip status register: Write Enable Latch (WEL) is " + "%sset\n", (status & (1 << 1)) ? "" : "not "); + msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " + "%sset\n", (status & (1 << 0)) ? "" : "not "); +} + +/* Prettyprint the status register. Common definitions. */ +static void spi_prettyprint_status_register_common(uint8_t status) +{ msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " "%sset\n", (status & (1 << 5)) ? "" : "not "); msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is " @@ -321,10 +330,7 @@ "%sset\n", (status & (1 << 3)) ? "" : "not "); msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " "%sset\n", (status & (1 << 2)) ? "" : "not "); - msg_cdbg("Chip status register: Write Enable Latch (WEL) is " - "%sset\n", (status & (1 << 1)) ? "" : "not "); - msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " - "%sset\n", (status & (1 << 0)) ? "" : "not "); + spi_prettyprint_status_register_welwip(status); } /* Prettyprint the status register. Works for @@ -337,6 +343,121 @@ spi_prettyprint_status_register_common(status); } +/* Prettyprint the status register. Common definitions. */ +static void spi_prettyprint_status_register_at25_srplepewpp(uint8_t status) +{ + msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 " + "is %sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Erase/Program Error (EPE) " + "is %sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: WP# pin (WPP) " + "is %sactive\n", (status & (1 << 4)) ? "not " : ""); +} + +int spi_prettyprint_status_register_at25df(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_at25_srplepewpp(status); + msg_cdbg("Chip status register: Software Protection Status (SWP): "); + switch (status & (3 << 2)) { + case 0x0: + msg_cdbg("no sectors are protected\n"); + break; + case 0x1: + msg_cdbg("some sectors are protected\n"); + /* FIXME: Read individual Sector Protection Registers. */ + break; + case 0x3: + msg_cdbg("all sectors are protected\n"); + break; + default: + msg_cdbg("reserved for future use\n"); + break; + } + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cdbg("Ignoring security lockdown (if present)\n"); + msg_cdbg("Ignoring status register byte 2\n"); + return spi_prettyprint_status_register_at25df(flash); +} + +int spi_prettyprint_status_register_at25f(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_at25_srplepewpp(status); + msg_cdbg("Chip status register: Bit 3 " + "is %sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Block Protect 0 (BP0) is " + "%sset, %s sectors are protected\n", + (status & (1 << 2)) ? "" : "not ", + (status & (1 << 2)) ? "all" : "no"); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs010(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 4 is " + "%sset\n", (status & (1 << 4)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " + "%sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " + "%sset\n", (status & (1 << 2)) ? "" : "not "); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs040(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is " + "%sset\n", (status & (1 << 4)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " + "%sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " + "%sset\n", (status & (1 << 2)) ? "" : "not "); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + /* Prettyprint the status register. Works for * ST M25P series * MX MX25L series @@ -731,12 +852,12 @@ * This is according the SST25VF016 datasheet, who knows it is more * generic that this... */ -int spi_write_status_register(int status) +static int spi_write_status_register_ewsr(struct flashchip *flash, int status) { int result; struct spi_command cmds[] = { { - /* FIXME: WRSR requires either EWSR or WREN depending on chip type. */ + /* WRSR requires either EWSR or WREN depending on chip type. */ .writecnt = JEDEC_EWSR_OUTSIZE, .writearr = (const unsigned char[]){ JEDEC_EWSR }, .readcnt = 0, @@ -758,9 +879,59 @@ msg_cerr("%s failed during command execution\n", __func__); } + /* WRSR performs a self-timed erase before the changes take effect. */ + programmer_delay(100 * 1000); return result; } +static int spi_write_status_register_wren(struct flashchip *flash, int status) +{ + int result; + struct spi_command cmds[] = { + { + /* WRSR requires either EWSR or WREN depending on chip type. */ + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_WRSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(cmds); + if (result) { + msg_cerr("%s failed during command execution\n", + __func__); + } + /* WRSR performs a self-timed erase before the changes take effect. */ + programmer_delay(100 * 1000); + return result; +} + +static int spi_write_status_register(struct flashchip *flash, int status) +{ + int ret = 1; + + if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { + msg_cdbg("Missing status register write definition, assuming " + "EWSR is needed\n"); + flash->feature_bits |= FEATURE_WRSR_EWSR; + } + if (flash->feature_bits & FEATURE_WRSR_WREN) + ret = spi_write_status_register_wren(flash, status); + if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) + ret = spi_write_status_register_ewsr(flash, status); + return ret; +} + int spi_byte_program(int addr, uint8_t databyte) { int result; @@ -843,29 +1014,156 @@ return result; } +/* A generic brute-force block protection disable works like this: + * Write 0x00 to the status register. Check if any locks are still set (that + * part is chip specific). Repeat once. + */ int spi_disable_blockprotect(struct flashchip *flash) { uint8_t status; int result; status = spi_read_status_register(); - /* If there is block protection in effect, unprotect it first. */ + /* If block protection is disabled, stop here. */ + if ((status & 0x3c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + result = spi_write_status_register(flash, status & ~0x3c); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); if ((status & 0x3c) != 0) { - msg_cdbg("Some block protection in effect, disabling\n"); - result = spi_write_status_register(status & ~0x3c); + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} + +int spi_disable_blockprotect_at25df(struct flashchip *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(); + /* If block protection is disabled, stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Sector Protection Register Lock\n"); + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + /* All bits except bit 7 (SPRL) are readonly. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(); - if ((status & 0x3c) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; + + } + /* Global unprotect. Make sure to mask SPRL as well. */ + result = spi_write_status_register(flash, status & ~0xbc); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} + +int spi_disable_blockprotect_at25df_sec(struct flashchip *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cinfo("Ignoring security lockdown (if present)\n"); + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25f(struct flashchip *flash) +{ + /* spi_disable_blockprotect_at25df is not really the right way to do + * this, but the side effects of said function work here as well. + */ + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25fs010(struct flashchip *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(); + /* If block protection is disabled, stop here. */ + if ((status & 0x6c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; } } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xec); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & 0x6c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } return 0; } +int spi_disable_blockprotect_at25fs040(struct flashchip *flash) +{ + uint8_t status; + int result; + status = spi_read_status_register(); + /* If block protection is disabled, stop here. */ + if ((status & 0x7c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xfc); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & 0x7c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} + int spi_nbyte_read(int address, uint8_t *bytes, int len) { const unsigned char cmd[JEDEC_READ_OUTSIZE] = { Index: flashrom-writeprotect_atmel_at25/flashchips.c =================================================================== --- flashrom-writeprotect_atmel_at25/flashchips.c (Revision 1109) +++ flashrom-writeprotect_atmel_at25/flashchips.c (Arbeitskopie) @@ -313,6 +313,7 @@ .model_id = AT_25DF021, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -335,7 +336,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -348,6 +350,7 @@ .model_id = AT_25DF041A, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -370,7 +373,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -383,6 +387,7 @@ .model_id = AT_25DF081, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -405,19 +410,58 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Atmel", + .name = "AT25DF081A", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = AT_25DF081A, + .total_size = 1024, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", .name = "AT25DF161", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ATMEL_ID, .model_id = AT_25DF161, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -440,7 +484,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -453,6 +498,7 @@ .model_id = AT_25DF321, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -475,7 +521,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -488,6 +535,7 @@ .model_id = AT_25DF321A, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -510,7 +558,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -523,6 +572,7 @@ .model_id = AT_25DF641, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -545,19 +595,58 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, { .vendor = "Atmel", + .name = "AT25DQ161", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = AT_25DQ161, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", .name = "AT25F512B", .bustype = CHIP_BUSTYPE_SPI, .manufacture_id = ATMEL_ID, .model_id = AT_25F512B, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -580,7 +669,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -602,6 +692,9 @@ .eraseblocks = { {4 * 1024, 32} }, .block_erase = spi_block_erase_20, }, { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_d7, + }, { .eraseblocks = { {32 * 1024, 4} }, .block_erase = spi_block_erase_52, }, { @@ -615,7 +708,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25fs010, + .unlock = spi_disable_blockprotect_at25fs010, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -650,7 +744,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25fs040, + .unlock = spi_disable_blockprotect_at25fs040, .write = spi_chip_write_256, .read = spi_chip_read, }, Index: flashrom-writeprotect_atmel_at25/flashchips.h =================================================================== --- flashrom-writeprotect_atmel_at25/flashchips.h (Revision 1109) +++ flashrom-writeprotect_atmel_at25/flashchips.h (Arbeitskopie) @@ -110,12 +110,19 @@ #define AT_25DF021 0x4300 #define AT_25DF041A 0x4401 #define AT_25DF081 0x4502 +#define AT_25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */ #define AT_25DF161 0x4602 #define AT_25DF321 0x4700 /* Same as 26DF321 */ #define AT_25DF321A 0x4701 #define AT_25DF641 0x4800 -#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */ +#define AT_25DQ161 0x8600 +#define AT25F512 /* No device ID found in datasheet. Vendor ID + * can be read with AT25F512A_RDID */ +#define AT_25F512A 0x65 /* Needs AT25F512A_RDID */ #define AT_25F512B 0x6500 +#define AT25F1024 /* No device ID found in datasheet. Vendor ID + * can be read with AT25F512A_RDID */ +#define AT_25F1024A 0x60 /* Needs AT25F512A_RDID */ #define AT_25FS010 0x6601 #define AT_25FS040 0x6604 #define AT_26DF041 0x4400 Index: flashrom-writeprotect_atmel_at25/spi.c =================================================================== --- flashrom-writeprotect_atmel_at25/spi.c (Revision 1109) +++ flashrom-writeprotect_atmel_at25/spi.c (Arbeitskopie) @@ -29,8 +29,6 @@ enum spi_controller spi_controller = SPI_CONTROLLER_NONE; -void spi_prettyprint_status_register(struct flashchip *flash); - const struct spi_programmer spi_programmer[] = { { /* SPI_CONTROLLER_NONE */ .command = NULL, Index: flashrom-writeprotect_atmel_at25/spi.h =================================================================== --- flashrom-writeprotect_atmel_at25/spi.h (Revision 1109) +++ flashrom-writeprotect_atmel_at25/spi.h (Arbeitskopie) @@ -31,7 +31,7 @@ #define JEDEC_RDID_INSIZE 0x03 /* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 +#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */ #define AT25F512A_RDID_OUTSIZE 0x01 #define AT25F512A_RDID_INSIZE 0x02 @@ -123,5 +123,6 @@ #define SPI_INVALID_OPCODE -2 #define SPI_INVALID_ADDRESS -3 #define SPI_INVALID_LENGTH -4 +#define SPI_FLASHROM_BUG -5 #endif /* !__SPI_H__ */ Index: flashrom-writeprotect_atmel_at25/chipdrivers.h =================================================================== --- flashrom-writeprotect_atmel_at25/chipdrivers.h (Revision 1109) +++ flashrom-writeprotect_atmel_at25/chipdrivers.h (Arbeitskopie) @@ -47,7 +47,17 @@ int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len); int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); +int spi_prettyprint_status_register_at25df(struct flashchip *flash); +int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash); +int spi_prettyprint_status_register_at25f(struct flashchip *flash); +int spi_prettyprint_status_register_at25fs010(struct flashchip *flash); +int spi_prettyprint_status_register_at25fs040(struct flashchip *flash); int spi_disable_blockprotect(struct flashchip *flash); +int spi_disable_blockprotect_at25df(struct flashchip *flash); +int spi_disable_blockprotect_at25df_sec(struct flashchip *flash); +int spi_disable_blockprotect_at25f(struct flashchip *flash); +int spi_disable_blockprotect_at25fs010(struct flashchip *flash); +int spi_disable_blockprotect_at25fs040(struct flashchip *flash); int spi_byte_program(int addr, uint8_t databyte); int spi_nbyte_program(int addr, uint8_t *bytes, int len); int spi_nbyte_read(int addr, uint8_t *bytes, int len); -- http://www.hailfinger.org/

3 4

[commit] r1115 - trunk
by repository service 29 Jul '10

29 Jul '10

Author: hailfinger Date: Thu Jul 29 15:09:18 2010 New Revision: 1115 URL: http://flashrom.org/trac/coreboot/changeset/1115 Log: Add detailed status register printing and unlocking for all ATMEL AT25* chips. Add support for Atmel AT25DF081A and AT25DQ161. Some chips require EWSR before WRSR, others require WREN before WRSR, and some support both variants. Add feature_bits to select the correct SPI command, and default to EWSR. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Tested-by: Steven Rosario Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipdrivers.h trunk/flash.h trunk/flashchips.c trunk/flashchips.h trunk/spi.c trunk/spi.h trunk/spi25.c Modified: trunk/chipdrivers.h ============================================================================== --- trunk/chipdrivers.h Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/chipdrivers.h Thu Jul 29 15:09:18 2010 (r1115) @@ -47,7 +47,17 @@ int spi_chip_write_256_new(struct flashchip *flash, uint8_t *buf, int start, int len); int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len); uint8_t spi_read_status_register(void); +int spi_prettyprint_status_register_at25df(struct flashchip *flash); +int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash); +int spi_prettyprint_status_register_at25f(struct flashchip *flash); +int spi_prettyprint_status_register_at25fs010(struct flashchip *flash); +int spi_prettyprint_status_register_at25fs040(struct flashchip *flash); int spi_disable_blockprotect(struct flashchip *flash); +int spi_disable_blockprotect_at25df(struct flashchip *flash); +int spi_disable_blockprotect_at25df_sec(struct flashchip *flash); +int spi_disable_blockprotect_at25f(struct flashchip *flash); +int spi_disable_blockprotect_at25fs010(struct flashchip *flash); +int spi_disable_blockprotect_at25fs040(struct flashchip *flash); int spi_byte_program(int addr, uint8_t databyte); int spi_nbyte_program(int addr, uint8_t *bytes, int len); int spi_nbyte_read(int addr, uint8_t *bytes, int len); Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/flash.h Thu Jul 29 15:09:18 2010 (r1115) @@ -69,8 +69,9 @@ /* * How many different erase functions do we have per chip? + * Atmel AT25FS010 has 6 different functions. */ -#define NUM_ERASEFUNCTIONS 5 +#define NUM_ERASEFUNCTIONS 6 #define FEATURE_REGISTERMAP (1 << 0) #define FEATURE_BYTEWRITES (1 << 1) @@ -82,6 +83,9 @@ #define FEATURE_ADDR_2AA (1 << 2) #define FEATURE_ADDR_AAA (2 << 2) #define FEATURE_ADDR_SHIFTED (1 << 5) +#define FEATURE_WRSR_EWSR (1 << 6) +#define FEATURE_WRSR_WREN (1 << 7) +#define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) struct flashchip { const char *vendor; Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/flashchips.c Thu Jul 29 15:09:18 2010 (r1115) @@ -789,6 +789,7 @@ .model_id = AT_25DF021, .total_size = 256, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -811,7 +812,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -824,6 +826,7 @@ .model_id = AT_25DF041A, .total_size = 512, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -846,7 +849,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -859,6 +863,7 @@ .model_id = AT_25DF081, .total_size = 1024, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -881,7 +886,45 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", + .name = "AT25DF081A", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = AT_25DF081A, + .total_size = 1024, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -894,6 +937,7 @@ .model_id = AT_25DF161, .total_size = 2048, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -916,7 +960,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -929,6 +974,7 @@ .model_id = AT_25DF321, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_OK_PRW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -951,7 +997,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df, + .unlock = spi_disable_blockprotect_at25df, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -964,6 +1011,7 @@ .model_id = AT_25DF321A, .total_size = 4096, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -986,7 +1034,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -999,6 +1048,7 @@ .model_id = AT_25DF641, .total_size = 8192, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1021,7 +1071,45 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, + .write = spi_chip_write_256, + .read = spi_chip_read, + }, + + { + .vendor = "Atmel", + .name = "AT25DQ161", + .bustype = CHIP_BUSTYPE_SPI, + .manufacture_id = ATMEL_ID, + .model_id = AT_25DQ161, + .total_size = 2048, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_at25df_sec, + .unlock = spi_disable_blockprotect_at25df_sec, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1034,6 +1122,7 @@ .model_id = AT_25F512B, .total_size = 64, .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -1056,7 +1145,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25f, + .unlock = spi_disable_blockprotect_at25f, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1078,6 +1168,9 @@ .eraseblocks = { {4 * 1024, 32} }, .block_erase = spi_block_erase_20, }, { + .eraseblocks = { {4 * 1024, 32} }, + .block_erase = spi_block_erase_d7, + }, { .eraseblocks = { {32 * 1024, 4} }, .block_erase = spi_block_erase_52, }, { @@ -1091,7 +1184,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25fs010, + .unlock = spi_disable_blockprotect_at25fs010, .write = spi_chip_write_256, .read = spi_chip_read, }, @@ -1126,7 +1220,8 @@ .block_erase = spi_block_erase_c7, } }, - .unlock = spi_disable_blockprotect, + .printlock = spi_prettyprint_status_register_at25fs040, + .unlock = spi_disable_blockprotect_at25fs040, .write = spi_chip_write_256, .read = spi_chip_read, }, Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/flashchips.h Thu Jul 29 15:09:18 2010 (r1115) @@ -110,12 +110,19 @@ #define AT_25DF021 0x4300 #define AT_25DF041A 0x4401 #define AT_25DF081 0x4502 +#define AT_25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */ #define AT_25DF161 0x4602 #define AT_25DF321 0x4700 /* Same as 26DF321 */ #define AT_25DF321A 0x4701 #define AT_25DF641 0x4800 -#define AT_25F512A 0x65 /* Needs special RDID. AT25F512A_RDID 15 1d */ +#define AT_25DQ161 0x8600 +#define AT25F512 /* No device ID found in datasheet. Vendor ID + * can be read with AT25F512A_RDID */ +#define AT_25F512A 0x65 /* Needs AT25F512A_RDID */ #define AT_25F512B 0x6500 +#define AT25F1024 /* No device ID found in datasheet. Vendor ID + * can be read with AT25F512A_RDID */ +#define AT_25F1024A 0x60 /* Needs AT25F512A_RDID */ #define AT_25FS010 0x6601 #define AT_25FS040 0x6604 #define AT_26DF041 0x4400 Modified: trunk/spi.c ============================================================================== --- trunk/spi.c Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/spi.c Thu Jul 29 15:09:18 2010 (r1115) @@ -30,8 +30,6 @@ enum spi_controller spi_controller = SPI_CONTROLLER_NONE; -void spi_prettyprint_status_register(struct flashchip *flash); - const struct spi_programmer spi_programmer[] = { { /* SPI_CONTROLLER_NONE */ .command = NULL, Modified: trunk/spi.h ============================================================================== --- trunk/spi.h Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/spi.h Thu Jul 29 15:09:18 2010 (r1115) @@ -31,7 +31,7 @@ #define JEDEC_RDID_INSIZE 0x03 /* AT25F512A has bit 3 as don't care bit in commands */ -#define AT25F512A_RDID 0x15 +#define AT25F512A_RDID 0x15 /* 0x15 or 0x1d */ #define AT25F512A_RDID_OUTSIZE 0x01 #define AT25F512A_RDID_INSIZE 0x02 @@ -123,5 +123,6 @@ #define SPI_INVALID_OPCODE -2 #define SPI_INVALID_ADDRESS -3 #define SPI_INVALID_LENGTH -4 +#define SPI_FLASHROM_BUG -5 #endif /* !__SPI_H__ */ Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Thu Jul 29 00:20:20 2010 (r1114) +++ trunk/spi25.c Thu Jul 29 15:09:18 2010 (r1115) @@ -312,7 +312,16 @@ } /* Prettyprint the status register. Common definitions. */ -void spi_prettyprint_status_register_common(uint8_t status) +static void spi_prettyprint_status_register_welwip(uint8_t status) +{ + msg_cdbg("Chip status register: Write Enable Latch (WEL) is " + "%sset\n", (status & (1 << 1)) ? "" : "not "); + msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " + "%sset\n", (status & (1 << 0)) ? "" : "not "); +} + +/* Prettyprint the status register. Common definitions. */ +static void spi_prettyprint_status_register_common(uint8_t status) { msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " "%sset\n", (status & (1 << 5)) ? "" : "not "); @@ -322,10 +331,7 @@ "%sset\n", (status & (1 << 3)) ? "" : "not "); msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " "%sset\n", (status & (1 << 2)) ? "" : "not "); - msg_cdbg("Chip status register: Write Enable Latch (WEL) is " - "%sset\n", (status & (1 << 1)) ? "" : "not "); - msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is " - "%sset\n", (status & (1 << 0)) ? "" : "not "); + spi_prettyprint_status_register_welwip(status); } /* Prettyprint the status register. Works for @@ -338,6 +344,121 @@ spi_prettyprint_status_register_common(status); } +/* Prettyprint the status register. Common definitions. */ +static void spi_prettyprint_status_register_at25_srplepewpp(uint8_t status) +{ + msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 " + "is %sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Erase/Program Error (EPE) " + "is %sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: WP# pin (WPP) " + "is %sactive\n", (status & (1 << 4)) ? "not " : ""); +} + +int spi_prettyprint_status_register_at25df(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_at25_srplepewpp(status); + msg_cdbg("Chip status register: Software Protection Status (SWP): "); + switch (status & (3 << 2)) { + case 0x0 << 2: + msg_cdbg("no sectors are protected\n"); + break; + case 0x1 << 2: + msg_cdbg("some sectors are protected\n"); + /* FIXME: Read individual Sector Protection Registers. */ + break; + case 0x3 << 2: + msg_cdbg("all sectors are protected\n"); + break; + default: + msg_cdbg("reserved for future use\n"); + break; + } + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cdbg("Ignoring security lockdown (if present)\n"); + msg_cdbg("Ignoring status register byte 2\n"); + return spi_prettyprint_status_register_at25df(flash); +} + +int spi_prettyprint_status_register_at25f(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + spi_prettyprint_status_register_at25_srplepewpp(status); + msg_cdbg("Chip status register: Bit 3 " + "is %sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Block Protect 0 (BP0) is " + "%sset, %s sectors are protected\n", + (status & (1 << 2)) ? "" : "not ", + (status & (1 << 2)) ? "all" : "no"); + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs010(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 4 is " + "%sset\n", (status & (1 << 4)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " + "%sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " + "%sset\n", (status & (1 << 2)) ? "" : "not "); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + +int spi_prettyprint_status_register_at25fs040(struct flashchip *flash) +{ + uint8_t status; + + status = spi_read_status_register(); + msg_cdbg("Chip status register is %02x\n", status); + + msg_cdbg("Chip status register: Status Register Write Protect (WPEN) " + "is %sset\n", (status & (1 << 7)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is " + "%sset\n", (status & (1 << 6)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is " + "%sset\n", (status & (1 << 5)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is " + "%sset\n", (status & (1 << 4)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is " + "%sset\n", (status & (1 << 3)) ? "" : "not "); + msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is " + "%sset\n", (status & (1 << 2)) ? "" : "not "); + /* FIXME: Pretty-print detailed sector protection status. */ + spi_prettyprint_status_register_welwip(status); + return 0; +} + /* Prettyprint the status register. Works for * ST M25P series * MX MX25L series @@ -732,12 +853,12 @@ * This is according the SST25VF016 datasheet, who knows it is more * generic that this... */ -int spi_write_status_register(int status) +static int spi_write_status_register_ewsr(struct flashchip *flash, int status) { int result; struct spi_command cmds[] = { { - /* FIXME: WRSR requires either EWSR or WREN depending on chip type. */ + /* WRSR requires either EWSR or WREN depending on chip type. */ .writecnt = JEDEC_EWSR_OUTSIZE, .writearr = (const unsigned char[]){ JEDEC_EWSR }, .readcnt = 0, @@ -759,9 +880,59 @@ msg_cerr("%s failed during command execution\n", __func__); } + /* WRSR performs a self-timed erase before the changes take effect. */ + programmer_delay(100 * 1000); return result; } +static int spi_write_status_register_wren(struct flashchip *flash, int status) +{ + int result; + struct spi_command cmds[] = { + { + /* WRSR requires either EWSR or WREN depending on chip type. */ + .writecnt = JEDEC_WREN_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = JEDEC_WRSR_OUTSIZE, + .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, + .readcnt = 0, + .readarr = NULL, + }, { + .writecnt = 0, + .writearr = NULL, + .readcnt = 0, + .readarr = NULL, + }}; + + result = spi_send_multicommand(cmds); + if (result) { + msg_cerr("%s failed during command execution\n", + __func__); + } + /* WRSR performs a self-timed erase before the changes take effect. */ + programmer_delay(100 * 1000); + return result; +} + +static int spi_write_status_register(struct flashchip *flash, int status) +{ + int ret = 1; + + if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { + msg_cdbg("Missing status register write definition, assuming " + "EWSR is needed\n"); + flash->feature_bits |= FEATURE_WRSR_EWSR; + } + if (flash->feature_bits & FEATURE_WRSR_WREN) + ret = spi_write_status_register_wren(flash, status); + if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) + ret = spi_write_status_register_ewsr(flash, status); + return ret; +} + int spi_byte_program(int addr, uint8_t databyte) { int result; @@ -844,26 +1015,153 @@ return result; } +/* A generic brute-force block protection disable works like this: + * Write 0x00 to the status register. Check if any locks are still set (that + * part is chip specific). Repeat once. + */ int spi_disable_blockprotect(struct flashchip *flash) { uint8_t status; int result; status = spi_read_status_register(); - /* If there is block protection in effect, unprotect it first. */ + /* If block protection is disabled, stop here. */ + if ((status & 0x3c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + result = spi_write_status_register(flash, status & ~0x3c); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); if ((status & 0x3c) != 0) { - msg_cdbg("Some block protection in effect, disabling\n"); - result = spi_write_status_register(status & ~0x3c); + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} + +int spi_disable_blockprotect_at25df(struct flashchip *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(); + /* If block protection is disabled, stop here. */ + if ((status & (3 << 2)) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Sector Protection Register Lock\n"); + if ((status & (1 << 4)) == 0) { + msg_cerr("WP# pin is active, disabling " + "write protection is impossible.\n"); + return 1; + } + /* All bits except bit 7 (SPRL) are readonly. */ + result = spi_write_status_register(flash, status & ~(1 << 7)); if (result) { msg_cerr("spi_write_status_register failed\n"); return result; } - status = spi_read_status_register(); - if ((status & 0x3c) != 0) { - msg_cerr("Block protection could not be disabled!\n"); - return 1; + + } + /* Global unprotect. Make sure to mask SPRL as well. */ + result = spi_write_status_register(flash, status & ~0xbc); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & (3 << 2)) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} + +int spi_disable_blockprotect_at25df_sec(struct flashchip *flash) +{ + /* FIXME: We should check the security lockdown. */ + msg_cinfo("Ignoring security lockdown (if present)\n"); + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25f(struct flashchip *flash) +{ + /* spi_disable_blockprotect_at25df is not really the right way to do + * this, but the side effects of said function work here as well. + */ + return spi_disable_blockprotect_at25df(flash); +} + +int spi_disable_blockprotect_at25fs010(struct flashchip *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(); + /* If block protection is disabled, stop here. */ + if ((status & 0x6c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; } } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xec); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & 0x6c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } + return 0; +} +int spi_disable_blockprotect_at25fs040(struct flashchip *flash) +{ + uint8_t status; + int result; + + status = spi_read_status_register(); + /* If block protection is disabled, stop here. */ + if ((status & 0x7c) == 0) + return 0; + + msg_cdbg("Some block protection in effect, disabling\n"); + if (status & (1 << 7)) { + msg_cdbg("Need to disable Status Register Write Protect\n"); + /* Clear bit 7 (WPEN). */ + result = spi_write_status_register(flash, status & ~(1 << 7)); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + } + /* Global unprotect. Make sure to mask WPEN as well. */ + result = spi_write_status_register(flash, status & ~0xfc); + if (result) { + msg_cerr("spi_write_status_register failed\n"); + return result; + } + status = spi_read_status_register(); + if ((status & 0x7c) != 0) { + msg_cerr("Block protection could not be disabled!\n"); + return 1; + } return 0; }

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